JP2001093855A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JP2001093855A
JP2001093855A JP26530199A JP26530199A JP2001093855A JP 2001093855 A JP2001093855 A JP 2001093855A JP 26530199 A JP26530199 A JP 26530199A JP 26530199 A JP26530199 A JP 26530199A JP 2001093855 A JP2001093855 A JP 2001093855A
Authority
JP
Japan
Prior art keywords
insulating film
film
forming
etching
semiconductor substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP26530199A
Other languages
English (en)
Japanese (ja)
Inventor
Masateru Kawaguchi
眞輝 川口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP26530199A priority Critical patent/JP2001093855A/ja
Priority to TW089118792A priority patent/TW457541B/zh
Priority to KR1020000054855A priority patent/KR20010030433A/ko
Publication of JP2001093855A publication Critical patent/JP2001093855A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76897—Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76831—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches, e.g. non-conductive sidewall liners

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Drying Of Semiconductors (AREA)
  • Semiconductor Memories (AREA)
  • Electrodes Of Semiconductors (AREA)
JP26530199A 1999-09-20 1999-09-20 半導体装置の製造方法 Pending JP2001093855A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP26530199A JP2001093855A (ja) 1999-09-20 1999-09-20 半導体装置の製造方法
TW089118792A TW457541B (en) 1999-09-20 2000-09-14 Method of manufacturing semiconductor device
KR1020000054855A KR20010030433A (ko) 1999-09-20 2000-09-19 반도체장치 제조방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP26530199A JP2001093855A (ja) 1999-09-20 1999-09-20 半導体装置の製造方法

Publications (1)

Publication Number Publication Date
JP2001093855A true JP2001093855A (ja) 2001-04-06

Family

ID=17415309

Family Applications (1)

Application Number Title Priority Date Filing Date
JP26530199A Pending JP2001093855A (ja) 1999-09-20 1999-09-20 半導体装置の製造方法

Country Status (3)

Country Link
JP (1) JP2001093855A (ko)
KR (1) KR20010030433A (ko)
TW (1) TW457541B (ko)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005294518A (ja) * 2004-03-31 2005-10-20 Toshiba Corp 半導体装置およびその製造方法
JP2006245578A (ja) * 2005-02-28 2006-09-14 Hynix Semiconductor Inc 半導体装置の製造方法
KR100980294B1 (ko) 2003-06-28 2010-09-06 주식회사 하이닉스반도체 반도체 소자의 커패시터 형성방법
CN102522328A (zh) * 2011-12-30 2012-06-27 江苏宏微科技有限公司 Mos器件栅极孔的制作方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100199094B1 (ko) * 1995-10-18 1999-06-15 구본준 반도체 소자의 커패시터 제조방법
JP3638711B2 (ja) * 1996-04-22 2005-04-13 株式会社ルネサステクノロジ 半導体装置およびその製造方法
KR19990065385A (ko) * 1998-01-13 1999-08-05 윤종용 반도체 메모리 장치의 콘택홀 형성방법

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100980294B1 (ko) 2003-06-28 2010-09-06 주식회사 하이닉스반도체 반도체 소자의 커패시터 형성방법
JP2005294518A (ja) * 2004-03-31 2005-10-20 Toshiba Corp 半導体装置およびその製造方法
JP2006245578A (ja) * 2005-02-28 2006-09-14 Hynix Semiconductor Inc 半導体装置の製造方法
CN102522328A (zh) * 2011-12-30 2012-06-27 江苏宏微科技有限公司 Mos器件栅极孔的制作方法

Also Published As

Publication number Publication date
KR20010030433A (ko) 2001-04-16
TW457541B (en) 2001-10-01

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