IT957286B - Circuito integrato con un substrato contenente zone di resistivita for mate in modo selettivo - Google Patents

Circuito integrato con un substrato contenente zone di resistivita for mate in modo selettivo

Info

Publication number
IT957286B
IT957286B IT9466/72A IT946672A IT957286B IT 957286 B IT957286 B IT 957286B IT 9466/72 A IT9466/72 A IT 9466/72A IT 946672 A IT946672 A IT 946672A IT 957286 B IT957286 B IT 957286B
Authority
IT
Italy
Prior art keywords
mate
integrated circuit
substrate containing
selective mode
resistivity zones
Prior art date
Application number
IT9466/72A
Other languages
English (en)
Original Assignee
Standard Microsyst Smc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Standard Microsyst Smc filed Critical Standard Microsyst Smc
Application granted granted Critical
Publication of IT957286B publication Critical patent/IT957286B/it

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/535—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including internal interconnections, e.g. cross-under constructions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76221—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO with a plurality of successive local oxidation steps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/085—Isolated-integrated
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/103—Mask, dual function, e.g. diffusion and oxidation
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/145—Shaped junctions
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/901—MOSFET substrate bias

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Element Separation (AREA)
IT9466/72A 1971-04-30 1972-04-29 Circuito integrato con un substrato contenente zone di resistivita for mate in modo selettivo IT957286B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US13891571A 1971-04-30 1971-04-30

Publications (1)

Publication Number Publication Date
IT957286B true IT957286B (it) 1973-10-10

Family

ID=22484248

Family Applications (1)

Application Number Title Priority Date Filing Date
IT9466/72A IT957286B (it) 1971-04-30 1972-04-29 Circuito integrato con un substrato contenente zone di resistivita for mate in modo selettivo

Country Status (9)

Country Link
US (1) US3751722A (it)
JP (1) JPS529355B1 (it)
CA (1) CA932475A (it)
DE (1) DE2214935C2 (it)
FR (1) FR2134468B1 (it)
GB (1) GB1366527A (it)
IL (1) IL39277A (it)
IT (1) IT957286B (it)
NL (1) NL7205739A (it)

Families Citing this family (40)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3648125A (en) * 1971-02-02 1972-03-07 Fairchild Camera Instr Co Method of fabricating integrated circuits with oxidized isolation and the resulting structure
NL170901C (nl) * 1971-04-03 1983-01-03 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderinrichting.
DE2318912A1 (de) * 1972-06-30 1974-01-17 Ibm Integrierte halbleiteranordnung
JPS5228550B2 (it) * 1972-10-04 1977-07-27
US3975221A (en) * 1973-08-29 1976-08-17 American Micro-Systems, Inc. Low capacitance V groove MOS NOR gate and method of manufacture
US3924265A (en) * 1973-08-29 1975-12-02 American Micro Syst Low capacitance V groove MOS NOR gate and method of manufacture
JPS5631898B2 (it) * 1974-01-11 1981-07-24
US3979765A (en) * 1974-03-07 1976-09-07 Signetics Corporation Silicon gate MOS device and method
US3899363A (en) * 1974-06-28 1975-08-12 Ibm Method and device for reducing sidewall conduction in recessed oxide pet arrays
JPS573225B2 (it) * 1974-08-19 1982-01-20
US4023195A (en) * 1974-10-23 1977-05-10 Smc Microsystems Corporation MOS field-effect transistor structure with mesa-like contact and gate areas and selectively deeper junctions
US3943542A (en) * 1974-11-06 1976-03-09 International Business Machines, Corporation High reliability, low leakage, self-aligned silicon gate FET and method of fabricating same
US4054989A (en) * 1974-11-06 1977-10-25 International Business Machines Corporation High reliability, low leakage, self-aligned silicon gate FET and method of fabricating same
US4011105A (en) * 1975-09-15 1977-03-08 Mos Technology, Inc. Field inversion control for n-channel device integrated circuits
US4013489A (en) * 1976-02-10 1977-03-22 Intel Corporation Process for forming a low resistance interconnect in MOS N-channel silicon gate integrated circuit
IT1097967B (it) * 1977-07-18 1985-08-31 Mostek Corp Procedimnto e struttura per l'incrocio di segnali di informazione in un dispositivo a circuito integrato
US4182636A (en) * 1978-06-30 1980-01-08 International Business Machines Corporation Method of fabricating self-aligned contact vias
US4295209A (en) * 1979-11-28 1981-10-13 General Motors Corporation Programming an IGFET read-only-memory
US4299862A (en) * 1979-11-28 1981-11-10 General Motors Corporation Etching windows in thick dielectric coatings overlying semiconductor device surfaces
US4364167A (en) * 1979-11-28 1982-12-21 General Motors Corporation Programming an IGFET read-only-memory
NL8003612A (nl) * 1980-06-23 1982-01-18 Philips Nv Werkwijze ter vervaardiging van een halfgeleider- inrichting en halfgeleiderinrichting vervaardigd door toepassing van deze werkwijze.
US4295266A (en) * 1980-06-30 1981-10-20 Rca Corporation Method of manufacturing bulk CMOS integrated circuits
US4370669A (en) * 1980-07-16 1983-01-25 General Motors Corporation Reduced source capacitance ring-shaped IGFET load transistor in mesa-type integrated circuit
US4363109A (en) * 1980-11-28 1982-12-07 General Motors Corporation Capacitance coupled eeprom
JPS5791553A (en) * 1980-11-29 1982-06-07 Toshiba Corp Semiconductor device
US4365405A (en) * 1981-05-28 1982-12-28 General Motors Corporation Method of late programming read only memory devices
US4364165A (en) * 1981-05-28 1982-12-21 General Motors Corporation Late programming using a silicon nitride interlayer
JPS5873163A (ja) * 1981-10-27 1983-05-02 Toshiba Corp Ｍｏｓ型半導体装置
US4633572A (en) * 1983-02-22 1987-01-06 General Motors Corporation Programming power paths in an IC by combined depletion and enhancement implants
US4547959A (en) * 1983-02-22 1985-10-22 General Motors Corporation Uses for buried contacts in integrated circuits
JPS60123055A (ja) * 1983-12-07 1985-07-01 Fujitsu Ltd 半導体装置及びその製造方法
US4551910A (en) * 1984-11-27 1985-11-12 Intel Corporation MOS Isolation processing
US4748489A (en) * 1985-03-22 1988-05-31 Nec Corporation Integrated circuit semiconductor device having improved isolation region
US4990983A (en) * 1986-10-31 1991-02-05 Rockwell International Corporation Radiation hardened field oxides for NMOS and CMOS-bulk and process for forming
US4814290A (en) * 1987-10-30 1989-03-21 International Business Machines Corporation Method for providing increased dopant concentration in selected regions of semiconductor devices
US4994407A (en) * 1988-09-20 1991-02-19 Rockwell International Corporation Radiation hardened field oxides for NMOS and CMOS-bulk and process for forming
SE466078B (sv) * 1990-04-20 1991-12-09 Ericsson Telefon Ab L M Anordning vid en skaerm hos en integrerad krets och foerfarande foer framstaellning av anordningen
DE4405631C1 (de) * 1994-02-22 1995-07-20 Bosch Gmbh Robert Integriertes Bauelement
DE102008030856B4 (de) * 2008-06-30 2015-12-03 Advanced Micro Devices, Inc. Verfahren zur Schwellwerteinstellung für MOS-Bauelemente
US8735986B2 (en) 2011-12-06 2014-05-27 International Business Machines Corporation Forming structures on resistive substrates

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1095413A (it) * 1964-12-24
US3450961A (en) * 1966-05-26 1969-06-17 Westinghouse Electric Corp Semiconductor devices with a region having portions of differing depth and concentration
US3786318A (en) * 1966-10-14 1974-01-15 Hitachi Ltd Semiconductor device having channel preventing structure
US3534234A (en) * 1966-12-15 1970-10-13 Texas Instruments Inc Modified planar process for making semiconductor devices having ultrafine mesa type geometry
GB1203298A (en) * 1967-01-10 1970-08-26 Hewlett Packard Co Mis integrated circuit and method of fabricating the same
US3555374A (en) * 1967-03-03 1971-01-12 Hitachi Ltd Field effect semiconductor device having a protective diode
NL152707B (nl) * 1967-06-08 1977-03-15 Philips Nv Halfgeleiderinrichting bevattende een veldeffecttransistor van het type met geisoleerde poortelektrode en werkwijze ter vervaardiging daarvan.
US3387286A (en) * 1967-07-14 1968-06-04 Ibm Field-effect transistor memory
US3607469A (en) * 1969-03-27 1971-09-21 Nat Semiconductor Corp Method of obtaining low concentration impurity predeposition on a semiconductive wafer
JPS4836598B1 (it) * 1969-09-05 1973-11-06
US3648125A (en) * 1971-02-02 1972-03-07 Fairchild Camera Instr Co Method of fabricating integrated circuits with oxidized isolation and the resulting structure

Also Published As

Publication number Publication date
DE2214935C2 (de) 1982-11-11
FR2134468A1 (it) 1972-12-08
FR2134468B1 (it) 1977-08-26
CA932475A (en) 1973-08-21
IL39277A0 (en) 1972-06-28
JPS529355B1 (it) 1977-03-15
DE2214935A1 (de) 1972-11-23
GB1366527A (en) 1974-09-11
IL39277A (en) 1974-12-31
NL7205739A (it) 1972-11-01
US3751722A (en) 1973-08-07

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