IT9048191A1 - "dispositivo di memoria a semi-coduttori con cella a condesantore impi lato e procedimento per la sua fabbricazione". - Google Patents

"dispositivo di memoria a semi-coduttori con cella a condesantore impi lato e procedimento per la sua fabbricazione".

Info

Publication number
IT9048191A1
IT9048191A1 IT048191A IT4819190A IT9048191A1 IT 9048191 A1 IT9048191 A1 IT 9048191A1 IT 048191 A IT048191 A IT 048191A IT 4819190 A IT4819190 A IT 4819190A IT 9048191 A1 IT9048191 A1 IT 9048191A1
Authority
IT
Italy
Prior art keywords
condesantor
coduttor
semi
procedure
manufacture
Prior art date
Application number
IT048191A
Other languages
English (en)
Other versions
IT9048191A0 (it
Inventor
Tae-Hyuk Ahn
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of IT9048191A0 publication Critical patent/IT9048191A0/it
Publication of IT9048191A1 publication Critical patent/IT9048191A1/it

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/30DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/102Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including bipolar components

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
IT048191A 1990-05-31 1990-07-31 "dispositivo di memoria a semi-coduttori con cella a condesantore impi lato e procedimento per la sua fabbricazione". IT9048191A1 (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900008069A KR920009748B1 (ko) 1990-05-31 1990-05-31 적층형 캐패시터셀의 구조 및 제조방법

Publications (2)

Publication Number Publication Date
IT9048191A0 IT9048191A0 (it) 1990-07-31
IT9048191A1 true IT9048191A1 (it) 1991-12-01

Family

ID=19299691

Family Applications (1)

Application Number Title Priority Date Filing Date
IT048191A IT9048191A1 (it) 1990-05-31 1990-07-31 "dispositivo di memoria a semi-coduttori con cella a condesantore impi lato e procedimento per la sua fabbricazione".

Country Status (6)

Country Link
JP (1) JPH0435062A (it)
KR (1) KR920009748B1 (it)
CN (1) CN1056946A (it)
DE (1) DE4023153A1 (it)
GB (1) GB2244596A (it)
IT (1) IT9048191A1 (it)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3147144B2 (ja) * 1996-04-09 2001-03-19 日本電気株式会社 半導体装置及びその製造方法
KR100475075B1 (ko) * 2002-05-17 2005-03-10 삼성전자주식회사 반도체 메모리 소자 및 그 제조방법
US7538384B2 (en) * 2005-12-05 2009-05-26 Taiwan Semiconductor Manufacturing Company, Ltd. Non-volatile memory array structure
TWI679662B (zh) * 2019-08-01 2019-12-11 力晶積成電子製造股份有限公司 電容集成結構及其電容與其製造方法

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2720533A1 (de) * 1977-05-06 1978-11-09 Siemens Ag Monolithisch integrierte schaltungsanordnung mit ein-transistor- speicherelementen
JPS57120295A (en) * 1981-01-17 1982-07-27 Mitsubishi Electric Corp Semiconductor memory device
JPS602782B2 (ja) * 1982-06-30 1985-01-23 富士通株式会社 半導体記憶装置
JPS602784B2 (ja) * 1982-12-20 1985-01-23 富士通株式会社 半導体記憶装置
GB2143675B (en) * 1983-07-11 1987-05-07 Nat Semiconductor Corp High efficiency dynamic random access memory cell and process for fabricating it
JPH0618257B2 (ja) * 1984-04-28 1994-03-09 富士通株式会社 半導体記憶装置の製造方法
JPS61183952A (ja) * 1985-02-09 1986-08-16 Fujitsu Ltd 半導体記憶装置及びその製造方法
EP0750347B1 (en) * 1987-06-17 2002-05-08 Fujitsu Limited Dynamic random access memory device and method of producing the same
JP2755591B2 (ja) * 1988-03-25 1998-05-20 株式会社東芝 半導体記憶装置
JP2682021B2 (ja) * 1988-06-29 1997-11-26 富士通株式会社 半導体メモリ装置
JPH0294471A (ja) * 1988-09-30 1990-04-05 Toshiba Corp 半導体記憶装置およびその製造方法

Also Published As

Publication number Publication date
KR920009748B1 (ko) 1992-10-22
GB2244596A (en) 1991-12-04
CN1056946A (zh) 1991-12-11
KR910020903A (ko) 1991-12-20
IT9048191A0 (it) 1990-07-31
DE4023153A1 (de) 1991-12-05
JPH0435062A (ja) 1992-02-05
GB9016673D0 (en) 1990-09-12

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