IT8683633A0 - Sistema per la verifica della funzionalita' e delle caratteristiche di dispositivi a semiconduttore di tipo epromdurante il "burn-in". - Google Patents

Sistema per la verifica della funzionalita' e delle caratteristiche di dispositivi a semiconduttore di tipo epromdurante il "burn-in".

Info

Publication number
IT8683633A0
IT8683633A0 IT8683633A IT8363386A IT8683633A0 IT 8683633 A0 IT8683633 A0 IT 8683633A0 IT 8683633 A IT8683633 A IT 8683633A IT 8363386 A IT8363386 A IT 8363386A IT 8683633 A0 IT8683633 A0 IT 8683633A0
Authority
IT
Italy
Prior art keywords
burn
verification
functionality
type
semiconductor devices
Prior art date
Application number
IT8683633A
Other languages
English (en)
Other versions
IT1201837B (it
Inventor
Lucio Cozzi
Original Assignee
Sgs Microelettronica Spa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sgs Microelettronica Spa filed Critical Sgs Microelettronica Spa
Priority to IT83633/86A priority Critical patent/IT1201837B/it
Publication of IT8683633A0 publication Critical patent/IT8683633A0/it
Priority to US07/073,654 priority patent/US4799021A/en
Priority to EP87830271A priority patent/EP0254691B1/en
Priority to DE8787830271T priority patent/DE3786203T2/de
Priority to JP62182109A priority patent/JP2615058B2/ja
Priority to US07/258,962 priority patent/US4871963A/en
Application granted granted Critical
Publication of IT1201837B publication Critical patent/IT1201837B/it

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2855—Environmental, reliability or burn-in testing
    • G01R31/286—External aspects, e.g. related to chambers, contacting devices or handlers
    • G01R31/2868—Complete testing stations; systems; procedures; software aspects
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26—Testing of individual semiconductor devices
    • G01R31/2642—Testing semiconductor operation lifetime or reliability, e.g. by accelerated life tests
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G11C29/50012—Marginal testing, e.g. race, voltage or current testing of timing
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G11C29/50016—Marginal testing, e.g. race, voltage or current testing of retention
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS

Landscapes

  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Environmental & Geological Engineering (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
IT83633/86A 1986-07-22 1986-07-22 Sistema per la verifica della funzionalita' e delle caratteristiche di dispositivi a semiconduttore di tipo eprom durante il "burn-in" IT1201837B (it)

Priority Applications (6)

Application Number Priority Date Filing Date Title
IT83633/86A IT1201837B (it) 1986-07-22 1986-07-22 Sistema per la verifica della funzionalita' e delle caratteristiche di dispositivi a semiconduttore di tipo eprom durante il "burn-in"
US07/073,654 US4799021A (en) 1986-07-22 1987-07-15 Method and apparatus for testing EPROM type semiconductor devices during burn-in
EP87830271A EP0254691B1 (en) 1986-07-22 1987-07-15 Method and apparatus for testing eprom type semiconductor devices during burn-in
DE8787830271T DE3786203T2 (de) 1986-07-22 1987-07-15 Verfahren und apparat zum testen von eprom-halbleitern waehrend des einbrennvorgangs.
JP62182109A JP2615058B2 (ja) 1986-07-22 1987-07-21 バーンインの間にｅｐｒｏｍ型半導体デバイスをテストするための方法及び装置
US07/258,962 US4871963A (en) 1986-07-22 1988-10-17 Method and apparatus for testing EPROM type semiconductor devices during burn-in

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT83633/86A IT1201837B (it) 1986-07-22 1986-07-22 Sistema per la verifica della funzionalita' e delle caratteristiche di dispositivi a semiconduttore di tipo eprom durante il "burn-in"

Publications (2)

Publication Number Publication Date
IT8683633A0 true IT8683633A0 (it) 1986-07-22
IT1201837B IT1201837B (it) 1989-02-02

Family

ID=11323439

Family Applications (1)

Application Number Title Priority Date Filing Date
IT83633/86A IT1201837B (it) 1986-07-22 1986-07-22 Sistema per la verifica della funzionalita' e delle caratteristiche di dispositivi a semiconduttore di tipo eprom durante il "burn-in"

Country Status (5)

Country Link
US (2) US4799021A (it)
EP (1) EP0254691B1 (it)
JP (1) JP2615058B2 (it)
DE (1) DE3786203T2 (it)
IT (1) IT1201837B (it)

Families Citing this family (47)

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MY103847A (en) * 1988-03-15 1993-09-30 Yamaichi Electric Mfg Laminated board for testing electronic components
US5030905A (en) * 1989-06-06 1991-07-09 Hewlett-Packard Company Below a minute burn-in
JPH03146884A (ja) * 1989-11-02 1991-06-21 Mitsubishi Electric Corp バーンイン装置
US4985988A (en) * 1989-11-03 1991-01-22 Motorola, Inc. Method for assembling, testing, and packaging integrated circuits
US5086271A (en) * 1990-01-12 1992-02-04 Reliability Incorporated Driver system and distributed transmission line network for driving devices under test
JP2830269B2 (ja) * 1990-01-12 1998-12-02 ソニー株式会社 ディスク装置
US5200885A (en) * 1990-04-26 1993-04-06 Micro Control Company Double burn-in board assembly
US5157829A (en) * 1990-10-02 1992-10-27 Outboard Marine Corporation Method of burn-in testing of circuitry
JP2746763B2 (ja) * 1991-02-18 1998-05-06 シャープ株式会社 バーンイン装置およびこれを用いるバーンイン方法
US5265099A (en) * 1991-02-28 1993-11-23 Feinstein David Y Method for heating dynamic memory units whereby
US5315598A (en) * 1991-04-04 1994-05-24 Texas Instruments Incorporated Method to reduce burn-in time and inducing infant failure
JP2862154B2 (ja) * 1991-07-22 1999-02-24 富士通株式会社 バーンイン装置
US5391984A (en) * 1991-11-01 1995-02-21 Sgs-Thomson Microelectronics, Inc. Method and apparatus for testing integrated circuit devices
US5353254A (en) * 1992-05-21 1994-10-04 Texas Instruments Incorporated Semiconductor memory device having burn-in test circuit
US5390129A (en) * 1992-07-06 1995-02-14 Motay Electronics, Inc. Universal burn-in driver system and method therefor
US5339028A (en) * 1992-07-23 1994-08-16 Texas Instruments Incorporated Test circuit for screening parts
US5402078A (en) * 1992-10-13 1995-03-28 Micro Control Company Interconnection system for burn-in boards
ES2129530T3 (es) * 1993-02-10 1999-06-16 Sieba Ag Dispositivo para el ensayo de modulos.
IT1261411B (it) * 1993-03-12 1996-05-23 Texas Instruments Italia Spa Metodo e circuiteria per l'uso di memorie aventi locazioni difettose erelativa apparecchiatura di produzione.
US5375091A (en) * 1993-12-08 1994-12-20 International Business Machines Corporation Method and apparatus for memory dynamic burn-in and test
US5528161A (en) * 1994-09-15 1996-06-18 Venturedyne Limited Through-port load carrier and related test apparatus
US5538141A (en) * 1994-09-27 1996-07-23 Intel Corporation Test flow assurance using memory imprinting
US5724365A (en) * 1996-05-24 1998-03-03 Advanced Micro Devices, Inc. Method of utilizing redundancy testing to substitute for main array programming and AC speed reads
US5927512A (en) 1997-01-17 1999-07-27 Micron Technology, Inc. Method for sorting integrated circuit devices
US6100486A (en) * 1998-08-13 2000-08-08 Micron Technology, Inc. Method for sorting integrated circuit devices
US5844803A (en) 1997-02-17 1998-12-01 Micron Technology, Inc. Method of sorting a group of integrated circuit devices for those devices requiring special testing
US5915231A (en) 1997-02-26 1999-06-22 Micron Technology, Inc. Method in an integrated circuit (IC) manufacturing process for identifying and redirecting IC's mis-processed during their manufacture
US5856923A (en) * 1997-03-24 1999-01-05 Micron Technology, Inc. Method for continuous, non lot-based integrated circuit manufacturing
US5883844A (en) * 1997-05-23 1999-03-16 Stmicroelectronics, Inc. Method of stress testing integrated circuit having memory and integrated circuit having stress tester for memory thereof
US7120513B1 (en) 1997-06-06 2006-10-10 Micron Technology, Inc. Method for using data regarding manufacturing procedures integrated circuits (ICS) have undergone, such as repairs, to select procedures the ICS will undergo, such as additional repairs
US5907492A (en) * 1997-06-06 1999-05-25 Micron Technology, Inc. Method for using data regarding manufacturing procedures integrated circuits (IC's) have undergone, such as repairs, to select procedures the IC's will undergo, such as additional repairs
US5940466A (en) * 1997-10-29 1999-08-17 Micron Electronics, Inc. Apparatus for counting parts in a tray
US5998751A (en) * 1998-02-20 1999-12-07 Micron Electronics, Inc. Sorting system for computer chips
US5996996A (en) * 1998-02-20 1999-12-07 Micron Electronics, Inc. Method of sorting computer chips
US6049624A (en) 1998-02-20 2000-04-11 Micron Technology, Inc. Non-lot based method for assembling integrated circuit devices
US6512392B2 (en) 1998-04-17 2003-01-28 International Business Machines Corporation Method for testing semiconductor devices
US6137301A (en) * 1998-05-11 2000-10-24 Vanguard International Semiconductor Company EPROM used as a voltage monitor for semiconductor burn-in
KR100269948B1 (ko) * 1998-08-07 2000-10-16 윤종용 반도체 번-인 공정의 반도체 디바이스 추출/삽입 및자동분류장치
US6563070B2 (en) 1999-03-30 2003-05-13 Micron Technology, Inc. Enhanced grading and sorting of semiconductor devices using modular “plug-in” sort algorithms
US6307388B1 (en) * 2000-02-23 2001-10-23 Unisys Corporation Electromechanical apparatus for testing IC chips using first and second sets of substrates which are pressed together
DE10036177C2 (de) * 2000-07-25 2002-07-11 Infineon Technologies Ag Verfahren zum Testen von Halbleitereinrichtungen
DE10115280C2 (de) * 2001-03-28 2003-12-24 Infineon Technologies Ag Verfahren zum Klassifizieren von Bauelementen
WO2007095974A1 (en) * 2006-02-24 2007-08-30 Freescale Semiconductor, Inc. Testing non-volatile memory devices for charge leakage
US8245388B2 (en) * 2008-06-16 2012-08-21 Data I/O Corporation Programmer actuator system and method of operation thereof
CN104062471B (zh) * 2014-06-30 2017-01-18 深圳市迈昂科技有限公司 一种灯具老化架、老化方法及老化监控***
JP6274128B2 (ja) * 2015-02-24 2018-02-07 株式会社Ｊｖｃケンウッド 不揮発性半導体記憶装置の評価方法、評価システム、及び評価プログラム
JP6274127B2 (ja) * 2015-02-24 2018-02-07 株式会社Ｊｖｃケンウッド 不揮発性半導体記憶装置の評価システム、評価方法、及び評価プログラム

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US3969618A (en) * 1974-11-29 1976-07-13 Xerox Corporation On line PROM handling system
NL7416755A (nl) * 1974-12-23 1976-06-25 Philips Nv Werkwijze en inrichting voor het testen van een digitaal geheugen.
US4379259A (en) * 1980-03-12 1983-04-05 National Semiconductor Corporation Process of performing burn-in and parallel functional testing of integrated circuit memories in an environmental chamber
JPS5853775A (ja) * 1981-09-26 1983-03-30 Fujitsu Ltd Ｉｃメモリ試験方法
US4636726A (en) * 1982-01-04 1987-01-13 Artronics Corporation Electronic burn-in system
US4578751A (en) * 1982-06-25 1986-03-25 At&T Technologies, Inc. System for simultaneously programming a number of EPROMs
JPS59121698A (ja) * 1982-12-21 1984-07-13 Fujitsu Ltd 消去可能読出し専用記憶素子の試験方法
JPS60145667A (ja) * 1984-01-09 1985-08-01 Mitsubishi Electric Corp 紫外線照射消去形不揮発性メモリの試験方法
DE8424493U1 (de) * 1984-08-16 1985-08-08 Brumm GmbH Elektronik-Gerätebau, 1000 Berlin Prüfadapter
FR2570232A1 (fr) * 1984-09-11 1986-03-14 Thomson Csf Dispositif de traduction de sequence de test en sequence de rodage pour circuit logique et/ou numerique, procede de rodage de circuit logique et/ou numerique et dispositif de rodage de circuit logique et/ou numerique
GB8425299D0 (en) * 1984-10-06 1984-11-14 Young D N Heating oven
GB2168802B (en) * 1984-10-06 1988-10-26 David Nicholas Young Heating oven and testing apparatus for semiconductors
US4713611A (en) * 1986-06-23 1987-12-15 Vtc Incorporated Burn-in apparatus for integrated circuits mounted on a carrier tape

Also Published As

Publication number Publication date
EP0254691A3 (en) 1990-02-14
IT1201837B (it) 1989-02-02
EP0254691A2 (en) 1988-01-27
JP2615058B2 (ja) 1997-05-28
JPS6352073A (ja) 1988-03-05
EP0254691B1 (en) 1993-06-16
US4871963A (en) 1989-10-03
US4799021A (en) 1989-01-17
DE3786203D1 (de) 1993-07-22
DE3786203T2 (de) 1993-09-23

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Legal Events

Date Code Title Description
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19970730