IT1167386B - Memoria ad accesso casuale dinamica a semiconduttori - Google Patents
Memoria ad accesso casuale dinamica a semiconduttoriInfo
- Publication number
- IT1167386B IT1167386B IT22792/83A IT2279283A IT1167386B IT 1167386 B IT1167386 B IT 1167386B IT 22792/83 A IT22792/83 A IT 22792/83A IT 2279283 A IT2279283 A IT 2279283A IT 1167386 B IT1167386 B IT 1167386B
- Authority
- IT
- Italy
- Prior art keywords
- random access
- access memory
- dynamic random
- semiconductor dynamic
- semiconductor
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4097—Bit-line organisation, e.g. bit-line layout, folded bit lines
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4091—Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Dram (AREA)
- Semiconductor Memories (AREA)
- Static Random-Access Memory (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57156662A JPS5948889A (ja) | 1982-09-10 | 1982-09-10 | Ｍｏｓ記憶装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| IT8322792A0 IT8322792A0 (it) | 1983-09-06 |
| IT8322792A1 IT8322792A1 (it) | 1985-03-06 |
| IT1167386B true IT1167386B (it) | 1987-05-13 |
Family
ID=15632554
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| IT22792/83A IT1167386B (it) | 1982-09-10 | 1983-09-06 | Memoria ad accesso casuale dinamica a semiconduttori |
Country Status (6)
| Country | Link |
|---|---|
| JP (1) | JPS5948889A (it) |
| KR (1) | KR840005884A (it) |
| DE (1) | DE3332481A1 (it) |
| FR (1) | FR2533061A1 (it) |
| GB (1) | GB2127246B (it) |
| IT (1) | IT1167386B (it) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61104395A (ja) * | 1984-10-22 | 1986-05-22 | Nec Ic Microcomput Syst Ltd | ダイナミック型半導体記憶装置 |
| JPS6364695A (ja) * | 1986-09-04 | 1988-03-23 | Fujitsu Ltd | 半導体集積回路 |
| JPH07118193B2 (ja) * | 1986-09-18 | 1995-12-18 | 富士通株式会社 | 半導体記憶装置 |
| JPH07107797B2 (ja) * | 1987-02-10 | 1995-11-15 | 三菱電機株式会社 | ダイナミツクランダムアクセスメモリ |
| KR910009551B1 (ko) * | 1988-06-07 | 1991-11-21 | 삼성전자 주식회사 | 메모리장치의 센스앰프 분할 제어회로 |
| JP2878713B2 (ja) * | 1989-06-13 | 1999-04-05 | 株式会社東芝 | 半導体記憶装置 |
| KR940007639B1 (ko) * | 1991-07-23 | 1994-08-22 | 삼성전자 주식회사 | 분할된 입출력 라인을 갖는 데이타 전송회로 |
| KR0179097B1 (ko) * | 1995-04-07 | 1999-04-15 | 김주용 | 데이타 리드/라이트 방법 및 장치 |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4061999A (en) * | 1975-12-29 | 1977-12-06 | Mostek Corporation | Dynamic random access memory system |
| DE2743662A1 (de) * | 1977-09-28 | 1979-04-05 | Siemens Ag | Ein-transistor-speicherelement und verfahren zu seiner herstellung |
| US4241425A (en) * | 1979-02-09 | 1980-12-23 | Bell Telephone Laboratories, Incorporated | Organization for dynamic random access memory |
| JPS5616992A (en) * | 1979-07-20 | 1981-02-18 | Hitachi Ltd | Signal readout circuit |
| JPS6027119B2 (ja) * | 1980-04-22 | 1985-06-27 | 株式会社東芝 | 半導体メモリ |
| US4556961A (en) * | 1981-05-26 | 1985-12-03 | Tokyo Shibaura Denki Kabushiki Kaisha | Semiconductor memory with delay means to reduce peak currents |
-
1982
- 1982-09-10 JP JP57156662A patent/JPS5948889A/ja active Pending
-
1983
- 1983-05-31 FR FR8308994A patent/FR2533061A1/fr active Pending
- 1983-06-24 KR KR1019830002856A patent/KR840005884A/ko not_active Application Discontinuation
- 1983-06-30 GB GB08317749A patent/GB2127246B/en not_active Expired
- 1983-09-06 IT IT22792/83A patent/IT1167386B/it active
- 1983-09-08 DE DE19833332481 patent/DE3332481A1/de not_active Withdrawn
Also Published As
| Publication number | Publication date |
|---|---|
| IT8322792A0 (it) | 1983-09-06 |
| IT8322792A1 (it) | 1985-03-06 |
| GB2127246B (en) | 1985-12-11 |
| FR2533061A1 (fr) | 1984-03-16 |
| JPS5948889A (ja) | 1984-03-21 |
| DE3332481A1 (de) | 1984-03-15 |
| GB8317749D0 (en) | 1983-08-03 |
| KR840005884A (ko) | 1984-11-19 |
| GB2127246A (en) | 1984-04-04 |
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