IT8067197A0 - Dispositivo di memoria dinamica ad accesso casuale - Google Patents

Dispositivo di memoria dinamica ad accesso casuale

Info

Publication number
IT8067197A0
IT8067197A0 IT8067197A IT6719780A IT8067197A0 IT 8067197 A0 IT8067197 A0 IT 8067197A0 IT 8067197 A IT8067197 A IT 8067197A IT 6719780 A IT6719780 A IT 6719780A IT 8067197 A0 IT8067197 A0 IT 8067197A0
Authority
IT
Italy
Prior art keywords
memory device
random access
dynamic memory
access dynamic
random
Prior art date
Application number
IT8067197A
Other languages
English (en)
Inventor
Ronald Paul Cenker
Donald Gordon Clemons
William Richard Huber Terzo
Frank John Procyk
Original Assignee
Western Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Western Electric Co filed Critical Western Electric Co
Publication of IT8067197A0 publication Critical patent/IT8067197A0/it

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408—Address circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
IT8067197A 1979-02-09 1980-02-08 Dispositivo di memoria dinamica ad accesso casuale IT8067197A0 (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/010,839 US4241425A (en) 1979-02-09 1979-02-09 Organization for dynamic random access memory

Publications (1)

Publication Number Publication Date
IT8067197A0 true IT8067197A0 (it) 1980-02-08

Family

ID=21747691

Family Applications (1)

Application Number Title Priority Date Filing Date
IT8067197A IT8067197A0 (it) 1979-02-09 1980-02-08 Dispositivo di memoria dinamica ad accesso casuale

Country Status (6)

Country Link
US (1) US4241425A (it)
EP (1) EP0023519A4 (it)
JP (1) JPS55501195A (it)
CA (1) CA1133635A (it)
IT (1) IT8067197A0 (it)
WO (1) WO1980001733A1 (it)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55135392A (en) * 1979-04-04 1980-10-22 Nec Corp Memory circuit
JPH0632217B2 (ja) * 1981-06-29 1994-04-27 富士通株式会社 半導体記憶装置
JPS58147884A (ja) * 1982-02-26 1983-09-02 Toshiba Corp ダイナミック型半導体記憶装置
JPS5948889A (ja) * 1982-09-10 1984-03-21 Hitachi Ltd Ｍｏｓ記憶装置
JPS5990291A (ja) * 1982-11-16 1984-05-24 Nec Corp メモリ
USRE33266E (en) * 1982-11-24 1990-07-17 American Telephone And Telegraph Company, At&T Bell Laboratories Folded bit line memory with one decoder per pair of spare rows
US4599709A (en) * 1984-02-17 1986-07-08 At&T Bell Laboratories Byte organized static memory
US4663742A (en) * 1984-10-30 1987-05-05 International Business Machines Corporation Directory memory system having simultaneous write, compare and bypass capabilites
JPS61199297A (ja) * 1985-02-28 1986-09-03 Toshiba Corp 半導体記憶装置
US4636990A (en) * 1985-05-31 1987-01-13 International Business Machines Corporation Three state select circuit for use in a data processing system or the like
US4725987A (en) * 1985-10-23 1988-02-16 Eastman Kodak Company Architecture for a fast frame store using dynamic RAMS
US4691303A (en) * 1985-10-31 1987-09-01 Sperry Corporation Refresh system for multi-bank semiconductor memory
DE3704777C1 (de) * 1987-02-16 1988-04-07 Ant Nachrichtentech Verfahren zum UEbertragen und zum Wiedergeben von Fernsehbildsequenzen
JP2742719B2 (ja) * 1990-02-16 1998-04-22 三菱電機株式会社 半導体記憶装置
EP0895162A3 (en) * 1992-01-22 1999-11-10 Enhanced Memory Systems, Inc. Enhanced dram with embedded registers
JP3305056B2 (ja) * 1993-08-31 2002-07-22 沖電気工業株式会社 ダイナミックｒａｍ
KR100270006B1 (ko) * 1996-12-23 2000-12-01 포만 제프리 엘 다수의액세스값을기억하고액세스하기위한장치및그복원방법
US6072735A (en) * 1998-06-22 2000-06-06 Lucent Technologies, Inc. Built-in redundancy architecture for computer memories
JP4721776B2 (ja) * 2004-07-13 2011-07-13 ルネサスエレクトロニクス株式会社 半導体記憶装置

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3737879A (en) * 1972-01-05 1973-06-05 Mos Technology Inc Self-refreshing memory
US3801964A (en) * 1972-02-24 1974-04-02 Advanced Memory Sys Inc Semiconductor memory with address decoding
US3719932A (en) * 1972-04-27 1973-03-06 Sperry Rand Corp Bit organized integrated mnos memory circuit with dynamic decoding and store-restore circuitry
US3811117A (en) * 1972-10-19 1974-05-14 Ibm Time ordered memory system and operation
US3858184A (en) * 1973-01-22 1974-12-31 Monolithic Syst Corp Automatic non-interrupting refresh technique
US3846765A (en) * 1973-02-14 1974-11-05 Monolithic Syst Corp Dynamic cell semiconductor memory with interlace refresh
IT1041882B (it) * 1975-08-20 1980-01-10 Honeywell Inf Systems Memoria dinamica a semiconduttori e relativo sistema di recarica
US4183096A (en) * 1978-05-25 1980-01-08 Bell Telephone Laboratories, Incorporated Self checking dynamic memory system

Also Published As

Publication number Publication date
EP0023519A1 (en) 1981-02-11
US4241425A (en) 1980-12-23
WO1980001733A1 (en) 1980-08-21
JPS55501195A (it) 1980-12-25
EP0023519A4 (en) 1982-09-03
CA1133635A (en) 1982-10-12

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