JPS5616992A - Signal readout circuit - Google Patents

Signal readout circuit

Info

Publication number
JPS5616992A
JPS5616992A JP9155379A JP9155379A JPS5616992A JP S5616992 A JPS5616992 A JP S5616992A JP 9155379 A JP9155379 A JP 9155379A JP 9155379 A JP9155379 A JP 9155379A JP S5616992 A JPS5616992 A JP S5616992A
Authority
JP
Japan
Prior art keywords
detection circuit
circuit consisting
signal
fed
controlled
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9155379A
Other languages
Japanese (ja)
Inventor
Shunei Araki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP9155379A priority Critical patent/JPS5616992A/en
Publication of JPS5616992A publication Critical patent/JPS5616992A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G11C7/062—Differential amplifiers of non-latching type, e.g. comparators, long-tailed pairs

Landscapes

  • Static Random-Access Memory (AREA)

Abstract

PURPOSE:To quicken the operating speed of signal readout from the memory, by cascade connection of the detection circuit consisting of MISFET. CONSTITUTION:The signals at the input lines CD1, CD2 are made to opposite phase each other according to the memory information of the selected memory cell and fed to the first detection circuit consisting of MISFETQ20-Q24. The operation level of the first detection circuit is controlled with the control circuit consisting of Q25, Q26 and turned on or off with the Q44, Q45 performing switching operation according to the high or low level of signal on the control line CSX. After the output is controlled and amplified wih the 2nd detection circuit consisting of Q27-Q31 the same as the 1st detection circuit, it is fed to the 3rd detection circuit consisting of Q34-Q37 to constitute the signal where high or low level can clearly be distincted, and fed to the 4th detection circuit consisting of Q38-Q41, to obtain the readout signal at the output OUT.
JP9155379A 1979-07-20 1979-07-20 Signal readout circuit Pending JPS5616992A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9155379A JPS5616992A (en) 1979-07-20 1979-07-20 Signal readout circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9155379A JPS5616992A (en) 1979-07-20 1979-07-20 Signal readout circuit

Publications (1)

Publication Number Publication Date
JPS5616992A true JPS5616992A (en) 1981-02-18

Family

ID=14029683

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9155379A Pending JPS5616992A (en) 1979-07-20 1979-07-20 Signal readout circuit

Country Status (1)

Country Link
JP (1) JPS5616992A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2506057A1 (en) * 1981-05-13 1982-11-19 Hitachi Ltd SEMICONDUCTOR MEMORY
FR2533061A1 (en) * 1982-09-10 1984-03-16 Hitachi Ltd SEMICONDUCTOR MEMORY
EP0136229A2 (en) * 1983-09-17 1985-04-03 Fujitsu Limited Sense amplifier
JPH06302192A (en) * 1990-12-12 1994-10-28 Samsung Electron Co Ltd Differential sense amplifier circuit
US6563867B2 (en) 1999-09-14 2003-05-13 Infineon Technologies Ag Arrangement for analyzing the nonlinear properties of a communication channel

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2506057A1 (en) * 1981-05-13 1982-11-19 Hitachi Ltd SEMICONDUCTOR MEMORY
FR2533061A1 (en) * 1982-09-10 1984-03-16 Hitachi Ltd SEMICONDUCTOR MEMORY
EP0136229A2 (en) * 1983-09-17 1985-04-03 Fujitsu Limited Sense amplifier
JPH06302192A (en) * 1990-12-12 1994-10-28 Samsung Electron Co Ltd Differential sense amplifier circuit
US6563867B2 (en) 1999-09-14 2003-05-13 Infineon Technologies Ag Arrangement for analyzing the nonlinear properties of a communication channel

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