IT1167386B - SEMICONDUCTOR DYNAMIC RANDOM ACCESS MEMORY - Google Patents

SEMICONDUCTOR DYNAMIC RANDOM ACCESS MEMORY

Info

Publication number
IT1167386B
IT1167386B IT22792/83A IT2279283A IT1167386B IT 1167386 B IT1167386 B IT 1167386B IT 22792/83 A IT22792/83 A IT 22792/83A IT 2279283 A IT2279283 A IT 2279283A IT 1167386 B IT1167386 B IT 1167386B
Authority
IT
Italy
Prior art keywords
random access
access memory
dynamic random
semiconductor dynamic
semiconductor
Prior art date
Application number
IT22792/83A
Other languages
Italian (it)
Other versions
IT8322792A1 (en
IT8322792A0 (en
Inventor
Yamaguchi Yasunori
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of IT8322792A0 publication Critical patent/IT8322792A0/en
Publication of IT8322792A1 publication Critical patent/IT8322792A1/en
Application granted granted Critical
Publication of IT1167386B publication Critical patent/IT1167386B/en

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409Read-write [R-W] circuits 
    • G11C11/4097Bit-line organisation, e.g. bit-line layout, folded bit lines
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409Read-write [R-W] circuits 
    • G11C11/4091Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Dram (AREA)
  • Semiconductor Memories (AREA)
  • Static Random-Access Memory (AREA)
IT22792/83A 1982-09-10 1983-09-06 SEMICONDUCTOR DYNAMIC RANDOM ACCESS MEMORY IT1167386B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57156662A JPS5948889A (en) 1982-09-10 1982-09-10 Mos storage device

Publications (3)

Publication Number Publication Date
IT8322792A0 IT8322792A0 (en) 1983-09-06
IT8322792A1 IT8322792A1 (en) 1985-03-06
IT1167386B true IT1167386B (en) 1987-05-13

Family

ID=15632554

Family Applications (1)

Application Number Title Priority Date Filing Date
IT22792/83A IT1167386B (en) 1982-09-10 1983-09-06 SEMICONDUCTOR DYNAMIC RANDOM ACCESS MEMORY

Country Status (6)

Country Link
JP (1) JPS5948889A (en)
KR (1) KR840005884A (en)
DE (1) DE3332481A1 (en)
FR (1) FR2533061A1 (en)
GB (1) GB2127246B (en)
IT (1) IT1167386B (en)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61104395A (en) * 1984-10-22 1986-05-22 Nec Ic Microcomput Syst Ltd Dynamic type semiconductor storage device
JPS6364695A (en) * 1986-09-04 1988-03-23 Fujitsu Ltd Semiconductor integrated circuit
JPH07118193B2 (en) * 1986-09-18 1995-12-18 富士通株式会社 Semiconductor memory device
JPH07107797B2 (en) * 1987-02-10 1995-11-15 三菱電機株式会社 Dynamic random access memory
KR910009551B1 (en) * 1988-06-07 1991-11-21 삼성전자 주식회사 Divided control circuit of sense amp for memory device
JP2878713B2 (en) * 1989-06-13 1999-04-05 株式会社東芝 Semiconductor storage device
KR940007639B1 (en) * 1991-07-23 1994-08-22 삼성전자 주식회사 Data transmitting circuit having divided input/output line
KR0179097B1 (en) * 1995-04-07 1999-04-15 김주용 Data read and write method

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4061999A (en) * 1975-12-29 1977-12-06 Mostek Corporation Dynamic random access memory system
DE2743662A1 (en) * 1977-09-28 1979-04-05 Siemens Ag A TRANSISTOR MEMORY ELEMENT AND METHOD FOR ITS MANUFACTURING
US4241425A (en) * 1979-02-09 1980-12-23 Bell Telephone Laboratories, Incorporated Organization for dynamic random access memory
JPS5616992A (en) * 1979-07-20 1981-02-18 Hitachi Ltd Signal readout circuit
JPS6027119B2 (en) * 1980-04-22 1985-06-27 株式会社東芝 semiconductor memory
US4556961A (en) * 1981-05-26 1985-12-03 Tokyo Shibaura Denki Kabushiki Kaisha Semiconductor memory with delay means to reduce peak currents

Also Published As

Publication number Publication date
JPS5948889A (en) 1984-03-21
KR840005884A (en) 1984-11-19
GB2127246A (en) 1984-04-04
DE3332481A1 (en) 1984-03-15
GB8317749D0 (en) 1983-08-03
GB2127246B (en) 1985-12-11
IT8322792A1 (en) 1985-03-06
IT8322792A0 (en) 1983-09-06
FR2533061A1 (en) 1984-03-16

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