FR2822293B1 - Transistor a effet de champ et double grille, circuit integre comportant ce transistor, et procede de fabrication de ce dernier - Google Patents

Transistor a effet de champ et double grille, circuit integre comportant ce transistor, et procede de fabrication de ce dernier

Info

Publication number
FR2822293B1
FR2822293B1 FR0203114A FR0203114A FR2822293B1 FR 2822293 B1 FR2822293 B1 FR 2822293B1 FR 0203114 A FR0203114 A FR 0203114A FR 0203114 A FR0203114 A FR 0203114A FR 2822293 B1 FR2822293 B1 FR 2822293B1
Authority
FR
France
Prior art keywords
transistor
manufacturing
integrated circuit
field effect
same
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0203114A
Other languages
English (en)
Other versions
FR2822293A1 (fr
Inventor
Toshihiro Sekigawa
Kenichi Ishii
Eiichi Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
National Institute of Advanced Industrial Science and Technology AIST
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP2001069779A external-priority patent/JP3488916B2/ja
Priority claimed from JP2001069673A external-priority patent/JP3543117B2/ja
Application filed by National Institute of Advanced Industrial Science and Technology AIST filed Critical National Institute of Advanced Industrial Science and Technology AIST
Publication of FR2822293A1 publication Critical patent/FR2822293A1/fr
Application granted granted Critical
Publication of FR2822293B1 publication Critical patent/FR2822293B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/785—Field effect transistors with field effect produced by an insulated gate having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42384—Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66545—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66787—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel
    • H01L29/66795—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66787—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel
    • H01L29/66795—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
    • H01L29/66818—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET the channel being thinned after patterning, e.g. sacrificial oxidation on fin

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Thin Film Transistor (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
FR0203114A 2001-03-13 2002-03-13 Transistor a effet de champ et double grille, circuit integre comportant ce transistor, et procede de fabrication de ce dernier Expired - Fee Related FR2822293B1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2001069779A JP3488916B2 (ja) 2001-03-13 2001-03-13 半導体装置の製造方法
JP2001069673A JP3543117B2 (ja) 2001-03-13 2001-03-13 二重ゲート電界効果トランジスタ

Publications (2)

Publication Number Publication Date
FR2822293A1 FR2822293A1 (fr) 2002-09-20
FR2822293B1 true FR2822293B1 (fr) 2007-03-23

Family

ID=26611110

Family Applications (2)

Application Number Title Priority Date Filing Date
FR0203114A Expired - Fee Related FR2822293B1 (fr) 2001-03-13 2002-03-13 Transistor a effet de champ et double grille, circuit integre comportant ce transistor, et procede de fabrication de ce dernier
FR0207940A Expired - Fee Related FR2825834B1 (fr) 2001-03-13 2002-06-26 Procede de fabrication d'un disositif a semi-conducteur

Family Applications After (1)

Application Number Title Priority Date Filing Date
FR0207940A Expired - Fee Related FR2825834B1 (fr) 2001-03-13 2002-06-26 Procede de fabrication d'un disositif a semi-conducteur

Country Status (2)

Country Link
US (2) US6630388B2 (fr)
FR (2) FR2822293B1 (fr)

Families Citing this family (76)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040162468A1 (en) * 2000-09-18 2004-08-19 Photonify Technologies, Inc. Absolute oxygen saturation for monitoring tissue viability
US6906344B2 (en) 2001-05-24 2005-06-14 Semiconductor Energy Laboratory Co., Ltd. Thin film transistor with plural channels and corresponding plural overlapping electrodes
US7358121B2 (en) * 2002-08-23 2008-04-15 Intel Corporation Tri-gate devices and methods of fabrication
DE10245153A1 (de) * 2002-09-27 2004-04-15 Infineon Technologies Ag Integrierter Feldeffekttransistor mit zwei Steuerbereichen, Verwendung dieses Feldeffekttranistors und Herstellungsverfahren
US6611029B1 (en) * 2002-11-08 2003-08-26 Advanced Micro Devices, Inc. Double gate semiconductor device having separate gates
US6762483B1 (en) * 2003-01-23 2004-07-13 Advanced Micro Devices, Inc. Narrow fin FinFET
US6764884B1 (en) * 2003-04-03 2004-07-20 Advanced Micro Devices, Inc. Method for forming a gate in a FinFET device and thinning a fin in a channel region of the FinFET device
US6756643B1 (en) * 2003-06-12 2004-06-29 Advanced Micro Devices, Inc. Dual silicon layer for chemical mechanical polishing planarization
US7456476B2 (en) 2003-06-27 2008-11-25 Intel Corporation Nonplanar semiconductor device with partially or fully wrapped around gate electrode and methods of fabrication
US6909151B2 (en) * 2003-06-27 2005-06-21 Intel Corporation Nonplanar device with stress incorporation layer and method of fabrication
US6812119B1 (en) * 2003-07-08 2004-11-02 Advanced Micro Devices, Inc. Narrow fins by oxidation in double-gate finfet
US6970373B2 (en) * 2003-10-02 2005-11-29 Intel Corporation Method and apparatus for improving stability of a 6T CMOS SRAM cell
KR100578130B1 (ko) * 2003-10-14 2006-05-10 삼성전자주식회사 핀 전계효과 트랜지스터를 위한 다중 실리콘 핀 및 그형성 방법
US7029958B2 (en) * 2003-11-04 2006-04-18 Advanced Micro Devices, Inc. Self aligned damascene gate
US6967175B1 (en) 2003-12-04 2005-11-22 Advanced Micro Devices, Inc. Damascene gate semiconductor processing with local thinning of channel region
KR100513405B1 (ko) * 2003-12-16 2005-09-09 삼성전자주식회사 핀 트랜지스터의 형성 방법
US7624192B2 (en) * 2003-12-30 2009-11-24 Microsoft Corporation Framework for user interaction with multiple network devices
US7105390B2 (en) * 2003-12-30 2006-09-12 Intel Corporation Nonplanar transistors with metal gate electrodes
US7041542B2 (en) * 2004-01-12 2006-05-09 Advanced Micro Devices, Inc. Damascene tri-gate FinFET
US7186599B2 (en) * 2004-01-12 2007-03-06 Advanced Micro Devices, Inc. Narrow-body damascene tri-gate FinFET
US7268058B2 (en) * 2004-01-16 2007-09-11 Intel Corporation Tri-gate transistors and methods to fabricate same
US7154118B2 (en) * 2004-03-31 2006-12-26 Intel Corporation Bulk non-planar transistor having strained enhanced mobility and methods of fabrication
JP4565097B2 (ja) * 2004-04-08 2010-10-20 独立行政法人産業技術総合研究所 二重ゲートｍｏｓトランジスタおよび二重ゲートｃｍｏｓトランジスタ、その製造方法
US7579280B2 (en) 2004-06-01 2009-08-25 Intel Corporation Method of patterning a film
US7319252B2 (en) * 2004-06-28 2008-01-15 Intel Corporation Methods for forming semiconductor wires and resulting devices
US7042009B2 (en) 2004-06-30 2006-05-09 Intel Corporation High mobility tri-gate devices and methods of fabrication
US7348284B2 (en) * 2004-08-10 2008-03-25 Intel Corporation Non-planar pMOS structure with a strained channel region and an integrated strained CMOS flow
US7071064B2 (en) * 2004-09-23 2006-07-04 Intel Corporation U-gate transistors and methods of fabrication
US7422946B2 (en) * 2004-09-29 2008-09-09 Intel Corporation Independently accessed double-gate and tri-gate transistors in same process flow
US7332439B2 (en) 2004-09-29 2008-02-19 Intel Corporation Metal gate transistors with epitaxial source and drain regions
US7361958B2 (en) * 2004-09-30 2008-04-22 Intel Corporation Nonplanar transistors with metal gate electrodes
JP4249684B2 (ja) * 2004-10-06 2009-04-02 株式会社東芝 半導体記憶装置
US20060086977A1 (en) 2004-10-25 2006-04-27 Uday Shah Nonplanar device with thinned lower body portion and method of fabrication
US7196380B2 (en) * 2005-01-13 2007-03-27 International Business Machines Corporation High mobility plane FinFET with equal drive strength
US7193279B2 (en) * 2005-01-18 2007-03-20 Intel Corporation Non-planar MOS structure with a strained channel region
EP1844498B1 (fr) * 2005-01-28 2012-03-14 Nxp B.V. Procédé pour produire un transistor à effet de champ à deux grilles
US7518196B2 (en) 2005-02-23 2009-04-14 Intel Corporation Field effect transistor with narrow bandgap source and drain regions and method of fabrication
US20060202266A1 (en) 2005-03-14 2006-09-14 Marko Radosavljevic Field effect transistor with metal source/drain regions
CN100411143C (zh) * 2005-06-02 2008-08-13 中国科学院微电子研究所 与标准cmos工艺兼容的hvcmos双栅氧制备工艺
US7858481B2 (en) 2005-06-15 2010-12-28 Intel Corporation Method for fabricating transistor with thinned channel
US7547637B2 (en) 2005-06-21 2009-06-16 Intel Corporation Methods for patterning a semiconductor film
US7279375B2 (en) * 2005-06-30 2007-10-09 Intel Corporation Block contact architectures for nanoscale channel transistors
US7402875B2 (en) 2005-08-17 2008-07-22 Intel Corporation Lateral undercut of metal gate in SOI device
US20070090416A1 (en) * 2005-09-28 2007-04-26 Doyle Brian S CMOS devices with a single work function gate electrode and method of fabrication
US7479421B2 (en) 2005-09-28 2009-01-20 Intel Corporation Process for integrating planar and non-planar CMOS transistors on a bulk substrate and article made thereby
US7485503B2 (en) 2005-11-30 2009-02-03 Intel Corporation Dielectric interface for group III-V semiconductor device
US7402856B2 (en) * 2005-12-09 2008-07-22 Intel Corporation Non-planar microelectronic device having isolation element to mitigate fringe effects and method to fabricate same
US7439588B2 (en) * 2005-12-13 2008-10-21 Intel Corporation Tri-gate integration with embedded floating body memory cell using a high-K dual metal gate
US7512017B2 (en) * 2005-12-21 2009-03-31 Intel Corporation Integration of planar and tri-gate devices on the same substrate
US7525160B2 (en) 2005-12-27 2009-04-28 Intel Corporation Multigate device with recessed strain regions
US7396711B2 (en) 2005-12-27 2008-07-08 Intel Corporation Method of fabricating a multi-cornered film
US20070148926A1 (en) * 2005-12-28 2007-06-28 Intel Corporation Dual halo implant for improving short channel effect in three-dimensional tri-gate transistors
US20070235763A1 (en) * 2006-03-29 2007-10-11 Doyle Brian S Substrate band gap engineered multi-gate pMOS devices
US7407847B2 (en) * 2006-03-31 2008-08-05 Intel Corporation Stacked multi-gate transistor design and method of fabrication
US7425500B2 (en) * 2006-03-31 2008-09-16 Intel Corporation Uniform silicide metal on epitaxially grown source and drain regions of three-dimensional transistors
US7449373B2 (en) 2006-03-31 2008-11-11 Intel Corporation Method of ion implanting for tri-gate devices
US8143646B2 (en) 2006-08-02 2012-03-27 Intel Corporation Stacking fault and twin blocking barrier for integrating III-V on Si
US7435683B2 (en) * 2006-09-15 2008-10-14 Intel Corporation Apparatus and method for selectively recessing spacers on multi-gate devices
US20080097346A1 (en) * 2006-09-19 2008-04-24 Alcon, Inc. Trocar cannula
US7700470B2 (en) 2006-09-22 2010-04-20 Intel Corporation Selective anisotropic wet etching of workfunction metal for semiconductor devices
US8040717B2 (en) * 2006-12-28 2011-10-18 National Institute Of Advanced Industrial Science And Technology SRAM cell and SRAM device
FR2911004B1 (fr) * 2006-12-28 2009-05-15 Commissariat Energie Atomique Procede de realisation de transistors a double-grille asymetriques permettant la realisation de transistors a double-grille asymetriques et symetriques sur un meme substrat
US7772048B2 (en) * 2007-02-23 2010-08-10 Freescale Semiconductor, Inc. Forming semiconductor fins using a sacrificial fin
JP4415112B2 (ja) * 2007-05-29 2010-02-17 独立行政法人産業技術総合研究所 電界効果トランジスタ及びこれを含む集積回路
EP2191498B1 (fr) * 2007-09-12 2014-07-02 Arizona Board Of Regents For And On Behalf Of Arizona State University Transistor à effet de champ metal-semi-conducteur appauvri horizontalement
EP2229723A1 (fr) * 2007-12-11 2010-09-22 Cornell University Transistor et oscillateur à corps résonant
WO2009116015A1 (fr) * 2008-03-20 2009-09-24 Nxp B.V. Transistor finfet à capacité haute tension et procédé compatible cmos pour sa fabrication
JP5553266B2 (ja) 2008-06-09 2014-07-16 独立行政法人産業技術総合研究所 ナノワイヤ電界効果トランジスタの作製方法
US8362566B2 (en) 2008-06-23 2013-01-29 Intel Corporation Stress in trigate devices using complimentary gate fill materials
US20100155801A1 (en) * 2008-12-22 2010-06-24 Doyle Brian S Integrated circuit, 1T-1C embedded memory cell containing same, and method of manufacturing 1T-1C memory cell for embedded memory application
KR101104248B1 (ko) * 2008-12-23 2012-01-11 한국전자통신연구원 자기 정렬 전계 효과 트랜지스터 구조체
US7999298B2 (en) * 2008-12-30 2011-08-16 Intel Corporation Embedded memory cell and method of manufacturing same
WO2011013298A1 (fr) 2009-07-29 2011-02-03 独立行政法人産業技術総合研究所 Cellule sram
EP2791974A4 (fr) 2011-12-14 2015-08-05 Qualcomm Inc Arrondissement de la gâchette pour courant de fuite de transistor réduit
US9502408B2 (en) * 2013-11-14 2016-11-22 Globalfoundries Inc. FinFET device including fins having a smaller thickness in a channel region, and a method of manufacturing same
CN114823861B (zh) * 2022-04-12 2023-04-28 电子科技大学 一种漏区自对准垂直沟道mos集成电路单元结构及其实现方法

Family Cites Families (34)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB936858A (en) * 1958-12-31 1963-09-18 Du Pont Improvements relating to ethylene terephthalate polyesters
JPH069245B2 (ja) 1987-07-23 1994-02-02 工業技術院長 電界効果型半導体装置
US4900396A (en) * 1987-08-19 1990-02-13 Agency Of Industrial Science And Technology Method of forming modified layer and pattern
JPH0214578A (ja) 1988-07-01 1990-01-18 Fujitsu Ltd 半導体装置
US5315143A (en) * 1992-04-28 1994-05-24 Matsushita Electric Industrial Co., Ltd. High density integrated semiconductor device
JP3128364B2 (ja) 1992-11-13 2001-01-29 新日本製鐵株式会社 半導体装置及びその製造方法
US5324673A (en) * 1992-11-19 1994-06-28 Motorola, Inc. Method of formation of vertical transistor
US5324960A (en) * 1993-01-19 1994-06-28 Motorola, Inc. Dual-transistor structure and method of formation
JP3252578B2 (ja) 1993-12-27 2002-02-04 ソニー株式会社 平面型絶縁ゲート電界効果トランジスタの製法
FR2720191B1 (fr) * 1994-05-18 1996-10-18 Michel Haond Transistor à effet de champ à grille isolée, et procédé de fabrication correspondant.
JP2747223B2 (ja) * 1994-06-27 1998-05-06 日本電気アイシーマイコンシステム株式会社 半導体集積回路
US5705405A (en) * 1994-09-30 1998-01-06 Sgs-Thomson Microelectronics, Inc. Method of making the film transistor with all-around gate electrode
KR0151197B1 (ko) * 1994-11-21 1998-10-01 문정환 반도체 메모리장치 및 그 제조방법
US5512517A (en) * 1995-04-25 1996-04-30 International Business Machines Corporation Self-aligned gate sidewall spacer in a corrugated FET and method of making same
JP3409542B2 (ja) * 1995-11-21 2003-05-26 ソニー株式会社 半導体装置の製造方法
US5773317A (en) * 1995-12-15 1998-06-30 Vlsi Technology Inc. Test structure and method for determining metal-oxide-silicon field effect transistor fringing capacitance
JPH09293793A (ja) * 1996-04-26 1997-11-11 Mitsubishi Electric Corp 薄膜トランジスタを有する半導体装置およびその製造方法
JP3607431B2 (ja) 1996-09-18 2005-01-05 株式会社東芝 半導体装置およびその製造方法
US6118161A (en) * 1997-04-30 2000-09-12 Texas Instruments Incorporated Self-aligned trenched-channel lateral-current-flow transistor
US20010017392A1 (en) * 1997-05-19 2001-08-30 International Business Machines Corporation. Vertical transport MOSFETs and method for making the same
US5940698A (en) * 1997-12-01 1999-08-17 Advanced Micro Devices Method of making a semiconductor device having high performance gate electrode structure
TW396460B (en) * 1998-01-09 2000-07-01 United Microelectronics Corp Metal oxide semiconductor transistor structure and its manufacturing method
US6087225A (en) * 1998-02-05 2000-07-11 International Business Machines Corporation Method for dual gate oxide dual workfunction CMOS
US6358790B1 (en) * 1999-01-13 2002-03-19 Agere Systems Guardian Corp. Method of making a capacitor
US6297086B1 (en) * 1999-03-11 2001-10-02 International Business Machines Corporation Application of excimer laser anneal to DRAM processing
US6365465B1 (en) * 1999-03-19 2002-04-02 International Business Machines Corporation Self-aligned double-gate MOSFET by selective epitaxy and silicon wafer bonding techniques
US6245629B1 (en) * 1999-03-25 2001-06-12 Infineon Technologies North America Corp. Semiconductor structures and manufacturing methods
US6451652B1 (en) * 1999-09-15 2002-09-17 The John Millard And Pamela Ann Caywood 1989 Revocable Living Trust Method for forming an EEPROM cell together with transistor for peripheral circuits
US6429062B1 (en) * 1999-09-20 2002-08-06 Koninklike Philips Electronics N.V. Integrated-circuit manufacturing using high interstitial-recombination-rate blocking layer for source/drain extension implant
US6329290B1 (en) * 2000-02-24 2001-12-11 Conexant Systems, Inc. Method for fabrication and structure for high aspect ratio vias
US6399469B1 (en) * 2000-07-10 2002-06-04 Advanced Micro Devices, Inc. Fabrication of a notched gate structure for a field effect transistor using a single patterning and etch process
US6396108B1 (en) * 2000-11-13 2002-05-28 Advanced Micro Devices, Inc. Self-aligned double gate silicon-on-insulator (SOI) device
US6406962B1 (en) * 2001-01-17 2002-06-18 International Business Machines Corporation Vertical trench-formed dual-gate FET device structure and method for creation
US6583469B1 (en) * 2002-01-28 2003-06-24 International Business Machines Corporation Self-aligned dog-bone structure for FinFET applications and methods to fabricate the same

Also Published As

Publication number Publication date
US20020130354A1 (en) 2002-09-19
US6630388B2 (en) 2003-10-07
US20030122186A1 (en) 2003-07-03
US7061055B2 (en) 2006-06-13
FR2822293A1 (fr) 2002-09-20
FR2825834B1 (fr) 2007-04-13
FR2825834A1 (fr) 2002-12-13

Similar Documents

Publication Publication Date Title
FR2822293B1 (fr) Transistor a effet de champ et double grille, circuit integre comportant ce transistor, et procede de fabrication de ce dernier
FR2816109B1 (fr) Circuit integre a transistor a grille isolee et procede de fabrication
FR2812970B1 (fr) Transistor a effet de champ de type metal-oxyde-semiconducteur a sillicium sur isolant et son procede de fabrication
FR2823009B1 (fr) Procede de fabrication d'un transistor vertical a grille isolee a faible recouvrement de la grille sur la source et sur le drain, et circuit integre comportant un tel transistor
FR2838237B1 (fr) Procede de fabrication d'un transistor a effet de champ a grille isolee a canal contraint et circuit integre comprenant un tel transistor
FR2821209B1 (fr) Dispositif a semiconducteur a effet de champ et procede de fabrication
FR2823010B1 (fr) Procede de fabrication d'un transistor vertical a grille isolee a quadruple canal de conduction, et circuit integre comportant un tel transistor
FR2834575B1 (fr) Procede de modelisation et de realisation d'un circuit integre comportant au moins un transistor a effet de champ a grille isolee, et circuit integre correspondant
FR2831713B1 (fr) Dispositif a semi-conducteur et procede de fabrication
TWI350589B (en) A semiconductor device and a method of manufacturing the same
FR2834125B1 (fr) Dispositif a semi-conducteurs comportant un isolant en tranchee et procede pour la fabrication de ce dispositif
GB2366911B (en) Semiconductor device having desired gate profile and method of fabricating the same
GB2373922B (en) CMOS semiconductor device, and method of manufacturing the same
DE60019913D1 (de) Halbleiterbauelement und Herstellungsverfahren
SG118117A1 (en) Semiconductor device and manufacturing method thereof
SG120977A1 (en) High performance semiconductor devices fabricated with strain-induced processes and methods for making same
DE60230840D1 (de) Halbleiteranordnung und Herstellungsverfahren dafür
GB2393325B (en) Semiconductor device and manufacturing method thereof
FR2841381B1 (fr) Circuit integre a semi-conducteur et un procede de fabrication du circuit
DE60220762D1 (de) Halbleiterbauelement und zugehöriges Herstellungsverfahren
TWI339866B (en) A semiconductor device and a method of manufacturing the same
DE60210834D1 (de) Halbleiterbauelement und zugehöriges Herstellungsverfahren
GB2374705B (en) Semiconductor memory device and manufacturing method thereof
DE60134189D1 (de) Halbleiteranordnung und Herstellungsverfahren
EP1577938A4 (fr) Dispositif a semi-conducteur, dispositif de circuit a memoire vive dynamique integre, et son procede de fabrication

Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20121130