FR2838237B1 - Procede de fabrication d'un transistor a effet de champ a grille isolee a canal contraint et circuit integre comprenant un tel transistor - Google Patents

Procede de fabrication d'un transistor a effet de champ a grille isolee a canal contraint et circuit integre comprenant un tel transistor

Info

Publication number
FR2838237B1
FR2838237B1 FR0204165A FR0204165A FR2838237B1 FR 2838237 B1 FR2838237 B1 FR 2838237B1 FR 0204165 A FR0204165 A FR 0204165A FR 0204165 A FR0204165 A FR 0204165A FR 2838237 B1 FR2838237 B1 FR 2838237B1
Authority
FR
France
Prior art keywords
transistor
manufacturing
integrated circuit
field effect
effect transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0204165A
Other languages
English (en)
Other versions
FR2838237A1 (fr
Inventor
Thomas Skotnicki
Daniel Bensahel
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Priority to FR0204165A priority Critical patent/FR2838237B1/fr
Priority to US10/405,075 priority patent/US6989570B2/en
Publication of FR2838237A1 publication Critical patent/FR2838237A1/fr
Application granted granted Critical
Publication of FR2838237B1 publication Critical patent/FR2838237B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568Lateral single gate silicon transistors
    • H01L29/66651Lateral single gate silicon transistors with a single crystalline channel formed on the silicon substrate after insulating device isolation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0642Isolation within the component, i.e. internal isolation
    • H01L29/0649Dielectric regions, e.g. SiO2 regions, air gaps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/417Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
    • H01L29/41725Source or drain electrodes for field effect devices
    • H01L29/41775Source or drain electrodes for field effect devices characterised by the proximity or the relative position of the source or drain electrode and the gate electrode, e.g. the source or drain electrode separated from the gate electrode by side-walls or spreading around or above the gate electrode
    • H01L29/41783Raised source or drain electrodes self aligned with the gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742Thin film unipolar transistors
    • H01L29/66772Monocristalline silicon transistors on insulating substrates, e.g. quartz substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7842Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78618Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78639Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device with a drain or source connected to a bulk conducting substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78684Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising semiconductor materials of Group IV not being silicon, or alloys including an element of the group IV, e.g. Ge, SiN alloys, SiC alloys
    • H01L29/78687Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising semiconductor materials of Group IV not being silicon, or alloys including an element of the group IV, e.g. Ge, SiN alloys, SiC alloys with a multilayer structure or superlattice structure

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Thin Film Transistor (AREA)
FR0204165A 2002-04-03 2002-04-03 Procede de fabrication d'un transistor a effet de champ a grille isolee a canal contraint et circuit integre comprenant un tel transistor Expired - Fee Related FR2838237B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR0204165A FR2838237B1 (fr) 2002-04-03 2002-04-03 Procede de fabrication d'un transistor a effet de champ a grille isolee a canal contraint et circuit integre comprenant un tel transistor
US10/405,075 US6989570B2 (en) 2002-04-03 2003-03-31 Strained-channel isolated-gate field effect transistor, process for making same and resulting integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0204165A FR2838237B1 (fr) 2002-04-03 2002-04-03 Procede de fabrication d'un transistor a effet de champ a grille isolee a canal contraint et circuit integre comprenant un tel transistor

Publications (2)

Publication Number Publication Date
FR2838237A1 FR2838237A1 (fr) 2003-10-10
FR2838237B1 true FR2838237B1 (fr) 2005-02-25

Family

ID=28052089

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0204165A Expired - Fee Related FR2838237B1 (fr) 2002-04-03 2002-04-03 Procede de fabrication d'un transistor a effet de champ a grille isolee a canal contraint et circuit integre comprenant un tel transistor

Country Status (2)

Country Link
US (1) US6989570B2 (fr)
FR (1) FR2838237B1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
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US7700951B2 (en) 2003-11-05 2010-04-20 International Business Machines Corporation Method and structure for forming strained Si for CMOS devices

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US7074623B2 (en) * 2002-06-07 2006-07-11 Amberwave Systems Corporation Methods of forming strained-semiconductor-on-insulator finFET device structures
US7019326B2 (en) * 2003-11-14 2006-03-28 Intel Corporation Transistor with strain-inducing structure in channel
KR100521383B1 (ko) * 2003-11-17 2005-10-12 삼성전자주식회사 소자분리막 상에 형성된 소오스/드레인을 갖는 반도체소자 및 그 제조방법
KR100584776B1 (ko) * 2004-03-05 2006-05-29 삼성전자주식회사 반도체 장치의 액티브 구조물 형성 방법, 소자 분리 방법및 트랜지스터 형성 방법
US6881635B1 (en) * 2004-03-23 2005-04-19 International Business Machines Corporation Strained silicon NMOS devices with embedded source/drain
FR2872626B1 (fr) * 2004-07-05 2008-05-02 Commissariat Energie Atomique Procede pour contraindre un motif mince
US20060030093A1 (en) * 2004-08-06 2006-02-09 Da Zhang Strained semiconductor devices and method for forming at least a portion thereof
EP1638149B1 (fr) * 2004-09-15 2011-11-23 STMicroelectronics (Crolles 2) SAS Procédé de fabrication d'un transistor à effet de champ à grille isolée à canal à hétérostructure
US7358571B2 (en) * 2004-10-20 2008-04-15 Taiwan Semiconductor Manufacturing Company Isolation spacer for thin SOI devices
US7306997B2 (en) * 2004-11-10 2007-12-11 Advanced Micro Devices, Inc. Strained fully depleted silicon on insulator semiconductor device and manufacturing method therefor
KR100669556B1 (ko) * 2004-12-08 2007-01-15 주식회사 하이닉스반도체 반도체 소자 및 그 제조 방법
KR100640616B1 (ko) * 2004-12-21 2006-11-01 삼성전자주식회사 매몰 게이트 패턴을 포함하는 전계 효과 트랜지스터구조물 및 그것을 포함하는 반도체 소자의 제조방법
US7279406B2 (en) * 2004-12-22 2007-10-09 Texas Instruments Incorporated Tailoring channel strain profile by recessed material composition control
US7335959B2 (en) * 2005-01-06 2008-02-26 Intel Corporation Device with stepped source/drain region profile
US7282415B2 (en) 2005-03-29 2007-10-16 Freescale Semiconductor, Inc. Method for making a semiconductor device with strain enhancement
WO2006103321A1 (fr) * 2005-04-01 2006-10-05 Stmicroelectronics (Crolles 2) Sas Transistor pmos a canal contraint et procede de fabrication correspondant
JP2006332243A (ja) * 2005-05-25 2006-12-07 Toshiba Corp 半導体装置及びその製造方法
US7858481B2 (en) * 2005-06-15 2010-12-28 Intel Corporation Method for fabricating transistor with thinned channel
FR2887370B1 (fr) 2005-06-17 2007-12-28 Commissariat Energie Atomique Procede de fabrication d'un transistor isole a canal contraint
EP1739749A2 (fr) * 2005-06-30 2007-01-03 STMicroelectronics (Crolles 2) SAS Cellule mémoire à un transistor MOS à corps isolé à effet mémoire prolongé
US7326601B2 (en) * 2005-09-26 2008-02-05 Advanced Micro Devices, Inc. Methods for fabrication of a stressed MOS device
WO2007053382A1 (fr) * 2005-10-31 2007-05-10 Advanced Micro Devices, Inc. Couche de contrainte incorporée dans des transistors soi minces et son procédé de fabrication
DE102005052055B3 (de) * 2005-10-31 2007-04-26 Advanced Micro Devices, Inc., Sunnyvale Eingebettete Verformungsschicht in dünnen SOI-Transistoren und Verfahren zur Herstellung desselben
FR2897202B1 (fr) * 2006-02-08 2008-09-12 St Microelectronics Crolles 2 Transistor mos a barriere de schottky sur film semi-conducteur entierement appauvri et procede de fabrication d'un tel transistor.
DE602006019940D1 (de) * 2006-03-06 2011-03-17 St Microelectronics Crolles 2 Herstellung eines flachen leitenden Kanals aus SiGe
FR2899381B1 (fr) * 2006-03-28 2008-07-18 Commissariat Energie Atomique Procede de realisation d'un transistor a effet de champ a grilles auto-alignees
JP5055846B2 (ja) * 2006-06-09 2012-10-24 ソニー株式会社 半導体装置およびその製造方法
US7541239B2 (en) * 2006-06-30 2009-06-02 Intel Corporation Selective spacer formation on transistors of different classes on the same device
KR100746232B1 (ko) * 2006-08-25 2007-08-03 삼성전자주식회사 스트레인드 채널을 갖는 모스 트랜지스터 및 그 제조방법
US7670896B2 (en) * 2006-11-16 2010-03-02 International Business Machines Corporation Method and structure for reducing floating body effects in MOSFET devices
US8232186B2 (en) * 2008-05-29 2012-07-31 International Business Machines Corporation Methods of integrating reverse eSiGe on NFET and SiGe channel on PFET, and related structure
FR2976401A1 (fr) * 2011-06-07 2012-12-14 St Microelectronics Crolles 2 Composant electronique comportant un ensemble de transistors mosfet et procede de fabrication
FR2985089B1 (fr) * 2011-12-27 2015-12-04 Commissariat Energie Atomique Transistor et procede de fabrication d'un transistor
CN103578987B (zh) * 2012-07-19 2016-08-24 中国科学院微电子研究所 半导体器件及其制造方法
CN104779203B (zh) * 2015-04-23 2017-11-28 京东方科技集团股份有限公司 一种阵列基板及其制造方法、显示装置
US9685535B1 (en) 2016-09-09 2017-06-20 International Business Machines Corporation Conductive contacts in semiconductor on insulator substrate

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FR2791180B1 (fr) * 1999-03-19 2001-06-15 France Telecom Dispositif semi-conducteur a courant de fuite reduit et son procede de fabrication
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FR2812764B1 (fr) * 2000-08-02 2003-01-24 St Microelectronics Sa Procede de fabrication d'un substrat de type substrat-sur- isolant ou substrat-sur-vide et dispositif obtenu
FR2821483B1 (fr) * 2001-02-28 2004-07-09 St Microelectronics Sa Procede de fabrication d'un transistor a grille isolee et a architecture du type substrat sur isolant, et transistor correspondant
US6515335B1 (en) * 2002-01-04 2003-02-04 International Business Machines Corporation Method for fabrication of relaxed SiGe buffer layers on silicon-on-insulators and structures containing the same

Cited By (2)

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Publication number Priority date Publication date Assignee Title
US7700951B2 (en) 2003-11-05 2010-04-20 International Business Machines Corporation Method and structure for forming strained Si for CMOS devices
US7928443B2 (en) 2003-11-05 2011-04-19 International Business Machines Corporation Method and structure for forming strained SI for CMOS devices

Also Published As

Publication number Publication date
US20040188760A1 (en) 2004-09-30
FR2838237A1 (fr) 2003-10-10
US6989570B2 (en) 2006-01-24

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