FR2666454A1 - Structure de jonction de contact tolerant l'endommagement electrostatique pour dispositif semi-conducteur en particulier cmos. - Google Patents

Structure de jonction de contact tolerant l'endommagement electrostatique pour dispositif semi-conducteur en particulier cmos. Download PDF

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Publication number
FR2666454A1
FR2666454A1 FR9100620A FR9100620A FR2666454A1 FR 2666454 A1 FR2666454 A1 FR 2666454A1 FR 9100620 A FR9100620 A FR 9100620A FR 9100620 A FR9100620 A FR 9100620A FR 2666454 A1 FR2666454 A1 FR 2666454A1
Authority
FR
France
Prior art keywords
semiconductor device
high reliability
conductive type
substrate
type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
FR9100620A
Other languages
English (en)
French (fr)
Inventor
Yun-Seung Sin
Jun Kang
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of FR2666454A1 publication Critical patent/FR2666454A1/fr
Withdrawn legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0248Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
FR9100620A 1990-09-05 1991-01-21 Structure de jonction de contact tolerant l'endommagement electrostatique pour dispositif semi-conducteur en particulier cmos. Withdrawn FR2666454A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900014002A KR920007171A (ko) 1990-09-05 1990-09-05 고신뢰성 반도체장치

Publications (1)

Publication Number Publication Date
FR2666454A1 true FR2666454A1 (fr) 1992-03-06

Family

ID=19303260

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9100620A Withdrawn FR2666454A1 (fr) 1990-09-05 1991-01-21 Structure de jonction de contact tolerant l'endommagement electrostatique pour dispositif semi-conducteur en particulier cmos.

Country Status (6)

Country Link
JP (1) JPH04234162A (ja)
KR (1) KR920007171A (ja)
DE (1) DE4101274A1 (ja)
FR (1) FR2666454A1 (ja)
GB (1) GB2247779A (ja)
IT (1) IT1245794B (ja)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3456242B2 (ja) * 1993-01-07 2003-10-14 セイコーエプソン株式会社 半導体装置及びその製造方法
DE69429018T2 (de) * 1993-01-12 2002-06-13 Sony Corp Ausgangsschaltung für Ladungsübertragungselement
KR0166101B1 (ko) * 1993-10-21 1999-01-15 김주용 정전방전 보호회로의 트랜지스터 및 그 제조방법
FR2713398B1 (fr) * 1993-11-30 1996-01-19 Sgs Thomson Microelectronics Fusible pour circuit intégré.
US5932917A (en) * 1996-04-19 1999-08-03 Nippon Steel Corporation Input protective circuit having a diffusion resistance layer
JPH1070266A (ja) * 1996-08-26 1998-03-10 Nec Corp 半導体装置およびその製造方法
DE19840239A1 (de) * 1998-09-03 2000-03-09 Siemens Ag Leistungshalbleiter-Bauelement mit einer Anordnung zum Schutz vor Schäden durch elektrostatische Entladungen
DE102004012819B4 (de) 2004-03-16 2006-02-23 Infineon Technologies Ag Leistungshalbleiterbauelement mit erhöhter Robustheit

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1073560A (en) * 1964-12-28 1967-06-28 Gen Electric Improvements in semiconductor devices
DE1803392A1 (de) * 1968-10-16 1970-06-18 Siemens Ag Schutzvorrichtung fuer einen Feldeffekttransistor
JPS57211272A (en) * 1981-06-23 1982-12-25 Toshiba Corp Semiconductor device
JPS5825264A (ja) * 1981-08-07 1983-02-15 Hitachi Ltd 絶縁ゲート型半導体装置
JPS6134967A (ja) * 1984-05-03 1986-02-19 デイジタル イクイプメント コ−ポレ−シヨン Vlsi集積回路装置用の入力保護構成体
US4734752A (en) * 1985-09-27 1988-03-29 Advanced Micro Devices, Inc. Electrostatic discharge protection device for CMOS integrated circuit outputs

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
24TH ANNUAL PROCEEDINGS OF IEEE RELIABILITY PHYSICS SYMPOSIUM, Anaheim, CA, 1-3 avril 1986, pages 206-214; L.F. DeCHIARO et al.: "Input ESD protection networks for fineline NMOS - effects of stressing waveform and circuit layout" *
25TH ANNUAL PROCEEDINGS OF IEEE RELIABILITY PHYSICS SYMPOSIUM, San Diego, CA, 7-9 avril 1987, pages 174-180; C. DUVVURY et al.: "ESD phenomena and protection issues in CMOS output buffers" *
ELECTRICAL OVERSTRESS/ELECTROSTATIC DISCHARGE SYMPOSIUM PROCEEDINGS, Philadelphia, PA, 1984, pages 202-209; C.M. LIN et al.: "A CMOS VLSI ESD input protection device, DIFIDW" *

Also Published As

Publication number Publication date
IT1245794B (it) 1994-10-18
DE4101274A1 (de) 1992-03-19
KR920007171A (ko) 1992-04-28
GB9100619D0 (en) 1991-02-27
ITMI910091A0 (it) 1991-01-16
GB2247779A (en) 1992-03-11
ITMI910091A1 (it) 1992-07-16
JPH04234162A (ja) 1992-08-21

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