FR2635613B1 - Dispositif a semiconducteurs mos - Google Patents

Dispositif a semiconducteurs mos

Info

Publication number
FR2635613B1
FR2635613B1 FR898910970A FR8910970A FR2635613B1 FR 2635613 B1 FR2635613 B1 FR 2635613B1 FR 898910970 A FR898910970 A FR 898910970A FR 8910970 A FR8910970 A FR 8910970A FR 2635613 B1 FR2635613 B1 FR 2635613B1
Authority
FR
France
Prior art keywords
semiconductor device
mos semiconductor
mos
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
FR898910970A
Other languages
English (en)
Other versions
FR2635613A1 (fr
Inventor
Kenya Sakurai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Publication of FR2635613A1 publication Critical patent/FR2635613A1/fr
Application granted granted Critical
Publication of FR2635613B1 publication Critical patent/FR2635613B1/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802Vertical DMOS transistors, i.e. VDMOS transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0248Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • H01L29/0692Surface layout
    • H01L29/0696Surface layout of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1095Body region, i.e. base region, of DMOS transistors or IGBTs

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Bipolar Transistors (AREA)
FR898910970A 1988-08-19 1989-08-17 Dispositif a semiconducteurs mos Expired - Lifetime FR2635613B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63206107A JPH0254969A (ja) 1988-08-19 1988-08-19 Mos型半導体装置

Publications (2)

Publication Number Publication Date
FR2635613A1 FR2635613A1 (fr) 1990-02-23
FR2635613B1 true FR2635613B1 (fr) 1991-11-08

Family

ID=16517918

Family Applications (1)

Application Number Title Priority Date Filing Date
FR898910970A Expired - Lifetime FR2635613B1 (fr) 1988-08-19 1989-08-17 Dispositif a semiconducteurs mos

Country Status (4)

Country Link
US (1) US4969024A (fr)
JP (1) JPH0254969A (fr)
DE (1) DE3924930C2 (fr)
FR (1) FR2635613B1 (fr)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05110085A (ja) * 1991-10-14 1993-04-30 Mitsubishi Electric Corp 電界効果型半導体装置およびその製造方法
EP0841702A1 (fr) * 1996-11-11 1998-05-13 STMicroelectronics S.r.l. DMOSFET latéral ou vertical avec haute tension de claquage
ATE457084T1 (de) * 1998-12-18 2010-02-15 Infineon Technologies Ag Feldeffekt-transistoranordnung mit einer grabenförmigen gate-elektrode und einer zusätzlichen hochdotierten schicht im bodygebiet
CN103035634B (zh) * 2011-10-09 2015-06-03 上海华虹宏力半导体制造有限公司 能够提高雪崩耐量能力的超结器件结构
US11383878B2 (en) 2012-07-31 2022-07-12 Vanguard Packaging, Llc Box container and display
US9238523B1 (en) * 2012-07-31 2016-01-19 Vanguard Packaging, Inc. Box container and display
CN108281486B (zh) * 2017-12-29 2021-04-02 江苏东晨电子科技有限公司 一种雪崩耐量增强型的vdmos器件结构及其制作方法

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5690434A (en) * 1979-12-19 1981-07-22 Hitachi Ltd Optical information reproducing device
JPS57199903A (en) * 1981-06-03 1982-12-08 Matsushita Electric Ind Co Ltd Position detector
JPS5826331A (ja) * 1981-08-11 1983-02-16 Nippon Telegr & Teleph Corp <Ntt> 光学ヘツド
US4803532A (en) * 1982-11-27 1989-02-07 Nissan Motor Co., Ltd. Vertical MOSFET having a proof structure against puncture due to breakdown
JPS59152543A (ja) * 1983-02-21 1984-08-31 Toshiba Corp 光学式デイスクレコ−ド再生装置
JPS618745A (ja) * 1984-06-20 1986-01-16 Mitsubishi Electric Corp 光学式情報再生装置
GB2165090A (en) * 1984-09-26 1986-04-03 Philips Electronic Associated Improving the field distribution in high voltage semiconductor devices
JPS61156882A (ja) * 1984-12-28 1986-07-16 Toshiba Corp 二重拡散形絶縁ゲ−ト電界効果トランジスタ及びその製造方法
JPS62163372A (ja) * 1986-01-14 1987-07-20 Toshiba Corp 電界効果型半導体装置
JPS6381862A (ja) * 1986-09-25 1988-04-12 Fuji Electric Co Ltd 絶縁ゲ−ト型バイポ−ラトランジスタ
JP2511010B2 (ja) * 1987-01-13 1996-06-26 日産自動車株式会社 縦型mosトランジスタの製造方法

Also Published As

Publication number Publication date
JPH0254969A (ja) 1990-02-23
FR2635613A1 (fr) 1990-02-23
DE3924930A1 (de) 1990-02-22
DE3924930C2 (de) 1998-07-02
US4969024A (en) 1990-11-06

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Legal Events

Date Code Title Description
ST Notification of lapse