FR2436533A1 - Circuit integre en logique mos dynamique presentant un montage distinct d'elements logiques combinatoires et sequentiels - Google Patents
Circuit integre en logique mos dynamique presentant un montage distinct d'elements logiques combinatoires et sequentielsInfo
- Publication number
- FR2436533A1 FR2436533A1 FR7922799A FR7922799A FR2436533A1 FR 2436533 A1 FR2436533 A1 FR 2436533A1 FR 7922799 A FR7922799 A FR 7922799A FR 7922799 A FR7922799 A FR 7922799A FR 2436533 A1 FR2436533 A1 FR 2436533A1
- Authority
- FR
- France
- Prior art keywords
- integrated circuit
- logic elements
- combinatory
- dynamic mos
- elements operating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
- H03K19/096—Synchronous circuits, i.e. using clock signals
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Power Engineering (AREA)
- Logic Circuits (AREA)
- Tests Of Electronic Circuits (AREA)
- Manipulation Of Pulses (AREA)
Abstract
Un circuit intégré en technologie MOS dynamique est formé d'éléments logiques fonctionnant de manière séquentielle et d'éléments logiques fonctionnant de manière combinatoire. Les éléments logiques fonctionnant de manière séquentielle comportent, chacun, dans l'ordre, une porte d'enregistrement une porte de transfert et une porte de sortie qui sont activées dans le sens du passage par une phase correspondante de la première phase et des phases suivantes d'un cycle d'impulsions d'horloge. Les éléments logiques fonctionnant de manière de combinatoire sont tous formés de portes d'un seul type tandis que les signaux d'entrée sont amenés par l'intermédiaire des éléments logiques fonctionnant de manière séquentielle et que les signaux de sortie sont à nouveau évacués par cette même voie. Dans le réseau combinatoire, un seul type de perturbation (interférence) reste ainsi important. Application : réalisation de circuits logiques dits << à quatre phases >>.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
NL7809397A NL7809397A (nl) | 1978-09-15 | 1978-09-15 | Geintegreerde schakeling in dynamische mos-logika met gescheiden opstelling van kombinatorische en sequen- tieele logische elementen. |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2436533A1 true FR2436533A1 (fr) | 1980-04-11 |
FR2436533B1 FR2436533B1 (fr) | 1983-03-11 |
Family
ID=19831543
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR7922799A Granted FR2436533A1 (fr) | 1978-09-15 | 1979-09-12 | Circuit integre en logique mos dynamique presentant un montage distinct d'elements logiques combinatoires et sequentiels |
Country Status (11)
Country | Link |
---|---|
US (1) | US4371795A (fr) |
JP (1) | JPS5541098A (fr) |
AU (1) | AU529178B2 (fr) |
CA (1) | CA1132204A (fr) |
CH (1) | CH650114A5 (fr) |
DE (1) | DE2936430A1 (fr) |
FR (1) | FR2436533A1 (fr) |
GB (1) | GB2031680B (fr) |
IT (1) | IT1123712B (fr) |
NL (1) | NL7809397A (fr) |
SE (1) | SE438065B (fr) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2120029B (en) * | 1982-05-12 | 1985-10-23 | Philips Electronic Associated | Dynamic two-phase circuit arrangement |
JPS60198620A (ja) * | 1984-03-21 | 1985-10-08 | Sharp Corp | Lsi化したタイミング発生回路 |
JPS6124250A (ja) * | 1984-07-13 | 1986-02-01 | Nippon Gakki Seizo Kk | 半導体集積回路装置 |
US4607176A (en) * | 1984-08-22 | 1986-08-19 | The United States Of America As Represented By The Secretary Of The Air Force | Tally cell circuit |
CN109787716B (zh) * | 2018-12-19 | 2020-12-29 | 惠科股份有限公司 | 数据的传输方法及装置 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2203232A1 (fr) * | 1972-10-16 | 1974-05-10 | Ibm |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3609392A (en) * | 1970-08-21 | 1971-09-28 | Gen Instrument Corp | Dynamic shift register system having data rate doubling characteristic |
CA998746A (en) * | 1972-02-14 | 1976-10-19 | Yoshikazu Hatsukano | Digital circuit |
US4114049A (en) * | 1972-02-25 | 1978-09-12 | Tokyo Shibaura Electric Co., Ltd. | Counter provided with complementary field effect transistor inverters |
US3989955A (en) * | 1972-09-30 | 1976-11-02 | Tokyo Shibaura Electric Co., Ltd. | Logic circuit arrangements using insulated-gate field effect transistors |
US3857045A (en) * | 1973-04-17 | 1974-12-24 | Nasa | Four-phase logic systems |
US3898480A (en) * | 1974-04-04 | 1975-08-05 | Rockwell International Corp | Multiphase logic circuit |
US4040015A (en) * | 1974-04-16 | 1977-08-02 | Hitachi, Ltd. | Complementary mos logic circuit |
JPS5258452A (en) * | 1975-11-10 | 1977-05-13 | Hitachi Ltd | Mis logic circuit |
US4107548A (en) * | 1976-03-05 | 1978-08-15 | Hitachi, Ltd. | Ratioless type MIS logic circuit |
-
1978
- 1978-09-15 NL NL7809397A patent/NL7809397A/nl not_active Application Discontinuation
-
1979
- 1979-09-06 CA CA335,315A patent/CA1132204A/fr not_active Expired
- 1979-09-07 US US06/073,571 patent/US4371795A/en not_active Expired - Lifetime
- 1979-09-08 DE DE19792936430 patent/DE2936430A1/de not_active Withdrawn
- 1979-09-12 GB GB7931616A patent/GB2031680B/en not_active Expired
- 1979-09-12 IT IT25693/79A patent/IT1123712B/it active
- 1979-09-12 FR FR7922799A patent/FR2436533A1/fr active Granted
- 1979-09-12 SE SE7907571A patent/SE438065B/sv unknown
- 1979-09-12 CH CH8268/79A patent/CH650114A5/de not_active IP Right Cessation
- 1979-09-13 AU AU50819/79A patent/AU529178B2/en not_active Ceased
- 1979-09-17 JP JP11916979A patent/JPS5541098A/ja active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2203232A1 (fr) * | 1972-10-16 | 1974-05-10 | Ibm |
Non-Patent Citations (1)
Title |
---|
EXBK/73 * |
Also Published As
Publication number | Publication date |
---|---|
SE438065B (sv) | 1985-03-25 |
IT1123712B (it) | 1986-04-30 |
GB2031680A (en) | 1980-04-23 |
NL7809397A (nl) | 1980-03-18 |
AU5081979A (en) | 1980-03-20 |
FR2436533B1 (fr) | 1983-03-11 |
GB2031680B (en) | 1982-12-01 |
SE7907571L (sv) | 1980-03-16 |
AU529178B2 (en) | 1983-05-26 |
JPS5541098A (en) | 1980-03-22 |
US4371795A (en) | 1983-02-01 |
CH650114A5 (de) | 1985-06-28 |
DE2936430A1 (de) | 1980-04-03 |
IT7925693A0 (it) | 1979-09-12 |
CA1132204A (fr) | 1982-09-21 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |