FI20030580A0 - Keraaminen monikerrossubstraatti ja menetelmä sen valmistamiseksi - Google Patents
Keraaminen monikerrossubstraatti ja menetelmä sen valmistamiseksiInfo
- Publication number
- FI20030580A0 FI20030580A0 FI20030580A FI20030580A FI20030580A0 FI 20030580 A0 FI20030580 A0 FI 20030580A0 FI 20030580 A FI20030580 A FI 20030580A FI 20030580 A FI20030580 A FI 20030580A FI 20030580 A0 FI20030580 A0 FI 20030580A0
- Authority
- FI
- Finland
- Prior art keywords
- preparation
- multilayer substrate
- ceramic multilayer
- ceramic
- substrate
- Prior art date
Links
- 239000000919 ceramic Substances 0.000 title 1
- 239000000758 substrate Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/403—Edge contacts; Windows or holes in the substrate having plural connections on the walls thereof
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49805—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the leads being also applied on the sidewalls or the bottom of the substrate, e.g. leadless packages for surface mounting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49822—Multilayer substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
- H01L2924/097—Glass-ceramics, e.g. devitrified glass
- H01L2924/09701—Low temperature co-fired ceramic [LTCC]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09145—Edge details
- H05K2201/09181—Notches in edge pads
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09145—Edge details
- H05K2201/0919—Exposing inner circuit layers or metal planes at the side edge of the PCB or at the walls of large holes
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09372—Pads and lands
- H05K2201/09454—Inner lands, i.e. lands around via or plated through-hole in internal layer of multilayer PCB
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/14—Related to the order of processing steps
- H05K2203/1476—Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
- H05K3/0052—Depaneling, i.e. dividing a panel into circuit boards; Working of the edges of circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
- H05K3/245—Reinforcing conductive patterns made by printing techniques or by other techniques for applying conductive pastes, inks or powders; Reinforcing other conductive patterns by such techniques
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
- H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
- H05K3/4061—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in inorganic insulating substrates
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
- H05K3/4629—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Ceramic Capacitors (AREA)
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
- Structure Of Printed Boards (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR10-2002-0072026A KR100489820B1 (ko) | 2002-11-19 | 2002-11-19 | 세라믹 다층기판 및 그 제조방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
FI20030580A0 true FI20030580A0 (fi) | 2003-04-16 |
FI20030580A FI20030580A (fi) | 2004-05-20 |
Family
ID=19720688
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FI20030580A FI20030580A (fi) | 2002-11-19 | 2003-04-16 | Keraaminen monikerrossubstraatti ja menetelmä sen valmistamiseksi |
Country Status (9)
Country | Link |
---|---|
US (2) | US6965161B2 (fi) |
JP (1) | JP2004172561A (fi) |
KR (1) | KR100489820B1 (fi) |
CN (1) | CN1324698C (fi) |
DE (1) | DE10317675B4 (fi) |
FI (1) | FI20030580A (fi) |
FR (1) | FR2847385B1 (fi) |
GB (1) | GB2395604B (fi) |
SE (1) | SE524255C2 (fi) |
Families Citing this family (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7777321B2 (en) * | 2002-04-22 | 2010-08-17 | Gann Keith D | Stacked microelectronic layer and module with three-axis channel T-connects |
KR100495211B1 (ko) * | 2002-11-25 | 2005-06-14 | 삼성전기주식회사 | 세라믹 다층기판 및 그 제조방법 |
KR100771862B1 (ko) * | 2005-08-12 | 2007-11-01 | 삼성전자주식회사 | 메모리 모듈을 위한 인쇄회로기판, 그 제조 방법 및 메모리모듈-소켓 어셈블리 |
US20080047653A1 (en) * | 2006-08-28 | 2008-02-28 | Kan Shih-Wei | Method for manufacturing multi-layer ceramic substrate |
KR100875234B1 (ko) | 2007-08-08 | 2008-12-19 | 삼성전기주식회사 | 세라믹 기판 및 그 제조방법, 그리고 카메라 모듈 |
US20090126857A1 (en) * | 2007-11-15 | 2009-05-21 | Shin Hyun-Ok | Manufacturing method of low temperature co-fired ceramics substrate |
US7843303B2 (en) * | 2008-12-08 | 2010-11-30 | Alpha And Omega Semiconductor Incorporated | Multilayer inductor |
US8747591B1 (en) * | 2009-09-22 | 2014-06-10 | Sandia Corporation | Full tape thickness feature conductors for EMI structures |
WO2012025888A2 (en) * | 2010-08-24 | 2012-03-01 | Colorchip (Israel) Ltd. | Light source mount |
JP5567445B2 (ja) * | 2010-10-08 | 2014-08-06 | スタンレー電気株式会社 | セラミック多層配線基板の製造方法 |
KR20150004118A (ko) * | 2013-07-02 | 2015-01-12 | 삼성디스플레이 주식회사 | 표시 장치용 기판, 상기 표시 장치용 기판의 제조 방법, 및 상기 표시 장치용 기판을 포함하는 표시 장치 |
US9691694B2 (en) | 2015-02-18 | 2017-06-27 | Qualcomm Incorporated | Substrate comprising stacks of interconnects, interconnect on solder resist layer and interconnect on side portion of substrate |
JP6195085B2 (ja) * | 2015-08-24 | 2017-09-13 | 株式会社村田製作所 | 積層電子部品 |
CN105305041B (zh) * | 2015-09-27 | 2019-11-12 | 华东交通大学 | 集成寄生单元与开槽dr结构的宽频带天线 |
CN109477812B (zh) * | 2016-07-21 | 2021-03-16 | 日本碍子株式会社 | 传感器元件的制造方法 |
CN109119400B (zh) * | 2018-09-25 | 2024-04-09 | 中国电子科技集团公司第四十三研究所 | 高载流能力多层陶瓷基板及其制作方法 |
CN113624394A (zh) * | 2020-05-08 | 2021-11-09 | 精量电子(深圳)有限公司 | 压力传感器 |
CN112038297B (zh) * | 2020-08-14 | 2022-10-25 | 中国电子科技集团公司第十三研究所 | 氧化铝瓷件及其制作方法、陶瓷外壳的制作方法 |
Family Cites Families (26)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5615059U (fi) * | 1979-07-11 | 1981-02-09 | ||
JPH02166792A (ja) * | 1988-12-21 | 1990-06-27 | Nippon Chemicon Corp | 多層スルーホールおよびその形成方法 |
US5140745A (en) * | 1990-07-23 | 1992-08-25 | Mckenzie Jr Joseph A | Method for forming traces on side edges of printed circuit boards and devices formed thereby |
JP2600477B2 (ja) * | 1990-10-31 | 1997-04-16 | 株式会社村田製作所 | 積層セラミック電子部品 |
JP2873645B2 (ja) * | 1992-05-25 | 1999-03-24 | 国際電気 株式会社 | セラミック多層配線基板の製造方法 |
EP0582881B1 (en) * | 1992-07-27 | 1997-12-29 | Murata Manufacturing Co., Ltd. | Multilayer electronic component, method of manufacturing the same and method of measuring characteristics thereof |
US5635669A (en) * | 1992-07-27 | 1997-06-03 | Murata Manufacturing Co., Ltd. | Multilayer electronic component |
JP3070364B2 (ja) * | 1992-11-25 | 2000-07-31 | 松下電器産業株式会社 | セラミック電子部品の製造方法 |
KR0127666B1 (ko) * | 1992-11-25 | 1997-12-30 | 모리시다 요이찌 | 세라믹전자부품 및 그 제조방법 |
DE69419219T2 (de) * | 1993-09-03 | 2000-01-05 | Kabushiki Kaisha Toshiba, Kawasaki | Leiterplatte und Verfahren zur Herstellung solcher Leiterplatten |
US5383095A (en) * | 1993-10-29 | 1995-01-17 | The Whitaker Corporation | Circuit board and edge-mountable connector therefor, and method of preparing a circuit board edge |
JP3223708B2 (ja) | 1994-07-21 | 2001-10-29 | 株式会社村田製作所 | 積層電子部品およびその製造方法 |
US5855995A (en) * | 1997-02-21 | 1999-01-05 | Medtronic, Inc. | Ceramic substrate for implantable medical devices |
JPH10275979A (ja) * | 1997-03-28 | 1998-10-13 | Kyocera Corp | セラミック基板および分割回路基板 |
JPH10313157A (ja) * | 1997-05-12 | 1998-11-24 | Alps Electric Co Ltd | プリント基板 |
US6249049B1 (en) * | 1998-06-12 | 2001-06-19 | Nec Corporation | Ceramic package type electronic part which is high in connection strength to electrode |
US6256880B1 (en) * | 1998-09-17 | 2001-07-10 | Intermedics, Inc. | Method for preparing side attach pad traces through buried conductive material |
JP3402226B2 (ja) * | 1998-11-19 | 2003-05-06 | 株式会社村田製作所 | チップサーミスタの製造方法 |
KR100320943B1 (ko) * | 1999-06-15 | 2002-02-06 | 이형도 | 칩형 분배기 |
KR100315751B1 (ko) * | 1999-12-31 | 2001-12-12 | 송재인 | 저온 소성 세라믹 다층기판 |
JP3531573B2 (ja) * | 2000-03-17 | 2004-05-31 | 株式会社村田製作所 | 積層型セラミック電子部品およびその製造方法ならびに電子装置 |
JP4138211B2 (ja) * | 2000-07-06 | 2008-08-27 | 株式会社村田製作所 | 電子部品およびその製造方法、集合電子部品、電子部品の実装構造、ならびに電子装置 |
JP2002141248A (ja) * | 2000-11-02 | 2002-05-17 | Murata Mfg Co Ltd | セラミック電子部品およびその製造方法 |
US6462950B1 (en) * | 2000-11-29 | 2002-10-08 | Nokia Mobile Phones Ltd. | Stacked power amplifier module |
US6528875B1 (en) * | 2001-04-20 | 2003-03-04 | Amkor Technology, Inc. | Vacuum sealed package for semiconductor chip |
US6759940B2 (en) * | 2002-01-10 | 2004-07-06 | Lamina Ceramics, Inc. | Temperature compensating device with integral sheet thermistors |
-
2002
- 2002-11-19 KR KR10-2002-0072026A patent/KR100489820B1/ko not_active IP Right Cessation
- 2002-12-27 JP JP2002378939A patent/JP2004172561A/ja active Pending
-
2003
- 2003-01-13 US US10/340,590 patent/US6965161B2/en not_active Expired - Fee Related
- 2003-01-17 CN CNB031014763A patent/CN1324698C/zh not_active Expired - Fee Related
- 2003-04-14 GB GB0308563A patent/GB2395604B/en not_active Expired - Fee Related
- 2003-04-16 FI FI20030580A patent/FI20030580A/fi not_active IP Right Cessation
- 2003-04-16 SE SE0301134A patent/SE524255C2/sv not_active IP Right Cessation
- 2003-04-17 DE DE10317675A patent/DE10317675B4/de not_active Expired - Fee Related
- 2003-04-23 FR FR0305015A patent/FR2847385B1/fr not_active Expired - Fee Related
-
2004
- 2004-11-08 US US10/983,240 patent/US20050098874A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
SE0301134L (sv) | 2004-05-20 |
KR100489820B1 (ko) | 2005-05-16 |
SE0301134D0 (sv) | 2003-04-16 |
FI20030580A (fi) | 2004-05-20 |
US20040094834A1 (en) | 2004-05-20 |
CN1503354A (zh) | 2004-06-09 |
FR2847385A1 (fr) | 2004-05-21 |
US20050098874A1 (en) | 2005-05-12 |
CN1324698C (zh) | 2007-07-04 |
KR20040043736A (ko) | 2004-05-27 |
JP2004172561A (ja) | 2004-06-17 |
SE524255C2 (sv) | 2004-07-20 |
DE10317675A1 (de) | 2004-06-17 |
GB0308563D0 (en) | 2003-05-21 |
GB2395604A (en) | 2004-05-26 |
DE10317675B4 (de) | 2006-08-24 |
FR2847385B1 (fr) | 2006-01-13 |
US6965161B2 (en) | 2005-11-15 |
GB2395604B (en) | 2005-11-16 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
MA | Patent expired |