ES373341A1 - Metodo de fabricacion de dispositivos semiconductores. - Google Patents
Metodo de fabricacion de dispositivos semiconductores.Info
- Publication number
- ES373341A1 ES373341A1 ES373341A ES373341A ES373341A1 ES 373341 A1 ES373341 A1 ES 373341A1 ES 373341 A ES373341 A ES 373341A ES 373341 A ES373341 A ES 373341A ES 373341 A1 ES373341 A1 ES 373341A1
- Authority
- ES
- Spain
- Prior art keywords
- tablet
- wax
- mordant
- channels
- semiconductor devices
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000004519 manufacturing process Methods 0.000 title abstract 2
- 239000004065 semiconductor Substances 0.000 title abstract 2
- 239000000463 material Substances 0.000 abstract 5
- 150000001875 compounds Chemical class 0.000 abstract 2
- 230000001681 protective effect Effects 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02282—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/312—Organic layers, e.g. photoresist
- H01L21/3121—Layers comprising organo-silicon compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3157—Partial encapsulation or coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
- H01L2924/097—Glass-ceramics, e.g. devitrified glass
- H01L2924/09701—Low temperature co-fired ceramic [LTCC]
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/977—Thinning or removal of substrate
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Weting (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Dicing (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB24991/69A GB1285708A (en) | 1968-10-28 | 1968-10-28 | Semi-conductor devices |
GB5103568 | 1968-10-28 |
Publications (1)
Publication Number | Publication Date |
---|---|
ES373341A1 true ES373341A1 (es) | 1972-05-16 |
Family
ID=26257416
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ES373341A Expired ES373341A1 (es) | 1968-10-28 | 1969-10-25 | Metodo de fabricacion de dispositivos semiconductores. |
ES399979A Expired ES399979A1 (es) | 1968-10-28 | 1972-02-09 | Procedimiento de fabricacion de dispositivos semiconducto- res. |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ES399979A Expired ES399979A1 (es) | 1968-10-28 | 1972-02-09 | Procedimiento de fabricacion de dispositivos semiconducto- res. |
Country Status (12)
Country | Link |
---|---|
US (1) | US3756872A (es) |
AT (1) | AT310253B (es) |
BE (1) | BE740836A (es) |
CH (1) | CH522955A (es) |
CS (1) | CS168552B2 (es) |
DE (1) | DE1954265A1 (es) |
DK (1) | DK135071B (es) |
ES (2) | ES373341A1 (es) |
FR (1) | FR2021690B1 (es) |
GB (1) | GB1285708A (es) |
NL (1) | NL154868B (es) |
SE (2) | SE363930B (es) |
Families Citing this family (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1335201A (en) * | 1970-05-21 | 1973-10-24 | Lucas Industries Ltd | Method of manufacturing semi-conductor devices |
FR2100997B1 (es) * | 1970-08-04 | 1973-12-21 | Silec Semi Conducteurs | |
JPS5527463B2 (es) * | 1973-02-28 | 1980-07-21 | ||
IT1059086B (it) * | 1976-04-14 | 1982-05-31 | Ates Componenti Elettron | Procedimento per la passivazione di dispositivi a semiconduttore di potenza ad alta tensione inversa |
DE2929339A1 (de) * | 1978-07-24 | 1980-02-14 | Citizen Watch Co Ltd | Halbleiteranordnung |
US4624724A (en) * | 1985-01-17 | 1986-11-25 | General Electric Company | Method of making integrated circuit silicon die composite having hot melt adhesive on its silicon base |
DE3621796A1 (de) * | 1986-06-30 | 1988-01-07 | Siemens Ag | Verfahren zur verbesserung der nebensprechdaempfung bei einer optisch-elektronischen sensoranordnung |
US4904610A (en) * | 1988-01-27 | 1990-02-27 | General Instrument Corporation | Wafer level process for fabricating passivated semiconductor devices |
US5904545A (en) * | 1993-12-17 | 1999-05-18 | The Regents Of The University Of California | Apparatus for fabricating self-assembling microstructures |
US6864570B2 (en) * | 1993-12-17 | 2005-03-08 | The Regents Of The University Of California | Method and apparatus for fabricating self-assembling microstructures |
US5545291A (en) * | 1993-12-17 | 1996-08-13 | The Regents Of The University Of California | Method for fabricating self-assembling microstructures |
DE19604405C2 (de) * | 1996-02-07 | 2002-10-10 | Micronas Gmbh | Verfahren zum Vereinzeln von in einem Körper enthaltenen elektronischen Elementen |
FR2782843B1 (fr) * | 1998-08-25 | 2000-09-29 | Commissariat Energie Atomique | Procede d'isolation physique de regions d'une plaque de substrat |
DE10055763A1 (de) * | 2000-11-10 | 2002-05-23 | Infineon Technologies Ag | Verfahren zur Herstellung einer hochtemperaturfesten Verbindung zwischen zwei Wafern |
DE10158307A1 (de) * | 2001-11-28 | 2003-02-20 | Infineon Technologies Ag | Verfahren zum Anschließen von Schaltungseinheiten auf Wafer-Skale-Ebene durch Dehnen einer Folie |
TWI232560B (en) * | 2002-04-23 | 2005-05-11 | Sanyo Electric Co | Semiconductor device and its manufacture |
TWI229435B (en) * | 2002-06-18 | 2005-03-11 | Sanyo Electric Co | Manufacture of semiconductor device |
TWI227550B (en) * | 2002-10-30 | 2005-02-01 | Sanyo Electric Co | Semiconductor device manufacturing method |
JP4401181B2 (ja) * | 2003-08-06 | 2010-01-20 | 三洋電機株式会社 | 半導体装置及びその製造方法 |
JP4018096B2 (ja) * | 2004-10-05 | 2007-12-05 | 松下電器産業株式会社 | 半導体ウェハの分割方法、及び半導体素子の製造方法 |
TWI324800B (en) * | 2005-12-28 | 2010-05-11 | Sanyo Electric Co | Method for manufacturing semiconductor device |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3260634A (en) * | 1961-02-17 | 1966-07-12 | Motorola Inc | Method of etching a semiconductor wafer to provide tapered dice |
FR1486041A (fr) * | 1965-07-07 | 1967-06-23 | Westinghouse Electric Corp | Dispositif de protection des jonctions d'un dispositif semi-conducteur |
GB1118536A (en) * | 1966-09-30 | 1968-07-03 | Standard Telephones Cables Ltd | Improvements in or relating to semiconductor devices |
-
1968
- 1968-10-28 GB GB24991/69A patent/GB1285708A/en not_active Expired
-
1969
- 1969-10-06 US US00863984A patent/US3756872A/en not_active Expired - Lifetime
- 1969-10-14 CH CH1540669A patent/CH522955A/de not_active IP Right Cessation
- 1969-10-20 SE SE14326/69A patent/SE363930B/xx unknown
- 1969-10-20 SE SE7204684A patent/SE376684B/xx unknown
- 1969-10-21 FR FR6936022A patent/FR2021690B1/fr not_active Expired
- 1969-10-21 AT AT993069A patent/AT310253B/de not_active IP Right Cessation
- 1969-10-25 ES ES373341A patent/ES373341A1/es not_active Expired
- 1969-10-25 CS CS1478*[A patent/CS168552B2/cs unknown
- 1969-10-27 BE BE740836D patent/BE740836A/xx unknown
- 1969-10-27 DK DK566969AA patent/DK135071B/da unknown
- 1969-10-28 DE DE19691954265 patent/DE1954265A1/de active Pending
- 1969-10-28 NL NL696916239A patent/NL154868B/xx unknown
-
1972
- 1972-02-09 ES ES399979A patent/ES399979A1/es not_active Expired
Also Published As
Publication number | Publication date |
---|---|
DE1954265A1 (de) | 1970-05-27 |
DK135071B (da) | 1977-02-28 |
SE376684B (es) | 1975-06-02 |
NL154868B (nl) | 1977-10-17 |
GB1285708A (en) | 1972-08-16 |
CS168552B2 (es) | 1976-06-29 |
BE740836A (es) | 1970-04-01 |
DK135071C (es) | 1977-08-01 |
NL6916239A (es) | 1970-05-01 |
CH522955A (de) | 1972-05-15 |
AT310253B (de) | 1973-09-25 |
FR2021690A1 (es) | 1970-07-24 |
US3756872A (en) | 1973-09-04 |
FR2021690B1 (es) | 1974-05-03 |
ES399979A1 (es) | 1975-06-16 |
SE363930B (es) | 1974-02-04 |
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