ES2135269T3 - Procedimiento y dispositivo para la determinacion automatica de la tension alta necesaria para la programacion/borrado de una memoria eeprom. - Google Patents

Procedimiento y dispositivo para la determinacion automatica de la tension alta necesaria para la programacion/borrado de una memoria eeprom.

Info

Publication number
ES2135269T3
ES2135269T3 ES96945974T ES96945974T ES2135269T3 ES 2135269 T3 ES2135269 T3 ES 2135269T3 ES 96945974 T ES96945974 T ES 96945974T ES 96945974 T ES96945974 T ES 96945974T ES 2135269 T3 ES2135269 T3 ES 2135269T3
Authority
ES
Spain
Prior art keywords
high voltage
programming
erasing
automatic determination
deleting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES96945974T
Other languages
English (en)
Inventor
Holger Sedlak
Hans-Heinrich Viehmann
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Application granted granted Critical
Publication of ES2135269T3 publication Critical patent/ES2135269T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/30—Power supply circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory

Landscapes

  • Read Only Memory (AREA)
  • Non-Volatile Memory (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

MEDIANTE EL PROCESO DE ACUERDO CON LA INVENCION ES POSIBLE DETERMINAR, INDIVIDUALMENTE PARA CADA MEMORIA DE SEMICONDUCTOR DE VALOR FIJO, PROGRAMABLE Y BORRABLE ELECTRICAMENTE (SP), LA ALTA TENSION NECESARIA (VPP) PARA EL BORRADO Y LA PROGRAMACION, Y GRABARLA EN LA MISMA MEMORIA (SP), EN UNA ZONA A PREVISTA PARA ELLO. DESDE ALLI PUEDE LEERSE ESTA ALTA TENSION DETERMINADA, PARA CADA PROCESO DE BORRADO O PROGRAMACION ADICIONAL. A PARTIR DE UN PRIMER VALOR DE ALTA TENSION PARA PROGRAMACION O BORRADO DE LA MEMORIA Y UN PRIMER VALOR DE LA TENSION DE LECTURA, PARA COMPROBAR EL PROCESO DE PROGRAMACION O BORRADO, SE DETERMINA LA ALTA TENSION MAS ADECUADA MEDIANTE VARIACIONES SUCESIVAS DE LA ALTA TENSION O DE LA TENSION DE LECTURA.
ES96945974T 1995-11-10 1996-11-04 Procedimiento y dispositivo para la determinacion automatica de la tension alta necesaria para la programacion/borrado de una memoria eeprom. Expired - Lifetime ES2135269T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19542029A DE19542029C1 (de) 1995-11-10 1995-11-10 Verfahren zum selbsttätigen Ermitteln der nötigen Hochspannung zum Programmieren/Löschen eines EEPROMs

Publications (1)

Publication Number Publication Date
ES2135269T3 true ES2135269T3 (es) 1999-10-16

Family

ID=7777185

Family Applications (1)

Application Number Title Priority Date Filing Date
ES96945974T Expired - Lifetime ES2135269T3 (es) 1995-11-10 1996-11-04 Procedimiento y dispositivo para la determinacion automatica de la tension alta necesaria para la programacion/borrado de una memoria eeprom.

Country Status (11)

Country Link
EP (1) EP0860011B1 (es)
JP (1) JPH11515129A (es)
KR (1) KR100408323B1 (es)
CN (1) CN1113366C (es)
AT (1) ATE181173T1 (es)
DE (2) DE19542029C1 (es)
ES (1) ES2135269T3 (es)
IN (1) IN192274B (es)
RU (1) RU2189083C2 (es)
UA (1) UA47444C2 (es)
WO (1) WO1997017704A2 (es)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3583052B2 (ja) * 2000-03-31 2004-10-27 九州日本電気株式会社 半導体記憶装置
US7239557B2 (en) * 2005-06-17 2007-07-03 Micron Technology, Inc. Program method with optimized voltage level for flash memory
KR100725979B1 (ko) * 2005-07-23 2007-06-08 삼성전자주식회사 비휘발성 메모리의 기입/독출 내구력 개선 장치 및 그 방법
KR100843004B1 (ko) * 2006-04-14 2008-07-01 주식회사 하이닉스반도체 플래쉬 메모리 소자 및 그 구동 방법
KR100843037B1 (ko) * 2007-03-27 2008-07-01 주식회사 하이닉스반도체 플래시 메모리 장치 및 이의 소거 방법

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SG47058A1 (en) * 1993-09-10 1998-03-20 Intel Corp Circuitry and method for selecting a drain programming voltage for a nonvolatile memory
JP3737525B2 (ja) * 1994-03-11 2006-01-18 株式会社東芝 半導体記憶装置
JPH08115597A (ja) * 1994-10-17 1996-05-07 Mitsubishi Electric Corp 半導体ディスク装置

Also Published As

Publication number Publication date
JPH11515129A (ja) 1999-12-21
IN192274B (es) 2004-03-27
EP0860011A2 (de) 1998-08-26
EP0860011B1 (de) 1999-06-09
WO1997017704A3 (de) 1997-06-26
KR100408323B1 (ko) 2004-03-22
WO1997017704A2 (de) 1997-05-15
UA47444C2 (uk) 2002-07-15
DE19542029C1 (de) 1997-04-10
CN1202263A (zh) 1998-12-16
RU2189083C2 (ru) 2002-09-10
KR19990067410A (ko) 1999-08-16
CN1113366C (zh) 2003-07-02
ATE181173T1 (de) 1999-06-15
DE59602197D1 (de) 1999-07-15

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