EP0702298A3 - Firmware-controlled data processing system with pause monitoring function - Google Patents

Firmware-controlled data processing system with pause monitoring function Download PDF

Info

Publication number
EP0702298A3
EP0702298A3 EP95114488A EP95114488A EP0702298A3 EP 0702298 A3 EP0702298 A3 EP 0702298A3 EP 95114488 A EP95114488 A EP 95114488A EP 95114488 A EP95114488 A EP 95114488A EP 0702298 A3 EP0702298 A3 EP 0702298A3
Authority
EP
European Patent Office
Prior art keywords
data processing
processing system
controlled data
monitor function
microprogram controlled
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP95114488A
Other languages
German (de)
English (en)
French (fr)
Other versions
EP0702298A2 (en
Inventor
Yasunori Sawai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of EP0702298A2 publication Critical patent/EP0702298A2/en
Publication of EP0702298A3 publication Critical patent/EP0702298A3/en
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/28—Error detection; Error correction; Monitoring by checking the correct order of processing

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
EP95114488A 1994-09-14 1995-09-14 Firmware-controlled data processing system with pause monitoring function Withdrawn EP0702298A3 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP219337/94 1994-09-14
JP6219337A JP2630271B2 (ja) 1994-09-14 1994-09-14 情報処理装置

Publications (2)

Publication Number Publication Date
EP0702298A2 EP0702298A2 (en) 1996-03-20
EP0702298A3 true EP0702298A3 (en) 1996-09-04

Family

ID=16733882

Family Applications (1)

Application Number Title Priority Date Filing Date
EP95114488A Withdrawn EP0702298A3 (en) 1994-09-14 1995-09-14 Firmware-controlled data processing system with pause monitoring function

Country Status (3)

Country Link
US (1) US5838898A (ja)
EP (1) EP0702298A3 (ja)
JP (1) JP2630271B2 (ja)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10214201A (ja) * 1997-01-29 1998-08-11 Mitsubishi Electric Corp マイクロコンピュータ
JP4008086B2 (ja) * 1998-02-04 2007-11-14 沖電気工業株式会社 データモニタ回路
US6665818B1 (en) * 2000-04-27 2003-12-16 Hewlett-Packard Development Company, L.P. Apparatus and method for detecting, diagnosing, and handling deadlock errors
KR100444606B1 (ko) * 2002-07-16 2004-08-16 주식회사 하이닉스반도체 명령 상태 머신 및 그 구동 방법
CN101854259B (zh) * 2010-06-04 2014-03-19 中兴通讯股份有限公司 一种数据包的计数方法及***

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3707703A (en) * 1969-11-19 1972-12-26 Hitachi Ltd Microprogram-controlled data processing system capable of checking internal condition thereof
JPS5824951A (ja) * 1981-08-06 1983-02-15 Fujitsu Ltd マイクロプログラムのエラ−検出方式
US4823307A (en) * 1985-03-25 1989-04-18 Cselt - Centro Studi E Laboratori Telecomunicazioni S.P.A. MOS selfchecking microprogrammed control unit with on-line error detection
EP0445936A2 (en) * 1990-03-08 1991-09-11 Sony Corporation Supervision of microprocessors

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5278334A (en) * 1975-12-25 1977-07-01 Fujitsu Ltd Program sequence check system
SU613651A1 (ru) * 1976-12-16 1987-03-15 Предприятие П/Я А-3886 Запоминающее устройство
US4179737A (en) * 1977-12-23 1979-12-18 Burroughs Corporation Means and methods for providing greater speed and flexibility of microinstruction sequencing
JPS5582359A (en) * 1978-12-18 1980-06-21 Toshiba Corp Microprogram test unit
US4342083A (en) * 1980-02-05 1982-07-27 The Bendix Corporation Communication system for a multiple-computer system
JPS58169245A (ja) 1982-03-31 1983-10-05 Fujitsu Ltd マイクロプログラム制御装置
JPS59133610A (ja) * 1983-01-19 1984-08-01 Omron Tateisi Electronics Co プログラマブルコントロ−ラ
DE3420316C2 (de) * 1983-05-31 1997-01-09 Canon Kk Verfahren zur Steuerung eines Kopiergeräts
JPS60136810A (ja) * 1983-12-26 1985-07-20 Fuji Electric Co Ltd プログラマブルコントロ−ラ
JPS61188626A (ja) * 1985-02-18 1986-08-22 Fujitsu Ltd マイクロプロセツサ
US5263153A (en) * 1987-01-22 1993-11-16 National Semiconductor Corporation Monitoring control flow in a microprocessor
US4851990A (en) * 1987-02-09 1989-07-25 Advanced Micro Devices, Inc. High performance processor interface between a single chip processor and off chip memory means having a dedicated and shared bus structure
US5125084A (en) * 1988-05-26 1992-06-23 Ibm Corporation Control of pipelined operation in a microcomputer system employing dynamic bus sizing with 80386 processor and 82385 cache controller
US5151981A (en) * 1990-07-13 1992-09-29 International Business Machines Corporation Instruction sampling instrumentation
US5522064A (en) * 1990-10-01 1996-05-28 International Business Machines Corporation Data processing apparatus for dynamically setting timings in a dynamic memory system
IT1241318B (it) * 1990-11-19 1994-01-10 Olivetti & Co Spa Dispositivo di indirizzamento di memoria
JPH0540668A (ja) * 1991-08-06 1993-02-19 Nec Corp プログラム暴走防止方式
US5530802A (en) * 1994-06-22 1996-06-25 At&T Corp. Input sequence reordering method for software failure recovery

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3707703A (en) * 1969-11-19 1972-12-26 Hitachi Ltd Microprogram-controlled data processing system capable of checking internal condition thereof
JPS5824951A (ja) * 1981-08-06 1983-02-15 Fujitsu Ltd マイクロプログラムのエラ−検出方式
US4823307A (en) * 1985-03-25 1989-04-18 Cselt - Centro Studi E Laboratori Telecomunicazioni S.P.A. MOS selfchecking microprogrammed control unit with on-line error detection
EP0445936A2 (en) * 1990-03-08 1991-09-11 Sony Corporation Supervision of microprocessors
JPH04211843A (ja) * 1990-03-08 1992-08-03 Sony Corp マイクロプロセッサ装置

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 007, no. 101 (P - 194) 28 April 1983 (1983-04-28) *

Also Published As

Publication number Publication date
EP0702298A2 (en) 1996-03-20
US5838898A (en) 1998-11-17
JP2630271B2 (ja) 1997-07-16
JPH0883178A (ja) 1996-03-26

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