DE69938982D1 - Mehrlagen Gedruckteschaltungsplatte - Google Patents

Mehrlagen Gedruckteschaltungsplatte

Info

Publication number
DE69938982D1
DE69938982D1 DE69938982T DE69938982T DE69938982D1 DE 69938982 D1 DE69938982 D1 DE 69938982D1 DE 69938982 T DE69938982 T DE 69938982T DE 69938982 T DE69938982 T DE 69938982T DE 69938982 D1 DE69938982 D1 DE 69938982D1
Authority
DE
Germany
Prior art keywords
circuit board
printed circuit
multilayer printed
multilayer
board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69938982T
Other languages
English (en)
Inventor
Motoo Asai
Takashi Kariya
Kenichi Shimada
Hiroshi Segawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ibiden Co Ltd
Original Assignee
Ibiden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibiden Co Ltd filed Critical Ibiden Co Ltd
Application granted granted Critical
Publication of DE69938982D1 publication Critical patent/DE69938982D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4602Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0203Fillers and particles
    • H05K2201/0206Materials
    • H05K2201/0215Metallic fillers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0335Layered conductors or foils
    • H05K2201/0347Overplating, e.g. for reinforcing conductors or bumps; Plating over filled vias
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09536Buried plated through-holes, i.e. plated through-holes formed in a core before lamination
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09563Metal filled via
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/0959Plated through-holes or plated blind vias filled with insulating material
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/096Vertically aligned vias, holes or stacked vias
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/38Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/382Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
DE69938982T 1999-04-13 1999-05-21 Mehrlagen Gedruckteschaltungsplatte Expired - Lifetime DE69938982D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10554999A JP4442832B2 (ja) 1999-04-13 1999-04-13 多層プリント配線板

Publications (1)

Publication Number Publication Date
DE69938982D1 true DE69938982D1 (de) 2008-08-07

Family

ID=14410663

Family Applications (2)

Application Number Title Priority Date Filing Date
DE69938982T Expired - Lifetime DE69938982D1 (de) 1999-04-13 1999-05-21 Mehrlagen Gedruckteschaltungsplatte
DE69933480T Expired - Lifetime DE69933480T2 (de) 1999-04-13 1999-05-21 Mehrschichtige leiterplatte

Family Applications After (1)

Application Number Title Priority Date Filing Date
DE69933480T Expired - Lifetime DE69933480T2 (de) 1999-04-13 1999-05-21 Mehrschichtige leiterplatte

Country Status (7)

Country Link
EP (2) EP1744608B1 (de)
JP (1) JP4442832B2 (de)
KR (1) KR100629400B1 (de)
CN (1) CN1225953C (de)
DE (2) DE69938982D1 (de)
MY (1) MY130361A (de)
WO (1) WO2000062588A1 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100833723B1 (ko) 1999-10-26 2008-05-29 이비덴 가부시키가이샤 다층프린트배선판 및 다층프린트배선판의 제조 방법
JP4605888B2 (ja) * 2000-10-30 2011-01-05 イビデン株式会社 多層プリント配線板および多層プリント配線板の製造方法
JP4535598B2 (ja) * 2000-10-30 2010-09-01 イビデン株式会社 多層プリント配線板および多層プリント配線板の製造方法
EP1754986B1 (de) 2002-04-01 2012-12-05 Ibiden Co., Ltd. Optische Kommunikationseinrichtung und Herstellungsverfahren für eine optische Kommunikationsvorrichtung
US7070207B2 (en) 2003-04-22 2006-07-04 Ibiden Co., Ltd. Substrate for mounting IC chip, multilayerd printed circuit board, and device for optical communication
CN1899003B (zh) * 2004-03-03 2010-12-29 揖斐电株式会社 蚀刻液、蚀刻方法以及印刷电路板
JP5124984B2 (ja) * 2005-05-20 2013-01-23 日立化成工業株式会社 印刷配線板
JP5512562B2 (ja) 2010-03-29 2014-06-04 日本特殊陶業株式会社 多層配線基板
JP6261354B2 (ja) 2014-01-27 2018-01-17 インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Machines Corporation チップ実装構造体およびその製造方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6366993A (ja) * 1986-09-08 1988-03-25 日本電気株式会社 多層配線基板
JPH0427194A (ja) * 1990-05-22 1992-01-30 Hitachi Chem Co Ltd 高密度多層配線板およびその製造法
US5473120A (en) * 1992-04-27 1995-12-05 Tokuyama Corporation Multilayer board and fabrication method thereof
US5487218A (en) * 1994-11-21 1996-01-30 International Business Machines Corporation Method for making printed circuit boards with selectivity filled plated through holes
WO1997017824A1 (fr) * 1995-11-10 1997-05-15 Ibiden Co., Ltd. Carte a circuits imprimes multicouche et sa fabrication
DE69637655D1 (de) * 1995-10-23 2008-10-02 Ibiden Co Ltd Aufgebaute mehrschichtige Leiterplatte
JPH1022611A (ja) * 1996-07-05 1998-01-23 Hitachi Ltd 配線平坦化方法と該方法を使用する多層配線基板の製造方法及びその多層配線基板

Also Published As

Publication number Publication date
CN1225953C (zh) 2005-11-02
DE69933480D1 (de) 2006-11-16
EP1194025A1 (de) 2002-04-03
JP4442832B2 (ja) 2010-03-31
KR100629400B1 (ko) 2006-09-27
JP2000299562A (ja) 2000-10-24
EP1744608A3 (de) 2007-04-18
DE69933480T2 (de) 2007-06-21
EP1194025A4 (de) 2004-08-25
EP1744608B1 (de) 2008-06-25
WO2000062588A1 (fr) 2000-10-19
EP1194025B1 (de) 2006-10-04
MY130361A (en) 2007-06-29
EP1744608A2 (de) 2007-01-17
KR20010110735A (ko) 2001-12-13
CN1348678A (zh) 2002-05-08

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition