DE69226666D1 - Verfahren zur Herstellung eines Mehrfachgate-Dünnfilmtransistors - Google Patents

Verfahren zur Herstellung eines Mehrfachgate-Dünnfilmtransistors

Info

Publication number
DE69226666D1
DE69226666D1 DE69226666T DE69226666T DE69226666D1 DE 69226666 D1 DE69226666 D1 DE 69226666D1 DE 69226666 T DE69226666 T DE 69226666T DE 69226666 T DE69226666 T DE 69226666T DE 69226666 D1 DE69226666 D1 DE 69226666D1
Authority
DE
Germany
Prior art keywords
manufacturing
thin film
film transistor
gate thin
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69226666T
Other languages
English (en)
Other versions
DE69226666T2 (de
Inventor
Shigeki Kondo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP3011623A external-priority patent/JP2781468B2/ja
Priority claimed from JP3011642A external-priority patent/JP2912714B2/ja
Application filed by Canon Inc filed Critical Canon Inc
Application granted granted Critical
Publication of DE69226666D1 publication Critical patent/DE69226666D1/de
Publication of DE69226666T2 publication Critical patent/DE69226666T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742—Thin film unipolar transistors
    • H01L29/66772—Monocristalline silicon transistors on insulating substrates, e.g. quartz substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78645—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with multiple gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78645—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with multiple gate
    • H01L29/78648—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with multiple gate arranged on opposing sides of the channel
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/077—Implantation of silicon on sapphire
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/15—Silicon on sapphire SOS

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Thin Film Transistor (AREA)
DE69226666T 1991-01-09 1992-01-07 Verfahren zur Herstellung eines Mehrfachgate-Dünnfilmtransistors Expired - Fee Related DE69226666T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP3011623A JP2781468B2 (ja) 1991-01-09 1991-01-09 Ｓｏｉ型薄膜トランジスタの製造方法
JP3011642A JP2912714B2 (ja) 1991-01-09 1991-01-09 Ｓｏｉ型薄膜トランジスタ

Publications (2)

Publication Number Publication Date
DE69226666D1 true DE69226666D1 (de) 1998-09-24
DE69226666T2 DE69226666T2 (de) 1999-03-11

Family

ID=26347083

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69226666T Expired - Fee Related DE69226666T2 (de) 1991-01-09 1992-01-07 Verfahren zur Herstellung eines Mehrfachgate-Dünnfilmtransistors

Country Status (4)

Country Link
US (1) US5420048A (de)
EP (1) EP0494628B1 (de)
CA (1) CA2058513C (de)
DE (1) DE69226666T2 (de)

Families Citing this family (40)

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EP0459763B1 (de) 1990-05-29 1997-05-02 Semiconductor Energy Laboratory Co., Ltd. Dünnfilmtransistoren
TW237562B (de) 1990-11-09 1995-01-01 Semiconductor Energy Res Co Ltd
JP3255942B2 (ja) * 1991-06-19 2002-02-12 株式会社半導体エネルギー研究所 逆スタガ薄膜トランジスタの作製方法
US6979840B1 (en) * 1991-09-25 2005-12-27 Semiconductor Energy Laboratory Co., Ltd. Thin film transistors having anodized metal film between the gate wiring and drain wiring
JP3173854B2 (ja) 1992-03-25 2001-06-04 株式会社半導体エネルギー研究所 薄膜状絶縁ゲイト型半導体装置の作製方法及び作成された半導体装置
US5315143A (en) * 1992-04-28 1994-05-24 Matsushita Electric Industrial Co., Ltd. High density integrated semiconductor device
JP3254007B2 (ja) 1992-06-09 2002-02-04 株式会社半導体エネルギー研究所 薄膜状半導体装置およびその作製方法
JP2796249B2 (ja) * 1993-07-02 1998-09-10 現代電子産業株式会社 半導体記憶装置の製造方法
US6331717B1 (en) 1993-08-12 2001-12-18 Semiconductor Energy Laboratory Co. Ltd. Insulated gate semiconductor device and process for fabricating the same
JP3173926B2 (ja) 1993-08-12 2001-06-04 株式会社半導体エネルギー研究所 薄膜状絶縁ゲイト型半導体装置の作製方法及びその半導体装置
JP3613594B2 (ja) * 1993-08-19 2005-01-26 株式会社ルネサステクノロジ 半導体素子およびこれを用いた半導体記憶装置
US5477073A (en) * 1993-08-20 1995-12-19 Casio Computer Co., Ltd. Thin film semiconductor device including a driver and a matrix circuit
US5738731A (en) * 1993-11-19 1998-04-14 Mega Chips Corporation Photovoltaic device
KR950026032A (ko) * 1994-02-25 1995-09-18 김광호 다결정실리콘 박막트랜지스터의 제조방법
JP3377853B2 (ja) * 1994-03-23 2003-02-17 ティーディーケイ株式会社 薄膜トランジスタの作製方法
JPH07302912A (ja) 1994-04-29 1995-11-14 Semiconductor Energy Lab Co Ltd 半導体装置
JP3082671B2 (ja) * 1996-06-26 2000-08-28 日本電気株式会社 トランジスタ素子及びその製造方法
US5773331A (en) * 1996-12-17 1998-06-30 International Business Machines Corporation Method for making single and double gate field effect transistors with sidewall source-drain contacts
US6031269A (en) * 1997-04-18 2000-02-29 Advanced Micro Devices, Inc. Quadruple gate field effect transistor structure for use in integrated circuit devices
US5936280A (en) * 1997-04-21 1999-08-10 Advanced Micro Devices, Inc. Multilayer quadruple gate field effect transistor structure for use in integrated circuit devices
US5889302A (en) * 1997-04-21 1999-03-30 Advanced Micro Devices, Inc. Multilayer floating gate field effect transistor structure for use in integrated circuit devices
KR100267013B1 (ko) * 1998-05-27 2000-09-15 윤종용 반도체 장치 및 그의 제조 방법
US6207530B1 (en) 1998-06-19 2001-03-27 International Business Machines Corporation Dual gate FET and process
US6013936A (en) 1998-08-06 2000-01-11 International Business Machines Corporation Double silicon-on-insulator device and method therefor
JP4076648B2 (ja) 1998-12-18 2008-04-16 株式会社半導体エネルギー研究所 半導体装置
JP4008133B2 (ja) * 1998-12-25 2007-11-14 株式会社半導体エネルギー研究所 半導体装置
JP4202502B2 (ja) 1998-12-28 2008-12-24 株式会社半導体エネルギー研究所 半導体装置
US8158980B2 (en) 2001-04-19 2012-04-17 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device having a pixel matrix circuit that includes a pixel TFT and a storage capacitor
US6696223B2 (en) 1999-02-19 2004-02-24 Agilent Technologies, Inc. Method for performing photolithography
JP4267122B2 (ja) * 1999-02-19 2009-05-27 アバゴ・テクノロジーズ・イーシービーユー・アイピー（シンガポール）プライベート・リミテッド フォトリソグラフィ方法及びフォトリソグラフィを行うための装置構成
US6320228B1 (en) 2000-01-14 2001-11-20 Advanced Micro Devices, Inc. Multiple active layer integrated circuit and a method of making such a circuit
US6743680B1 (en) 2000-06-22 2004-06-01 Advanced Micro Devices, Inc. Process for manufacturing transistors having silicon/germanium channel regions
US6429484B1 (en) 2000-08-07 2002-08-06 Advanced Micro Devices, Inc. Multiple active layer structure and a method of making such a structure
US6709935B1 (en) 2001-03-26 2004-03-23 Advanced Micro Devices, Inc. Method of locally forming a silicon/geranium channel layer
US6492212B1 (en) * 2001-10-05 2002-12-10 International Business Machines Corporation Variable threshold voltage double gated transistors and method of fabrication
US20050003592A1 (en) * 2003-06-18 2005-01-06 Jones A. Brooke All-around MOSFET gate and methods of manufacture thereof
KR101065600B1 (ko) * 2003-08-28 2011-09-20 가부시키가이샤 한도오따이 에네루기 켄큐쇼 박막 트랜지스터, 박막 트랜지스터의 제조 방법 및 표시 장치의 제조 방법
US7312125B1 (en) 2004-02-05 2007-12-25 Advanced Micro Devices, Inc. Fully depleted strained semiconductor on insulator transistor and method of making the same
US9059294B2 (en) * 2010-01-07 2015-06-16 Sharp Kabushiki Kaisha Semiconductor device, active matrix substrate, and display device
US10647108B2 (en) * 2018-04-02 2020-05-12 Canon Kabushiki Kaisha Image recording apparatus

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US4263709A (en) * 1977-11-17 1981-04-28 Rca Corporation Planar semiconductor devices and method of making the same
JPS6083370A (ja) * 1983-10-14 1985-05-11 Hitachi Ltd 多結晶シリコン薄膜トランジスタ
US4727044A (en) * 1984-05-18 1988-02-23 Semiconductor Energy Laboratory Co., Ltd. Method of making a thin film transistor with laser recrystallized source and drain
JPH0752776B2 (ja) * 1985-01-24 1995-06-05 シャープ株式会社 薄膜トランジスタおよびその製造法
DE3688758T2 (de) * 1985-04-08 1994-02-10 Hitachi Ltd Dünnfilmtransistor auf isolierendem Substrat.
JPH0782996B2 (ja) * 1986-03-28 1995-09-06 キヤノン株式会社 結晶の形成方法
JPH0622245B2 (ja) * 1986-05-02 1994-03-23 富士ゼロックス株式会社 薄膜トランジスタの製造方法
JPS6453460A (en) * 1987-08-24 1989-03-01 Sony Corp Mos transistor
US5032883A (en) * 1987-09-09 1991-07-16 Casio Computer Co., Ltd. Thin film transistor and method of manufacturing the same
JPH0242761A (ja) * 1988-04-20 1990-02-13 Matsushita Electric Ind Co Ltd アクティブマトリクス基板の製造方法
US4907041A (en) * 1988-09-16 1990-03-06 Xerox Corporation Intra-gate offset high voltage thin film transistor with misalignment immunity
US5202572A (en) * 1988-09-21 1993-04-13 Fuji Xerox Co., Ltd. Thin film transistor
US4951113A (en) * 1988-11-07 1990-08-21 Xerox Corporation Simultaneously deposited thin film CMOS TFTs and their method of fabrication

Also Published As

Publication number Publication date
CA2058513A1 (en) 1992-07-10
DE69226666T2 (de) 1999-03-11
EP0494628B1 (de) 1998-08-19
US5420048A (en) 1995-05-30
EP0494628A2 (de) 1992-07-15
CA2058513C (en) 1997-03-18
EP0494628A3 (en) 1992-12-23

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee