DE69114881D1 - Analysevorrichtung zur Rettung von Halbleiterspeicherfehlern. - Google Patents

Analysevorrichtung zur Rettung von Halbleiterspeicherfehlern.

Info

Publication number
DE69114881D1
DE69114881D1 DE69114881T DE69114881T DE69114881D1 DE 69114881 D1 DE69114881 D1 DE 69114881D1 DE 69114881 T DE69114881 T DE 69114881T DE 69114881 T DE69114881 T DE 69114881T DE 69114881 D1 DE69114881 D1 DE 69114881D1
Authority
DE
Germany
Prior art keywords
semiconductor memory
analysis device
memory errors
saving semiconductor
saving
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69114881T
Other languages
English (en)
Other versions
DE69114881T2 (de
Inventor
Kenichi Fujisaki
Noboru Okino
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advantest Corp
Original Assignee
Advantest Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advantest Corp filed Critical Advantest Corp
Publication of DE69114881D1 publication Critical patent/DE69114881D1/de
Application granted granted Critical
Publication of DE69114881T2 publication Critical patent/DE69114881T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70Masking faults in memories by using spares or by reconfiguring
    • G11C29/72Masking faults in memories by using spares or by reconfiguring with optimized replacement algorithms
DE69114881T 1990-03-19 1991-03-15 Analysevorrichtung zur Rettung von Halbleiterspeicherfehlern. Expired - Fee Related DE69114881T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2069093A JP2842923B2 (ja) 1990-03-19 1990-03-19 半導体メモリ試験装置

Publications (2)

Publication Number Publication Date
DE69114881D1 true DE69114881D1 (de) 1996-01-11
DE69114881T2 DE69114881T2 (de) 1996-05-23

Family

ID=13392647

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69114881T Expired - Fee Related DE69114881T2 (de) 1990-03-19 1991-03-15 Analysevorrichtung zur Rettung von Halbleiterspeicherfehlern.

Country Status (5)

Country Link
US (1) US5410687A (de)
EP (1) EP0447995B1 (de)
JP (1) JP2842923B2 (de)
KR (1) KR950004622B1 (de)
DE (1) DE69114881T2 (de)

Families Citing this family (36)

* Cited by examiner, † Cited by third party
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JP2577120Y2 (ja) * 1993-04-15 1998-07-23 株式会社アドバンテスト 過剰パルス印加の禁止回路
JP3605150B2 (ja) * 1994-08-22 2004-12-22 株式会社アドバンテスト アドレスパターン発生器
US5610925A (en) * 1995-03-27 1997-03-11 Advantest Corporation Failure analyzer for semiconductor tester
JPH0935496A (ja) * 1995-07-12 1997-02-07 Advantest Corp メモリ試験装置
JPH0963300A (ja) * 1995-08-22 1997-03-07 Advantest Corp 半導体メモリ試験装置のフェイル解析装置
WO1997011381A1 (fr) * 1995-09-22 1997-03-27 Advantest Corporation Controleur de memoire
JPH09147600A (ja) * 1995-11-29 1997-06-06 Advantest Corp 半導体試験用救済アドレス解析方式
ATE200161T1 (de) * 1996-01-04 2001-04-15 Infineon Technologies Ag Vorrichtung und verfahren zur erfassung und bewertung eines räumlich diskreten punktmusters
JP3642904B2 (ja) * 1996-11-26 2005-04-27 株式会社アドバンテスト フェイルカウント方法及びその装置
JP2991138B2 (ja) * 1996-12-09 1999-12-20 日本電気株式会社 メモリlsiの不良解析方法
JP3367848B2 (ja) * 1996-12-10 2003-01-20 株式会社東芝 半導体デバイスのテスト装置
JPH10289165A (ja) * 1997-04-14 1998-10-27 Ando Electric Co Ltd Icテスタの不良解析装置及びicテスタのメモリデバイス測定装置
US6032264A (en) * 1997-04-22 2000-02-29 Micron Technology, Inc. Apparatus and method implementing repairs on a memory device
GB2369909B (en) * 1997-12-04 2002-08-28 Samsung Electronics Co Ltd Faulty cell repairing method for a semiconductor memory
US6049505A (en) * 1998-05-22 2000-04-11 Micron Technology, Inc. Method and apparatus for generating memory addresses for testing memory devices
US6175936B1 (en) * 1998-07-17 2001-01-16 Lucent Technologies Inc. Apparatus for detecting faults in multiple computer memories
US6425095B1 (en) * 1998-08-14 2002-07-23 Advantest Corporation Memory testing apparatus
DE19838861A1 (de) * 1998-08-26 2000-03-02 Siemens Ag Verfahren zur Reparatur von defekten Speicherzellen eines integrierten Speichers
US6240525B1 (en) * 1998-11-17 2001-05-29 Oak Technology, Inc. Method and apparatus for re-addressing defective memory cells
DE19901206C2 (de) * 1999-01-14 2003-02-06 Infineon Technologies Ag Verfahren zur Reparatur von defekten Speicherzellen eines integrierten Halbleiterspeichers
US6405333B1 (en) * 1999-03-31 2002-06-11 Teradyne, Inc. Fail array memory control circuit with selective input disable
JP4230061B2 (ja) * 1999-07-21 2009-02-25 株式会社アドバンテスト 不良救済解析器を搭載したメモリ試験装置
TW473728B (en) * 1999-07-22 2002-01-21 Koninkl Philips Electronics Nv A method for testing a memory array and a memory-based device so testable with a fault response signalizing mode for when finding predetermined correspondence between fault patterns signalizing one such fault pattern only in the form of a compressed resp
US6256757B1 (en) * 2000-01-24 2001-07-03 Credence Systems Corporation Apparatus for testing memories with redundant storage elements
US6553521B1 (en) * 2000-02-24 2003-04-22 Infineon Technologies, Richmond L.P. Method for efficient analysis semiconductor failures
US6907385B2 (en) * 2000-10-19 2005-06-14 Advantest Corporation Memory defect redress analysis treating method, and memory testing apparatus performing the method
US20020091965A1 (en) * 2000-12-22 2002-07-11 Mark Moshayedi System and method for early detection of impending failure of a data storage system
US20020108421A1 (en) * 2001-02-13 2002-08-15 Cunningham David H. Forming machine for sheets of formable material
DE10134654A1 (de) * 2001-07-20 2003-02-13 Infineon Technologies Ag Verfahren zur Fehleranalyse von Speichermodulen
US6751760B2 (en) * 2001-11-20 2004-06-15 Chipmos Technologies Inc. Method and system for performing memory repair analysis
EP1517334B1 (de) * 2003-09-16 2010-10-27 Infineon Technologies AG On-chip Diagnose-Vefahren und -Block zur Speicherreparatur mit gemischter Redundanz ("IO" Redundanz und "Word-register" Redundanz)
US8977912B2 (en) * 2007-05-07 2015-03-10 Macronix International Co., Ltd. Method and apparatus for repairing memory
TW200937438A (en) * 2008-02-20 2009-09-01 Inventec Corp A memory writing interference test system and method thereof
JP5087704B2 (ja) * 2009-07-13 2012-12-05 株式会社アドバンテスト 試験装置および救済解析方法
JP4956597B2 (ja) * 2009-10-05 2012-06-20 株式会社アドバンテスト 半導体試験装置
CN102893263B (zh) * 2011-05-16 2016-12-07 华为技术有限公司 内存检测方法和内存检测装置

Family Cites Families (11)

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Publication number Priority date Publication date Assignee Title
US3753244A (en) * 1971-08-18 1973-08-14 Ibm Yield enhancement redundancy technique
DE3069611D1 (en) * 1979-12-27 1984-12-13 Fujitsu Ltd Apparatus and method for testing semiconductor memory devices
US4460997A (en) * 1981-07-15 1984-07-17 Pacific Western Systems Inc. Memory tester having memory repair analysis capability
US4460999A (en) * 1981-07-15 1984-07-17 Pacific Western Systems, Inc. Memory tester having memory repair analysis under pattern generator control
US4736373A (en) * 1981-08-03 1988-04-05 Pacific Western Systems, Inc. Memory tester having concurrent failure data readout and memory repair analysis
DE3311427A1 (de) * 1983-03-29 1984-10-04 Siemens AG, 1000 Berlin und 8000 München Integrierter dynamischer schreib-lesespeicher
US4586178A (en) * 1983-10-06 1986-04-29 Eaton Corporation High speed redundancy processor
US4751656A (en) * 1986-03-10 1988-06-14 International Business Machines Corporation Method for choosing replacement lines in a two dimensionally redundant array
US4837747A (en) * 1986-11-29 1989-06-06 Mitsubishi Denki Kabushiki Kaisha Redundary circuit with a spare main decoder responsive to an address of a defective cell in a selected cell block
JPS63239696A (ja) * 1987-03-27 1988-10-05 Toshiba Corp 冗長回路付メモリの試験装置
JPH081755B2 (ja) * 1989-06-26 1996-01-10 日本電気株式会社 置換アドレス判定回路

Also Published As

Publication number Publication date
EP0447995A2 (de) 1991-09-25
JP2842923B2 (ja) 1999-01-06
EP0447995B1 (de) 1995-11-29
JPH03269279A (ja) 1991-11-29
US5410687A (en) 1995-04-25
DE69114881T2 (de) 1996-05-23
EP0447995A3 (en) 1992-09-23
KR950004622B1 (ko) 1995-05-03

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee