DE69017518D1 - Halbleiterspeicheranordnung. - Google Patents

Halbleiterspeicheranordnung.

Info

Publication number
DE69017518D1
DE69017518D1 DE69017518T DE69017518T DE69017518D1 DE 69017518 D1 DE69017518 D1 DE 69017518D1 DE 69017518 T DE69017518 T DE 69017518T DE 69017518 T DE69017518 T DE 69017518T DE 69017518 D1 DE69017518 D1 DE 69017518D1
Authority
DE
Germany
Prior art keywords
memory device
semiconductor memory
semiconductor
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69017518T
Other languages
English (en)
Other versions
DE69017518T2 (de
Inventor
Yoshio Okada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE69017518D1 publication Critical patent/DE69017518D1/de
Publication of DE69017518T2 publication Critical patent/DE69017518T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408—Address circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/18—Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
  • Dram (AREA)
DE69017518T 1989-06-08 1990-05-07 Halbleiterspeicheranordnung. Expired - Fee Related DE69017518T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1146518A JPH0748307B2 (ja) 1989-06-08 1989-06-08 半導体メモリ装置

Publications (2)

Publication Number Publication Date
DE69017518D1 true DE69017518D1 (de) 1995-04-13
DE69017518T2 DE69017518T2 (de) 1995-08-17

Family

ID=15409463

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69017518T Expired - Fee Related DE69017518T2 (de) 1989-06-08 1990-05-07 Halbleiterspeicheranordnung.

Country Status (5)

Country Link
US (1) US5295117A (de)
EP (1) EP0401521B1 (de)
JP (1) JPH0748307B2 (de)
KR (1) KR930008577B1 (de)
DE (1) DE69017518T2 (de)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5124584A (en) * 1990-10-22 1992-06-23 Sgs-Thomson Microelectronics, Inc. Address buffer circuit with transition-based latching
KR940010838B1 (ko) * 1991-10-28 1994-11-17 삼성전자 주식회사 데이타 출력 콘트롤 회로
US5327394A (en) * 1992-02-04 1994-07-05 Micron Technology, Inc. Timing and control circuit for a static RAM responsive to an address transition pulse
JP3212396B2 (ja) * 1993-01-14 2001-09-25 富士通株式会社 不揮発性半導体記憶装置
US5490113A (en) * 1994-06-15 1996-02-06 Digital Equipment Corporation Memory stream buffer
JP2684998B2 (ja) * 1994-09-29 1997-12-03 日本電気株式会社 半導体メモリ
US5650979A (en) * 1995-05-05 1997-07-22 Creative Integrated Systems, Inc. Semiconductor read-only VLSI memory
KR100190385B1 (ko) * 1995-06-07 1999-06-01 김영환 2스테이지 래치회로를 이용한 페이지 모드 마스크롬 및 그 제어방법
US5757718A (en) * 1996-02-28 1998-05-26 Nec Corporation Semiconductor memory device having address transition detection circuit for controlling sense and latch operations
US5903166A (en) * 1997-03-04 1999-05-11 Sgs-Thomson Microelectronics S.R.L. Circuit for immunizing an integrated circuit from noise affecting enable signals of the integrated circuit
KR100294650B1 (ko) * 1997-06-30 2001-07-12 박종섭 감지증폭기
JP3762558B2 (ja) 1998-12-28 2006-04-05 富士通株式会社 半導体記憶装置及び半導体記憶装置における出力信号の制御方法並びに出力信号制御回路
US6075751A (en) * 1999-01-15 2000-06-13 Intel Corporation Signal transition detector for asynchronous circuits
JP3409059B2 (ja) * 2000-07-26 2003-05-19 Ｎｅｃエレクトロニクス株式会社 半導体記憶装置
KR100439044B1 (ko) * 2001-06-29 2004-07-05 주식회사 하이닉스반도체 어드레스 천이 검출회로
US7165137B2 (en) * 2001-08-06 2007-01-16 Sandisk Corporation System and method for booting from a non-volatile application and file storage device
US7082525B2 (en) * 2002-10-02 2006-07-25 Sandisk Corporation Booting from non-linear memory
KR100608355B1 (ko) 2004-03-25 2006-08-08 주식회사 하이닉스반도체 메모리 장치의 동작 주파수 변동에 따른 내부 제어 신호의인에이블 구간을 제어하는 장치와 그 방법
US7268589B2 (en) * 2005-12-16 2007-09-11 Actel Corporation Address transition detector for fast flash memory device

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6057156B2 (ja) * 1978-05-24 1985-12-13 株式会社日立製作所 半導体メモリ装置
JPS5835783A (ja) * 1981-08-24 1983-03-02 Fujitsu Ltd 半導体メモリ
JPS58169383A (ja) * 1982-03-30 1983-10-05 Fujitsu Ltd 半導体記憶装置
JPS60254485A (ja) * 1984-05-31 1985-12-16 Nec Corp スタテイツク型半導体記憶装置
JPS615493A (ja) * 1984-06-20 1986-01-11 Hitachi Ltd 記憶装置
JPS6124091A (ja) * 1984-07-12 1986-02-01 Nec Corp メモリ回路
JPS62212749A (ja) * 1986-03-14 1987-09-18 Seiko Epson Corp 半導体記憶装置
US4947374A (en) * 1987-05-12 1990-08-07 Mitsubishi Denki Kabushiki Kaisha Semiconductor memeory device in which writing is inhibited in address skew period and controlling method thereof
JPH0736271B2 (ja) * 1988-05-23 1995-04-19 三菱電機株式会社 アドレス信号のノイズ検出回路

Also Published As

Publication number Publication date
US5295117A (en) 1994-03-15
EP0401521B1 (de) 1995-03-08
KR930008577B1 (ko) 1993-09-09
EP0401521A3 (de) 1992-06-24
EP0401521A2 (de) 1990-12-12
JPH0748307B2 (ja) 1995-05-24
DE69017518T2 (de) 1995-08-17
KR910001771A (ko) 1991-01-31
JPH0312095A (ja) 1991-01-21

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)
8339 Ceased/non-payment of the annual fee