DE69105674D1 - Verfahren zur Herstellung von Speichern mit Dünnfilmtransistoren. - Google Patents

Verfahren zur Herstellung von Speichern mit Dünnfilmtransistoren.

Info

Publication number
DE69105674D1
DE69105674D1 DE69105674T DE69105674T DE69105674D1 DE 69105674 D1 DE69105674 D1 DE 69105674D1 DE 69105674 T DE69105674 T DE 69105674T DE 69105674 T DE69105674 T DE 69105674T DE 69105674 D1 DE69105674 D1 DE 69105674D1
Authority
DE
Germany
Prior art keywords
memories
production
thin film
film transistors
transistors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69105674T
Other languages
English (en)
Other versions
DE69105674T2 (de
Inventor
Alberto Oscar Adan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Application granted granted Critical
Publication of DE69105674D1 publication Critical patent/DE69105674D1/de
Publication of DE69105674T2 publication Critical patent/DE69105674T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H10B10/12—Static random access memory [SRAM] devices comprising a MOSFET load element
    • H10B10/125—Static random access memory [SRAM] devices comprising a MOSFET load element the MOSFET being a thin film transistor [TFT]
    • F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F16—ENGINEERING ELEMENTS AND UNITS; GENERAL MEASURES FOR PRODUCING AND MAINTAINING EFFECTIVE FUNCTIONING OF MACHINES OR INSTALLATIONS; THERMAL INSULATION IN GENERAL
    • F16L—PIPES; JOINTS OR FITTINGS FOR PIPES; SUPPORTS FOR PIPES, CABLES OR PROTECTIVE TUBING; MEANS FOR THERMAL INSULATION IN GENERAL
    • F16L53/00—Heating of pipes or pipe systems; Cooling of pipes or pipe systems
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Thin Film Transistor (AREA)
  • Pipe Accessories (AREA)
DE69105674T 1990-09-05 1991-09-05 Verfahren zur Herstellung von Speichern mit Dünnfilmtransistoren. Expired - Fee Related DE69105674T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2236354A JP2599495B2 (ja) 1990-09-05 1990-09-05 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
DE69105674D1 true DE69105674D1 (de) 1995-01-19
DE69105674T2 DE69105674T2 (de) 1995-06-01

Family

ID=16999562

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69105674T Expired - Fee Related DE69105674T2 (de) 1990-09-05 1991-09-05 Verfahren zur Herstellung von Speichern mit Dünnfilmtransistoren.

Country Status (5)

Country Link
US (1) US5179033A (de)
EP (1) EP0475688B1 (de)
JP (1) JP2599495B2 (de)
KR (1) KR950004837B1 (de)
DE (1) DE69105674T2 (de)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69211329T2 (de) * 1992-03-27 1996-11-28 Ibm Verfahren zum Herstellen von pseudo-planaren Dünnschicht PFET-Anordnungen und hierdurch erzeugte Struktur
US5330929A (en) * 1992-10-05 1994-07-19 Motorola, Inc. Method of making a six transistor static random access memory cell
JPH06140631A (ja) * 1992-10-28 1994-05-20 Ryoden Semiconductor Syst Eng Kk 電界効果型薄膜トランジスタおよびその製造方法
KR100305123B1 (ko) * 1992-12-11 2001-11-22 비센트 비.인그라시아, 알크 엠 아헨 정적랜덤액세스메모리셀및이를포함하는반도체장치
US5377139A (en) * 1992-12-11 1994-12-27 Motorola, Inc. Process forming an integrated circuit
JP2518133B2 (ja) * 1993-02-12 1996-07-24 日本電気株式会社 スタティック型半導体記憶装置
US5650655A (en) * 1994-04-28 1997-07-22 Micron Technology, Inc. Integrated circuitry having electrical interconnects
JP2796249B2 (ja) * 1993-07-02 1998-09-10 現代電子産業株式会社 半導体記憶装置の製造方法
JP2689888B2 (ja) * 1993-12-30 1997-12-10 日本電気株式会社 半導体装置及びその製造方法
US5426324A (en) * 1994-08-11 1995-06-20 International Business Machines Corporation High capacitance multi-level storage node for high density TFT load SRAMs with low soft error rates
US5624863A (en) * 1995-07-17 1997-04-29 Micron Technology, Inc. Semiconductor processing method of forming complementary N-type doped and P-type doped active regions within a semiconductor substrate
US5599729A (en) * 1995-09-14 1997-02-04 Lg Semicon Co., Ltd. Static random access memory cell and method of fabricating the same
US5622884A (en) * 1996-05-30 1997-04-22 Winbond Electronics Corp. Method for manufacturing a semiconductor memory cell and a polysilicon load resistor of the semiconductor memory cell
EP0821412B1 (de) * 1996-06-17 2006-09-13 United Microelectronics Corporation Mit kugelartigen Siliziumkörnern bedeckte obere Elektrode für verbesserten Alphastrahlschutz in SRAMs
US5721167A (en) * 1997-02-10 1998-02-24 Motorola, Inc. Process for forming a semiconductor device and a static-random-access memory cell
US6069050A (en) * 1997-10-20 2000-05-30 Taiwan Semiconductor Manufacturing Company Cross-coupled capacitors for improved voltage coefficient
KR100268895B1 (ko) 1997-12-27 2000-10-16 김영환 박막트랜지스터 및 이의 제조방법
US6197629B1 (en) * 1998-11-19 2001-03-06 United Microelectronics Corp. Method of fabricating a polysilicon-based load circuit for static random-access memory
US7679979B1 (en) * 2008-08-30 2010-03-16 Fronteon Inc High speed SRAM
US7542331B1 (en) * 2007-10-16 2009-06-02 Juhan Kim Planar SRAM including segment read circuit

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR940002772B1 (ko) * 1984-08-31 1994-04-02 가부시기가이샤 히다찌세이사꾸쇼 반도체 집적회로 장치 및 그 제조방법
DE3671124D1 (de) * 1985-02-13 1990-06-13 Toshiba Kawasaki Kk Halbleiterspeicherzelle.
JPS61214555A (ja) * 1985-03-20 1986-09-24 Hitachi Ltd 半導体装置
JPH0685431B2 (ja) * 1985-06-10 1994-10-26 株式会社日立製作所 半導体装置
US4774203A (en) * 1985-10-25 1988-09-27 Hitachi, Ltd. Method for making static random-access memory device
JP2550119B2 (ja) * 1987-12-23 1996-11-06 株式会社日立製作所 半導体記憶装置
JPH01272148A (ja) * 1988-04-25 1989-10-31 Nec Corp 半導体記憶装置
JP2805765B2 (ja) * 1988-09-13 1998-09-30 ソニー株式会社 半導体メモリ装置
JPH0294471A (ja) * 1988-09-30 1990-04-05 Toshiba Corp 半導体記憶装置およびその製造方法
JPH0831534B2 (ja) * 1989-11-24 1996-03-27 シャープ株式会社 半導体記憶装置及びその製造方法

Also Published As

Publication number Publication date
KR950004837B1 (ko) 1995-05-13
DE69105674T2 (de) 1995-06-01
US5179033A (en) 1993-01-12
EP0475688A2 (de) 1992-03-18
JP2599495B2 (ja) 1997-04-09
JPH04115564A (ja) 1992-04-16
EP0475688B1 (de) 1994-12-07
KR930004676A (ko) 1993-03-23
EP0475688A3 (en) 1992-04-01

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Free format text: PATENTANWAELTE MUELLER & HOFFMANN, 81667 MUENCHEN

8339 Ceased/non-payment of the annual fee