DE68911425D1 - Hochintegrierte EPROM-Speicheranordnung. - Google Patents
Hochintegrierte EPROM-Speicheranordnung.Info
- Publication number
- DE68911425D1 DE68911425D1 DE89420286T DE68911425T DE68911425D1 DE 68911425 D1 DE68911425 D1 DE 68911425D1 DE 89420286 T DE89420286 T DE 89420286T DE 68911425 T DE68911425 T DE 68911425T DE 68911425 D1 DE68911425 D1 DE 68911425D1
- Authority
- DE
- Germany
- Prior art keywords
- highly integrated
- eprom memory
- memory arrangement
- integrated eprom
- arrangement
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Non-Volatile Memory (AREA)
- Semiconductor Memories (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR8810962A FR2635408B1 (fr) | 1988-08-11 | 1988-08-11 | Memoire de type eprom a haute densite d'integration |
Publications (2)
Publication Number | Publication Date |
---|---|
DE68911425D1 true DE68911425D1 (de) | 1994-01-27 |
DE68911425T2 DE68911425T2 (de) | 1994-06-23 |
Family
ID=9369371
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE68911425T Expired - Fee Related DE68911425T2 (de) | 1988-08-11 | 1989-07-31 | Hochintegrierte EPROM-Speicheranordnung. |
Country Status (6)
Country | Link |
---|---|
US (1) | US5016069A (de) |
EP (1) | EP0356346B1 (de) |
JP (1) | JP2923987B2 (de) |
KR (1) | KR900004018A (de) |
DE (1) | DE68911425T2 (de) |
FR (1) | FR2635408B1 (de) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5200637A (en) * | 1988-12-15 | 1993-04-06 | Kabushiki Kaisha Toshiba | MOS transistor and differential amplifier circuit with low offset |
JPH02211651A (ja) * | 1989-02-10 | 1990-08-22 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
EP0509697B1 (de) * | 1991-04-18 | 1999-06-09 | National Semiconductor Corporation | Gestapeltes Ätzverfahren für Koppelpunkt-EPROM-Matrizen |
US5397726A (en) * | 1992-02-04 | 1995-03-14 | National Semiconductor Corporation | Segment-erasable flash EPROM |
US5379253A (en) * | 1992-06-01 | 1995-01-03 | National Semiconductor Corporation | High density EEPROM cell array with novel programming scheme and method of manufacture |
EP0573169A1 (de) * | 1992-06-02 | 1993-12-08 | National Semiconductor Corporation | Segmentweise löschbares FLASH-EPROM |
US5401691A (en) * | 1994-07-01 | 1995-03-28 | Cypress Semiconductor Corporation | Method of fabrication an inverse open frame alignment mark |
DE19540309A1 (de) * | 1995-10-28 | 1997-04-30 | Philips Patentverwaltung | Halbleiterbauelement mit Passivierungsaufbau |
JP4281331B2 (ja) * | 2002-01-21 | 2009-06-17 | 株式会社デンソー | 不揮発性半導体記憶装置 |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3984822A (en) * | 1974-12-30 | 1976-10-05 | Intel Corporation | Double polycrystalline silicon gate memory device |
US4373248A (en) * | 1978-07-12 | 1983-02-15 | Texas Instruments Incorporated | Method of making high density semiconductor device such as floating gate electrically programmable ROM or the like |
US4377818A (en) * | 1978-11-02 | 1983-03-22 | Texas Instruments Incorporated | High density electrically programmable ROM |
US4258466A (en) * | 1978-11-02 | 1981-03-31 | Texas Instruments Incorporated | High density electrically programmable ROM |
US4360900A (en) * | 1978-11-27 | 1982-11-23 | Texas Instruments Incorporated | Non-volatile semiconductor memory elements |
US4328565A (en) * | 1980-04-07 | 1982-05-04 | Eliyahou Harari | Non-volatile eprom with increased efficiency |
GB2073487B (en) * | 1980-04-07 | 1984-04-04 | Harari E | Semiconductor memory device |
JPS6070766A (ja) * | 1983-09-26 | 1985-04-22 | Mitsubishi Electric Corp | 半導体装置の製造方法 |
US4698787A (en) * | 1984-11-21 | 1987-10-06 | Exel Microelectronics, Inc. | Single transistor electrically programmable memory device and method |
JPS61222175A (ja) * | 1985-03-01 | 1986-10-02 | Fujitsu Ltd | 半導体記憶装置の製造方法 |
US4597060A (en) * | 1985-05-01 | 1986-06-24 | Texas Instruments Incorporated | EPROM array and method for fabricating |
JPS61294870A (ja) * | 1985-06-21 | 1986-12-25 | Nec Corp | 不揮発性半導体記憶装置 |
US4855800A (en) * | 1986-03-27 | 1989-08-08 | Texas Instruments Incorporated | EPROM with increased floating gate/control gate coupling |
JPH01108778A (ja) * | 1987-10-21 | 1989-04-26 | Mitsubishi Electric Corp | 半導体記憶装置 |
US4947222A (en) * | 1988-07-15 | 1990-08-07 | Texas Instruments Incorporated | Electrically programmable and erasable memory cells with field plate conductor defined drain regions |
-
1988
- 1988-08-11 FR FR8810962A patent/FR2635408B1/fr not_active Expired - Lifetime
-
1989
- 1989-07-31 EP EP89420286A patent/EP0356346B1/de not_active Expired - Lifetime
- 1989-07-31 DE DE68911425T patent/DE68911425T2/de not_active Expired - Fee Related
- 1989-08-09 KR KR1019890011343A patent/KR900004018A/ko not_active Application Discontinuation
- 1989-08-11 JP JP1207051A patent/JP2923987B2/ja not_active Expired - Lifetime
- 1989-08-11 US US07/392,501 patent/US5016069A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH02181971A (ja) | 1990-07-16 |
DE68911425T2 (de) | 1994-06-23 |
JP2923987B2 (ja) | 1999-07-26 |
FR2635408A1 (fr) | 1990-02-16 |
FR2635408B1 (fr) | 1992-04-10 |
EP0356346A1 (de) | 1990-02-28 |
KR900004018A (ko) | 1990-03-27 |
EP0356346B1 (de) | 1993-12-15 |
US5016069A (en) | 1991-05-14 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |