DE60104761D1 - Frequenzsynthetisierer - Google Patents

Frequenzsynthetisierer

Info

Publication number
DE60104761D1
DE60104761D1 DE60104761T DE60104761T DE60104761D1 DE 60104761 D1 DE60104761 D1 DE 60104761D1 DE 60104761 T DE60104761 T DE 60104761T DE 60104761 T DE60104761 T DE 60104761T DE 60104761 D1 DE60104761 D1 DE 60104761D1
Authority
DE
Germany
Prior art keywords
frequency synthesizer
synthesizer
frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60104761T
Other languages
English (en)
Other versions
DE60104761T2 (de
Inventor
Ryoichi Yamada
Shunsuke Hirano
Yasunori Miyahara
Hisashi Adachi
Hisashi Takahashi
Hiroki Kojima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Application granted granted Critical
Publication of DE60104761D1 publication Critical patent/DE60104761D1/de
Publication of DE60104761T2 publication Critical patent/DE60104761T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
    • H03L7/1974—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division
    • H03L7/1976—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division using a phase accumulator for controlling the counter or frequency divider
DE60104761T 2000-04-17 2001-01-29 Frequenzsynthetisierer Expired - Lifetime DE60104761T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2000115190 2000-04-17
JP2000115190A JP2001298363A (ja) 2000-04-17 2000-04-17 周波数シンセサイザ装置とそれを用いた移動無線機

Publications (2)

Publication Number Publication Date
DE60104761D1 true DE60104761D1 (de) 2004-09-16
DE60104761T2 DE60104761T2 (de) 2004-12-30

Family

ID=18626884

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60104761T Expired - Lifetime DE60104761T2 (de) 2000-04-17 2001-01-29 Frequenzsynthetisierer

Country Status (5)

Country Link
US (1) US6728526B2 (de)
EP (1) EP1148648B1 (de)
JP (1) JP2001298363A (de)
CN (1) CN1199355C (de)
DE (1) DE60104761T2 (de)

Families Citing this family (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8385476B2 (en) 2001-04-25 2013-02-26 Texas Instruments Incorporated Digital phase locked loop
JP4828730B2 (ja) * 2001-07-05 2011-11-30 富士通株式会社 伝送装置
JP3612506B2 (ja) * 2001-09-04 2005-01-19 Ｎｅｃアクセステクニカ株式会社 移動携帯端末装置
US7388939B2 (en) * 2001-10-31 2008-06-17 Sirf Technology, Inc. Fractional-R frequency synthesizer
US7024171B2 (en) * 2003-02-25 2006-04-04 Icom America, Incorporated Fractional-N frequency synthesizer with cascaded sigma-delta converters
US7339861B2 (en) * 2003-04-21 2008-03-04 Matsushita Electric Industrial Co., Ltd. PLL clock generator, optical disc drive and method for controlling PLL clock generator
JP4434825B2 (ja) 2003-05-08 2010-03-17 パナソニック株式会社 インパルス波形生成装置
US6919744B2 (en) * 2003-08-20 2005-07-19 Agere Systems Inc. Spectrum profile control for a PLL and the like
KR100546388B1 (ko) * 2003-10-17 2006-01-26 삼성전자주식회사 무선 통신 시스템의 다중-대역 송수신기
JP4064338B2 (ja) * 2003-12-10 2008-03-19 松下電器産業株式会社 デルタシグマ型分数分周ｐｌｌシンセサイザ
DE102004014204B4 (de) 2004-03-23 2006-11-09 Infineon Technologies Ag Phasenregelkreis und Verfahren zur Phasenkorrektur eines frequenzsteuerbaren Oszillators
US7035369B2 (en) * 2004-05-12 2006-04-25 Harris Corporation Apparatus and method for a programmable clock generator
US20070201594A1 (en) * 2004-05-17 2007-08-30 Mitsubishi Electric Corporation Phase Locked Loop (Pll) Circuit, Its Phasing Method And Operation Analyzing Method
KR100666479B1 (ko) * 2004-08-30 2007-01-09 삼성전자주식회사 시그마 델타 변조기를 공유하는 수신 및 송신 채널 분수분주 위상 고정 루프를 포함한 주파수 합성기 및 그 동작방법
JP4862436B2 (ja) * 2005-03-31 2012-01-25 パナソニック株式会社 インパルス波形生成装置および高周波パルス波形生成装置
CN101072029B (zh) * 2006-05-12 2011-04-13 豪威国际控股有限公司 一种单芯片上多种精确时钟产生电路及其实现方法
JP4249769B2 (ja) * 2006-08-31 2009-04-08 エルピーダメモリ株式会社 Ｄｌｌ回路及びこれを備える半導体装置
JP3914257B1 (ja) 2006-10-10 2007-05-16 株式会社アドバンテスト シグマデルタ変調器およびフラクショナル周波数シンセサイザ
US7795937B2 (en) * 2008-03-26 2010-09-14 Mstar Semiconductor, Inc. Semi-digital delay locked loop circuit and method
CN101401987B (zh) * 2008-11-04 2010-12-29 深圳市蓝韵实业有限公司 一种频率相位控制器
CN102611436A (zh) * 2011-01-20 2012-07-25 中国科学院微电子研究所 用于60GHz无线通信的8:1结构40MHz晶振频率综合器
CN102611437A (zh) * 2011-01-20 2012-07-25 中国科学院微电子研究所 用于60GHz无线通信的4:1结构27MHz晶振频率综合器
CN102611435A (zh) * 2011-01-20 2012-07-25 中国科学院微电子研究所 用于60GHz无线通信的8:1结构27MHz晶振频率综合器
CN102611438A (zh) * 2011-01-24 2012-07-25 中国科学院微电子研究所 用于60GHz无线通信的1:1结构40MHz晶振频率综合器
CN102868393A (zh) * 2012-10-11 2013-01-09 中国科学院微电子研究所 一种用于毫米波无线通信的27MHz晶振频率综合器
CN102868394A (zh) * 2012-10-11 2013-01-09 中国科学院微电子研究所 一种用于毫米波无线通信的40MHz晶振频率综合器
CN103560785B (zh) * 2013-10-28 2017-05-10 中国电子科技集团公司第四十一研究所 一种产生相位相干信号的方法与装置
CN105245226A (zh) * 2015-11-13 2016-01-13 成都前锋电子仪器有限责任公司 一种用于无线电综合测量仪射频本振电路的点频生成电路
KR102434815B1 (ko) * 2019-01-02 2022-08-22 보에 테크놀로지 그룹 컴퍼니 리미티드 주파수 조절기 및 그 주파수 조절 방법, 및 전자 디바이스
CN112631547B (zh) * 2020-12-31 2024-01-16 陕西烽火电子股份有限公司 一种使用可编程逻辑器件实现频率合成器控制参数计算的高效方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2140232B (en) * 1983-05-17 1986-10-29 Marconi Instruments Ltd Frequency synthesisers
US4816774A (en) * 1988-06-03 1989-03-28 Motorola, Inc. Frequency synthesizer with spur compensation
US5070310A (en) * 1990-08-31 1991-12-03 Motorola, Inc. Multiple latched accumulator fractional N synthesis
US5166642A (en) * 1992-02-18 1992-11-24 Motorola, Inc. Multiple accumulator fractional N synthesis with series recombination
JP3218149B2 (ja) * 1994-06-15 2001-10-15 松下電器産業株式会社 周波数シンセサイザ
JP3327028B2 (ja) * 1995-02-14 2002-09-24 松下電器産業株式会社 周波数シンセサイザ
US5777521A (en) * 1997-08-12 1998-07-07 Motorola Inc. Parallel accumulator fractional-n frequency synthesizer
US6308049B1 (en) * 1998-12-21 2001-10-23 Texas Instruments Incorporated Fractional-spurs suppression scheme in frequency tracking multi-band fractional-N phase lock loop

Also Published As

Publication number Publication date
US20010036817A1 (en) 2001-11-01
EP1148648A1 (de) 2001-10-24
US6728526B2 (en) 2004-04-27
DE60104761T2 (de) 2004-12-30
CN1318901A (zh) 2001-10-24
CN1199355C (zh) 2005-04-27
JP2001298363A (ja) 2001-10-26
EP1148648B1 (de) 2004-08-11

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: PANASONIC CORP., KADOMA, OSAKA, JP