CN202487565U - 半导体装置 - Google Patents

半导体装置 Download PDF

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Publication number
CN202487565U
CN202487565U CN2012200693834U CN201220069383U CN202487565U CN 202487565 U CN202487565 U CN 202487565U CN 2012200693834 U CN2012200693834 U CN 2012200693834U CN 201220069383 U CN201220069383 U CN 201220069383U CN 202487565 U CN202487565 U CN 202487565U
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CN
China
Prior art keywords
lead frame
heat
semiconductor device
main side
interarea
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN2012200693834U
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English (en)
Chinese (zh)
Inventor
吉崎茂雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanken Electric Co Ltd
Original Assignee
Sanken Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanken Electric Co Ltd filed Critical Sanken Electric Co Ltd
Application granted granted Critical
Publication of CN202487565U publication Critical patent/CN202487565U/zh
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H01L2924/13055—Insulated gate bipolar transistor [IGBT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
CN2012200693834U 2011-02-28 2012-02-27 半导体装置 Expired - Fee Related CN202487565U (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2011-043144 2011-02-28
JP2011043144A JP2012182250A (ja) 2011-02-28 2011-02-28 半導体装置

Publications (1)

Publication Number Publication Date
CN202487565U true CN202487565U (zh) 2012-10-10

Family

ID=46961965

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2012200693834U Expired - Fee Related CN202487565U (zh) 2011-02-28 2012-02-27 半导体装置

Country Status (2)

Country Link
JP (1) JP2012182250A (ja)
CN (1) CN202487565U (ja)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104347531A (zh) * 2013-07-23 2015-02-11 西安永电电气有限责任公司 塑封式智能功率模块及其散热器结构
CN104659006A (zh) * 2013-11-19 2015-05-27 西安永电电气有限责任公司 一种塑封式ipm引线框架结构
CN107534025A (zh) * 2016-03-11 2018-01-02 新电元工业株式会社 半导体装置及其制造方法、引线框
CN107665875A (zh) * 2016-07-28 2018-02-06 三菱电机株式会社 半导体装置
CN109243986A (zh) * 2018-08-20 2019-01-18 浙江亚芯微电子股份有限公司 一种多芯片封装工艺
CN110942998A (zh) * 2019-12-06 2020-03-31 西安中车永电电气有限公司 一种ipm模块的芯片焊接方法

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2017154199A1 (ja) * 2016-03-11 2017-09-14 新電元工業株式会社 半導体装置及びリードフレーム

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2708320B2 (ja) * 1992-04-17 1998-02-04 三菱電機株式会社 マルチチップ型半導体装置及びその製造方法
JP3299421B2 (ja) * 1995-10-03 2002-07-08 三菱電機株式会社 電力用半導体装置の製造方法およびリードフレーム
JP5163069B2 (ja) * 2007-11-20 2013-03-13 株式会社デンソー 半導体装置
JP5257096B2 (ja) * 2009-01-23 2013-08-07 サンケン電気株式会社 半導体装置
JP2011029492A (ja) * 2009-07-28 2011-02-10 Mitsubishi Electric Corp 電力用半導体装置

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104347531A (zh) * 2013-07-23 2015-02-11 西安永电电气有限责任公司 塑封式智能功率模块及其散热器结构
CN104659006A (zh) * 2013-11-19 2015-05-27 西安永电电气有限责任公司 一种塑封式ipm引线框架结构
CN104659006B (zh) * 2013-11-19 2017-11-03 西安永电电气有限责任公司 一种塑封式ipm引线框架结构
CN107534025A (zh) * 2016-03-11 2018-01-02 新电元工业株式会社 半导体装置及其制造方法、引线框
CN107534025B (zh) * 2016-03-11 2020-03-17 新电元工业株式会社 半导体装置及其制造方法、引线框
CN107665875A (zh) * 2016-07-28 2018-02-06 三菱电机株式会社 半导体装置
CN109243986A (zh) * 2018-08-20 2019-01-18 浙江亚芯微电子股份有限公司 一种多芯片封装工艺
CN109243986B (zh) * 2018-08-20 2020-04-14 浙江亚芯微电子股份有限公司 一种多芯片封装工艺
CN110942998A (zh) * 2019-12-06 2020-03-31 西安中车永电电气有限公司 一种ipm模块的芯片焊接方法

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CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20121010

Termination date: 20180227

CF01 Termination of patent right due to non-payment of annual fee