CN1893276B - 具有独立比例路径的时钟数据恢复回路 - Google Patents

具有独立比例路径的时钟数据恢复回路 Download PDF

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CN1893276B
CN1893276B CN2006100935230A CN200610093523A CN1893276B CN 1893276 B CN1893276 B CN 1893276B CN 2006100935230 A CN2006100935230 A CN 2006100935230A CN 200610093523 A CN200610093523 A CN 200610093523A CN 1893276 B CN1893276 B CN 1893276B
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loop
signal
frequency
phase
error signal
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CN1893276A (zh
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S·王
H·梅
B·贝若扎
T·克瓦希涅夫斯基
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Altera Corp
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
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    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/354—Astable circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
    • H03B5/08—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
    • H03B5/12—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
    • H03B5/1206—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device using multiple transistors for amplification
    • H03B5/1212—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device using multiple transistors for amplification the amplifier comprising a pair of transistors, wherein an output terminal of each being connected to an input terminal of the other, e.g. a cross coupled pair
    • H—ELECTRICITY
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    • H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
    • H03B5/08—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
    • H03B5/12—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
    • H03B5/1228—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device the amplifier comprising one or more field effect transistors
    • H—ELECTRICITY
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    • H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
    • H03B5/08—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
    • H03B5/12—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
    • H03B5/1237—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device comprising means for varying the frequency of the generator
    • H03B5/124—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device comprising means for varying the frequency of the generator the means comprising a voltage dependent capacitance
    • H03B5/1243—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device comprising means for varying the frequency of the generator the means comprising a voltage dependent capacitance the means comprising voltage variable capacitance diodes
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    • H03L7/08—Details of the phase-locked loop
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    • H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
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    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/093—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
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    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
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    • H03L7/113—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using frequency discriminator
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
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    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/14—Details of the phase-locked loop for assuring constant frequency when supply or correction voltages fail or are interrupted
    • H—ELECTRICITY
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    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/095—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using a lock detector
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H03L7/0995—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator comprising a ring oscillator
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0004—Initialisation of the receiver
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    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop

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Abstract

一种可用于宽范围数据率上并保持二阶特性的时钟数据恢复回路，其包括非线性(例如开关式)相位检测器、电荷泵、RC回路滤波器和信号发生器(例如压控振荡器(VCO))。在低数据率，所述回路可由具有稳定的二阶特性的电荷泵和回路滤波器操作，回路滤波器的电阻器R充当比例路径。也提供独立比例路径，其将相位检测器输出直接提供给VCO的控制输入，而回路滤波器的电阻器R也被绕过。由于增大的数据率会引起三阶效应，因此可激活独立比例路径，以保持二阶特性。

Description

具有独立比例路径的时钟数据恢复回路
技术领域
本发明涉及时钟数据恢复(CDR)应用。更具体地，本发明涉及具有独立比例路径以提高回路稳定性的开关式(Bang-Bang)时钟数据恢复回路。
背景技术
显然，数字***都是由时钟同步的。当在数字***中采样数据时，重要的是要具有准确的时钟，从而能够在尽可能接近数据眼(dataeye)的中心处进行采样，一般准确读取数据。当时钟与数据一起发送时，这是相对简单的。但是，当必须从数据中恢复时钟时，时钟恢复误差或错误就使得让采样时间位于数据眼的中心变得困难或不可靠。任何这类问题在可编程逻辑器件中要被解决，在可编程逻辑器件中电路通道以及时钟恢复电路在不同的用户逻辑设计之间是不同的。
时钟恢复通常是使用回路电路——也就是锁相环(PLL)或延迟锁定环(DLL)实现的，在回路电路中相位检测器检测输入信号和恢复信号之间的相位变化，导致电荷泵改变振荡器或延迟线(例如压控振荡器或者电流控制的振荡器)的控制信号(也就是电压或电流)，以使恢复的信号回到和输入信号校准。控制信号中的变化或波动可导致振荡器输出中不可接受的抖动，引起时钟恢复误差，其又导致数据读取误差。
时钟数据恢复回路的一种类型的相位检测器是被称为开关式相位检测器的非线性相位检测器，当开关式相位检测器被用于时钟数据恢复回路电路中时，回路稳定性会被和回路滤波器并联的寄生电容或其他电容影响，特别是在高频情况下，这可引起三阶效应。
希望能够提供一种稳定性增加的开关式时钟数据恢复回路。
发明内容
本发明通过在开关式时钟数据恢复回路中提供可用于不同频率或数据率范围的替代路径增强了该回路中的稳定性。在相对较低的频率或数据率情况下，寄生电容的影响较小，所述回路以常规方式工作，其优选具有RC回路滤波器。和回路滤波器并联的任何寄生电容或其他电容的影响是可忽略的。因此，所述回路作为一种很好理解的稳定的二阶回路工作，回路滤波器电阻器R充当“比例路径”且回路滤波器电容器C充当“积分路径”。
在较高的频率或数据率，寄生电容或其他电容的影响是更显著的，并且所引起的三阶效应会使回路稳定性下降、回路设计困难。通过增加回路滤波器中的电容，使得寄生电容或其他电容较不显著，可减少该效应和增强稳定性。但是，虽然片外解决方案(在回路滤波器中使用片外电容器，其能够如所需的一样大)是可用的，但是由于较大电容器对器件面积的要求，因此增加电容在片内解决方案中是困难的。
本发明为一种时钟数据恢复电路提供了片内解决方案，所述电路通过在更高的数据率引入独立比例路径，能够在宽范围数据率上以稳定的二阶模式工作。因此，在较低的数据率，所述电路如前所述那样常规地工作。在较高的数据率，RC回路滤波器中的电阻器可被绕过。这具有产生单一电容(RC回路滤波器的实际电容器和寄生电容的并联组合)的效果，将所述回路返回到二阶状态。因为电阻器充当如上所述的比例路径，所以当电阻器被绕过时，开关式相位检测器的开关式信号输出也通过独立比例路径被直接输入到回路电路的信号发生器(例如压控振荡器)，绕过电荷泵和回路滤波器。可在这个输入处提供变容二极管，其优选被确定尺寸以生成小的频率步进值(将在后文进行详细讨论)，并且接收开关式信号输出。这允许开关式相位检测器的输出控制信号发生器。
因此，根据本发明，提供了一种回路电路，其包括主回路，该主回路具有用于产生所述回路电路的输出的信号发生器；接受该输出和数据信号作为输入并且提供至少一个相位误差信号的相位检测器；响应这个至少一个相位误差信号的电荷泵；由该电荷泵充电的回路滤波器，其包括一个电阻器和一个电容器，并且提供回路滤波器输出作为到该信号发生器的输入；用于可控地绕过所述电阻器的旁路电路，以及用于将所述相位误差信号可控地直接传导到该信号发生器的替代路径。在低数据率，所述电阻器充当所述回路电路的比例路径，而在高数据率，所述替代路径充当独立比例路径。可为频率捕获提供次回路。还提供了操作所述回路电路的一种方法。
附图说明
在研究了以下结合附图给出的详细描述后，本发明的上述和其他优点将变得更加明显，附图中相同的参考标记指示相同的部件，其中：
图1是具有常规的RC回路滤波器的开关式时钟数据恢复回路的示意图；
图2是具有明确的独立比例路径的开关式时钟数据恢复回路的示意图；
图3是一个电路的示意图，该电路包括根据本发明的开关式时钟数据恢复回路的优选实施例以及频率捕获回路；
图4是具有两个控制输入的第一示例压控振荡器的示意图，其可用于本发明中；
图5是具有两个控制输入的第二示例压控振荡器的示意图，其可用于本发明中；和
图6是一个***的示意图，该***包括结合了本发明的可编程逻辑器件。
具体实施方式
现在将参考图1-图4描述本发明。
图1示出了一个传统的开关式时钟数据恢复回路10，其中数据11被输入到开关式相位检测器12，导致上升/下降(UP/DOWN)开关式控制信号13控制电荷泵14。电荷泵14给回路滤波器15充电和放电，回路滤波器15包括电阻器R 150和电容器C1 151。回路滤波器15提供控制信号16，其控制信号发生器比如压控振荡器(VCO)17。信号发生器(例如VCO 17)的输出优选被反馈给相位检测器12，在相位检测器12比较它的相位和数据信号11的相位，以生成控制信号13。在这个公知回路中，电阻器R 150充当“比例”路径而电容器C1 151充当“积分”路径。
前面描述的回路10描述了一个理想情况。在实际中，以虚线示为电容器C2 152的寄生和其他电容(例如可在VCO 17的输入处提供的变容二极管的电容)将回路10变成“三阶”回路，回路10在理想情况下可被描述为具有极好理解的稳定特性的“二阶”回路，三阶回路具有更复杂并且不太稳定的特性。
图2中示出了开关式时钟数据恢复回路20的一个替代实施例。在这个实施例中，从回路滤波器25去除了电阻器R，回路滤波器25只包括电容器C 251。独立比例路径21代替R，将开关式相位检测器12的输出直接传送到VCO 17(或者其他信号发生器)的输入。
如上所述，在回路10中，电阻器R可以被认为是比例路径。在回路10或回路20中，如果在比例路径中的相位变化被表示为Δθb，而积分路径中的相位变化被表示为Δθi，那么回路稳定性ξ被定义为Δθb和Δθi之比：
ξ＝Δθb/Δθi
在回路10在低数据率的情况下，C2的影响是可忽略的：
ξ二阶＝Δθb/Δθi＝2RC1fbaud
其中fbaud是输入数据的频率或数据率。在回路20的情况，
ξ二阶＝Δθb/Δθi＝2Cfbbfbaud/(IcpKvco)
其中fbb是相位检测器12的开关式频率步进值，Icp是电荷泵电流，并且Kvco是VCO增益。由于C1和C2缩变为单一电容C(两个并联电容的组合)，因此不会出现寄生电容。比较前面两个表达式，显示在低频率或数据率，fbb或者更具体地fbb/(IcpKvco)取代R，并且稳定性仍然和R成比例。
但是在更高的频率或数据率，C2的影响不再是可忽略的，并且它的存在开始有影响，将所述***变成三阶***。将结果有影响的电阻R新和电容C新作为复数对待，产生：
R新C新＝RC1 2/(C1+C2+R2C1 2C2ω2)
结果，
ξ三阶＝2R新C新fbaud＝2RC1 2/(C1+C2+4π2R2C1 2C2fbaud 2)
类似地，
fbb＝IcpR新Kvco＝IcpKvcoRC1 2/((C1+C2)2+4π2R2C1 2C2 2fbaud 2)
由此可知，在较低数据率和R成正比的稳定性在较高数据率就变成和R成反比。
可以显示的是，对于三阶回路，在相对较低的数据率(例如大约1Gbps)，如果C2＝C1/1000，波动或抖动就在公差规定内并且较大的R提高了抖动公差。另一方面，在较高的数据率(例如大约3.125Gbps)，如果C2＝C1/1000，抖动就是几乎不能容忍的，而且较小的R提高了抖动公差。这使得难以为宽范围的数据率设计三阶回路。
另一方面，对于具有独立比例路径的二阶回路，fbb的上限是由自生成的振荡抖动确定的，振荡抖动和fbb/fbaud成比例。因此，设计具有独立比例路径并且保持抖动在公差内的宽范围的开关式时钟数据恢复回路是相对简单的，并且可通过保持合适的fbb/fbaud比来实现——例如：
fbb/fbaud≈1/1000
图3中示出了宽范围的开关式时钟数据恢复电路30的一个优选实际实施例。时钟数据恢复电路30优选利用双回路架构。优选地，在启动时使用下面的次回路300，以使频率处于上面的主回路310的捕获范围内，主回路310然后被用于时钟数据恢复(至少直到时钟丢失)。回路300和310优选共享常规的电荷泵31，常规的RC回路滤波器32和VCO 33(虽然可以使用有微小改变的其他类型的信号发生器，比如电流控制的振荡器，如对于本领域技术人员显而易见的)。
回路300还包括相位-频率检测器(PFD)301和反馈计数器/分频器302，分频器302将反馈输出信号除以M，以将输出频率乘以M，如频率合成中所公知的。锁定检测器303优选比较反馈信号和输入参考信号304，并且当检测到频率锁定时，通过使用多路复用器(MUX)34选择开关式相位检测器311的输出将电路30切换到回路310。只要保持相位锁定，回路310就仍然被选定。
在足够低的输入数据率fbaud，回路310作为具有RC回路滤波器32的常规二阶回路工作。但是回路310优选也具有可选的独立比例路径312，其从开关式相位检测器311的输出到VCO 33的输入。在路径312中将由开关式信号直接控制的小变容二极管313优选提供给VCO 33的次频率控制42(参见图4)。优选地，该变容二极管被定尺寸以提供满足上面讨论的关系的频率步进值fbb——即fbb/fbaud≈1/1000。当比例路径312通过闭合开关314被激活时，独立的旁路路径315也通过闭合开关316而被激活，以将回路滤波器32的电阻器R 150从电路去除。
任何给定的电路能够被用于达到某个数据率(其是特定电路的参数的函数)，具有稳定的可预测结果。优选地，回路300被常规地使用，具有电荷泵31与回路滤波器32，直到超过这个数据率。但是，一旦超过了这个数据率，开关313、316就被闭合以绕过电阻器R 150并激活独立比例路径312来保持二阶特性。
图4示出了VCO 33的第一个示例实施例40，其能够被用于根据本发明的回路电路中。VCO 40优选是正交环VCO，其优选具有两个相同的交叉耦合的延迟级41、42。VCO 40优选提供正交相位时钟43-46，因此优选是适合半速率开关式时钟数据恢复应用的。
VCO 40优选具有两个控制输入401和402。控制401是主控制，其优选来自回路滤波器32。控制402优选是次控制，其优选来自开关式比例路径。主控制401优选确定VCO调谐范围，而次控制402(优选包括分开的上升和下降信号UP和DNB)优选确定开关式频率步进值fbb。因为如上所讨论的，fbb处于VCO中心频率0.1％的量级，所以次控制402的变容二极管412的大小需要是仅仅足够大，以提供这种频率步进值。
图5示出了VCO 33的第二个示例实施例50，其能够被用于根据本发明的回路电路中。VCO 50优选是基于LC振荡电路51，其具有提供主控制501的较大变容二极管511和提供次控制502的较小变容二极管512。如所示的，VCO 50是为全速率CDR操作设计的。但是，以类似于在正交环VCO 40中使用的方式，半速率操作的正交LCVCO(未示出)能够被配置成两个交叉耦合的级。
并入了根据本发明的时钟数据恢复电路的可编程逻辑器件(PLD)60可被用于许多类型的电子器件。一种可能的用法是在图6所示的数据处理***900中。数据处理***900可包括一个或多个以下组件：处理器901、存储器902、输入/输出(I/O)电路903、和***设备904。这些组件由***总线905连接在一起，并且组装在电路板906上，电路板906可包含在终端用户***907中。
***900可用于各种各样的广泛应用中，比如计算机联网、数据联网、仪器使用、视频处理、数字信号处理或希望使用可编程逻辑或重新可编程逻辑的优点的任何其他应用。PLD 60能够被用于执行各种不同的逻辑功能。例如，PLD 60能够被配置成和处理器901协作工作的处理器或控制器。PLD 60也能够被用作仲裁器，用于仲裁到***900中的共享资源的访问。在另一例子中，PLD 60能够被配置成处理器901和***900中一个其他组件之间的接口。应该说明的是，***900仅是示例性的，本发明的真正范围和精神由所附权利要求指出。
能够使用各种技术来实现上述结合了本发明的PLD 60。
应该理解的是，前面仅仅是本发明原理的解释说明而已，在不脱离本发明的范围和精神的情况下，本领域技术人员可进行各种修改，因此本发明仅由所附权利要求限定。

Claims (9)

1.一种用于宽范围数据率上时钟数据恢复的回路电路，所述回路电路包括：
信号发生器，其用于产生所述回路电路的输出；
相位检测器，其接受所述输出和数据信号作为输入，并且提供至少一个相位误差信号；
电荷泵，其响应所述至少一个相位误差信号；
回路滤波器，其由所述电荷泵充电，并且包括一个电阻器和一个电容器，且提供回路滤波器输出用于输入到所述信号发生器；
旁路电路，其用于在数据率的第一范围可控地绕过所述电阻器；和
替代路径，其与所述旁路电路分离，用于在所述电阻器被绕过时将所述相位误差信号可控地传导到所述信号发生器；由此：
在比所述数据率的第一范围更低的数据率的第二范围，所述电阻器没有被绕过并充当所述回路电路的比例路径；而
在所述数据率的第一范围，所述替代路径充当独立比例路径。
2.根据权利要求1所述的回路电路，其中所述信号发生器包括压控振荡器。
3.根据权利要求2所述的回路电路，其中所述替代路径包括变容二极管。
4.根据权利要求1所述的回路电路，其中所述相位检测器是非线性的。
5.根据权利要求4所述的回路电路，其中所述非线性相位检测器是开关式相位检测器。
6.根据权利要求1所述的回路电路，其中：
所述信号发生器、所述相位检测器、所述电荷泵、所述回路滤波器、所述旁路电路和所述替代路径形成一个主回路；所述回路电路还包括一个次回路，所述次回路包括：
用于对所述输出信号进行分频的反馈计数器；
相位-频率检测器，其接受所述分频输出信号和参考信号作为输入，并且输出相位-频率误差信号；和
选择器，其用于在所述相位误差信号和所述相位-频率误差信号之间选择，作为到所述电荷泵的输入；由此：
所述选择器选择所述相位-频率误差信号来激活所述次回路，用于频率捕获，以及选择所述相位误差信号来激活所述主回路，用于时钟数据恢复操作。
7.根据权利要求6所述的回路电路，进一步包括锁定检测器，其用于控制所述选择器，所述锁定检测器接受所述参考信号和所述反馈计数器的输出作为输入。
8.一种操作回路电路的方法，所述回路电路包括主回路，该主回路具有用于产生所述回路电路的输出的信号发生器；接受所述输出和数据信号作为输入并且提供至少一个相位误差信号的相位检测器；响应所述至少一个相位误差信号的电荷泵；由所述电荷泵充电的回路滤波器，其包括一个电阻器和一个电容器，并且提供回路滤波器输出作为到所述信号发生器的输入；用于可控地绕过所述电阻器的旁路电路，以及在所述电阻器被绕过时，用于将所述相位误差信号可控地传导到所述信号发生器的替代路径，所述替代路径与所述旁路电路分离；所述方法包括：
在所述数据信号具有在第一频率范围的频率时，操作所述可控的旁路电路不绕过所述电阻器，并且操作所述可控的替代路径不将所述相位误差信号传导到所述信号发生器，其中所述可控的替代路径与所述旁路电路分离；和
在所述数据信号具有比所述第一频率范围更高的第二频率范围的频率时，操作所述可控的旁路电路绕过所述电阻器，并且操作所述可控的替代路径将所述相位误差信号传导到所述信号发生器，其中所述可控的替代路径与所述旁路电路分离。
9.根据权利要求8所述的方法，进一步包括：
提供次回路，所述次回路包括：
用于对所述输出信号进行分频的反馈计数器，
相位-频率检测器，其接受所述分频输出信号和参考信号作为输入，并且输出相位-频率误差信号，和
选择器，其用于在所述相位误差信号和所述相位-频率误差信号之间选择，作为到所述电荷泵的输入；
操作所述选择器选择所述相位-频率误差信号来激活所述次回路，以使频率处于所述主回路的捕获范围内；以及
一旦使频率处于所述主回路的捕获范围内，就操作所述选择器选择所述相位误差信号，激活所述主回路并且停用所述次回路。
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