CN113594295B - Preparation method of solar cell with double-sided passivation structure - Google Patents
Preparation method of solar cell with double-sided passivation structure Download PDFInfo
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- CN113594295B CN113594295B CN202110836421.8A CN202110836421A CN113594295B CN 113594295 B CN113594295 B CN 113594295B CN 202110836421 A CN202110836421 A CN 202110836421A CN 113594295 B CN113594295 B CN 113594295B
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- 238000002161 passivation Methods 0.000 title claims abstract description 93
- 238000002360 preparation method Methods 0.000 title claims abstract description 10
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 59
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 59
- 239000010703 silicon Substances 0.000 claims abstract description 59
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 56
- 239000000758 substrate Substances 0.000 claims abstract description 38
- 229920005591 polysilicon Polymers 0.000 claims abstract description 29
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 26
- 238000004519 manufacturing process Methods 0.000 claims abstract description 23
- 229910052814 silicon oxide Inorganic materials 0.000 claims abstract description 22
- 230000003647 oxidation Effects 0.000 claims abstract description 15
- 238000007254 oxidation reaction Methods 0.000 claims abstract description 15
- 238000011065 in-situ storage Methods 0.000 claims abstract description 10
- 238000005498 polishing Methods 0.000 claims abstract description 4
- 238000000034 method Methods 0.000 claims description 42
- 238000005530 etching Methods 0.000 claims description 13
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 11
- 230000005641 tunneling Effects 0.000 claims description 9
- 238000004518 low pressure chemical vapour deposition Methods 0.000 claims description 7
- 239000002184 metal Substances 0.000 claims description 7
- 238000009792 diffusion process Methods 0.000 claims description 6
- 238000001039 wet etching Methods 0.000 claims description 6
- 238000002294 plasma sputter deposition Methods 0.000 claims description 5
- 238000000151 deposition Methods 0.000 claims description 4
- 230000008021 deposition Effects 0.000 claims description 4
- 238000009713 electroplating Methods 0.000 claims description 3
- 230000008020 evaporation Effects 0.000 claims description 3
- 238000001704 evaporation Methods 0.000 claims description 3
- 238000007650 screen-printing Methods 0.000 claims description 3
- 238000000992 sputter etching Methods 0.000 claims description 3
- 235000012239 silicon dioxide Nutrition 0.000 claims description 2
- 239000000377 silicon dioxide Substances 0.000 claims description 2
- 238000006243 chemical reaction Methods 0.000 abstract description 4
- 239000002131 composite material Substances 0.000 abstract description 3
- 238000010586 diagram Methods 0.000 description 8
- 230000000694 effects Effects 0.000 description 4
- 229910021419 crystalline silicon Inorganic materials 0.000 description 3
- XYFCBTPGUUZFHI-UHFFFAOYSA-N Phosphine Chemical compound P XYFCBTPGUUZFHI-UHFFFAOYSA-N 0.000 description 2
- UORVGPXVDQYIDP-UHFFFAOYSA-N borane Chemical compound B UORVGPXVDQYIDP-UHFFFAOYSA-N 0.000 description 2
- 238000001020 plasma etching Methods 0.000 description 2
- 239000000243 solution Substances 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 239000012670 alkaline solution Substances 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910000085 borane Inorganic materials 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 239000010408 film Substances 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910000073 phosphorus hydride Inorganic materials 0.000 description 1
- 238000013082 photovoltaic technology Methods 0.000 description 1
- 238000007517 polishing process Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
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- H—ELECTRICITY
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- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0216—Coatings
- H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/02167—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
- H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/186—Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
- H01L31/1868—Passivation
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- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/546—Polycrystalline silicon PV cells
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- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/547—Monocrystalline silicon PV cells
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
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Abstract
The invention discloses a preparation method of a solar cell with a double-sided passivation structure, which is characterized by comprising the following steps of: s100, selecting a silicon wafer as a silicon substrate of a battery, and performing texturing or polishing treatment on the front surface and the back surface of the silicon substrate; s200, manufacturing a first silicon oxide passivation layer on the front surface and the back surface of the silicon substrate, and forming a polysilicon layer on the first silicon oxide passivation layer; s300, performing N-type in-situ doping treatment on the polycrystalline silicon layer to generate an N-type doped polycrystalline silicon passivation layer; s400, forming an oxidation protection layer on the N-type doped polycrystalline silicon passivation layer. The invention provides a preparation method for manufacturing a solar cell forming structure, which can well form each layered structure on a silicon substrate, and the front and back surfaces tunnel through a composite polycrystalline silicon passivation layer in passivation contact, so that the prepared silicon bottom cell has high open circuit voltage, is particularly suitable for preparing a multi-junction laminated solar cell, and has higher photoelectric conversion efficiency.
Description
Technical Field
The invention relates to the technical field of solar cells, in particular to a preparation method of a solar cell with a double-sided passivation structure.
Background
Photovoltaic energy has been developed very rapidly in recent years as one of the most important renewable energy sources. Solar cells are the most important part of photovoltaic energy systems, and improving the photoelectric conversion efficiency is the most important way to reduce the cost of photovoltaic energy.
The current industrialized crystalline silicon photovoltaic cells gradually approach the bottleneck, the efficiency improvement is smaller, and the laminated photovoltaic cells provide the most favorable theoretical technical support for reducing the electricity cost of photovoltaic energy due to the higher ultimate efficiency.
The perovskite material has the characteristics of low cost, adjustable band gap and the like, and the perovskite-crystalline silicon laminated solar cell combined with the silicon bottom cell can improve the efficiency limit of the silicon solar cell to more than 40%, so that the perovskite-crystalline silicon laminated solar cell is considered to be the most promising next generation photovoltaic technology in the photovoltaic industry.
The front surface of the bottom cell is generally polished and unpassivated with an emitter, so that the lamination voltage is low to affect the overall photoelectric conversion efficiency. Based on the defect, a silicon bottom cell structure suitable for double-sided tunneling passivation contact of a multi-junction laminated solar cell needs to be redesigned, and a manufacturing process method is designed according to the structural characteristics of the silicon bottom cell structure.
Disclosure of Invention
In view of the above circumstances, the present invention provides a method for manufacturing a solar cell with a double-sided passivation structure, which comprises the following steps:
the preparation method of the solar cell with the double-sided passivation structure comprises the following steps:
s100, selecting a silicon wafer as a silicon substrate of a battery, and performing texturing or polishing treatment on the front surface and the back surface of the silicon substrate;
s200, forming a first silicon oxide passivation layer on the front surface and the back surface of the silicon substrate, and forming a polysilicon layer on the first silicon oxide passivation layer;
s300, performing N-type in-situ doping treatment on the polycrystalline silicon layer to generate an N-type doped polycrystalline silicon passivation layer;
s400, forming an oxidation protection layer on the N-type doped polycrystalline silicon passivation layer;
s500, removing the oxidation protection layer, the N-type doped polycrystalline silicon passivation layer and the first silicon oxide passivation layer on one side of the back surface of the silicon substrate by an etching method until the silicon substrate is subjected to a tunneling structure;
s600, removing the oxidation protection layer on one side of the front surface of the silicon substrate by an etching method until the N-type doped polycrystalline silicon passivation layer is formed, so as to form a tunneling structure;
s700, manufacturing a second silicon dioxide passivation layer and a polycrystalline silicon passivation layer on one side of the front surface and the back surface of the silicon substrate;
s800, performing P type in-situ doping on the second polysilicon passivation layers formed on the two sides of the silicon substrate in the previous step to generate a P type doped polysilicon passivation layer;
s900, manufacturing an antireflection layer on the P-type doped polycrystalline silicon passivation layer on one side of the back surface of the silicon substrate;
s1000, manufacturing a metal bottom electrode layer on the antireflection layer obtained in the last step.
Further, in the step S200, the first silicon oxide passivation layer and the polysilicon layer, and the method of forming the oxidation protection layer in the step S400 may be one or more of low pressure chemical vapor deposition, plasma enhanced chemical vapor deposition, and sputtering.
Further, in the step S300, the process of forming the N-type doped polysilicon passivation layer includes a diffusion method.
Further, in the step S500, the etching method is one or both of ion etching and wet etching.
Further, in the step S600, the etching method is BOE/HF wet etching.
Further, in the step S700, the second passivation layer of silicon and the passivation layer of polysilicon are formed by one or more of low pressure chemical vapor deposition, plasma enhanced chemical vapor deposition and sputtering.
Further, in the step S800, the P-type in-situ doping method is a diffusion method.
Further, in the step S900, the method for forming the anti-reflection layer includes one or both of atomic deposition and plasma-enhanced chemical vapor deposition.
Further, in the step S900, the method for forming the anti-reflection layer includes one or both of atomic deposition and plasma-enhanced chemical vapor deposition.
Further, in the step S100, the method for manufacturing the metal bottom electrode layer includes one or more of evaporation, screen printing and electroplating.
The beneficial effects are that: the invention has reasonable design, novel structure and good effect, and provides the preparation method for manufacturing the solar cell forming structure, the method can well form each layered structure on the silicon substrate, the composite polycrystalline silicon passivation layer with front and back tunneling passivation contact, the effect of the double-sided passivation structure of the silicon wafer layer can improve the open circuit voltage of the silicon cell, the composite doped polycrystalline silicon passivation layer on the upper surface can be used as the middle tunneling layer of the laminated cell, the prepared silicon bottom cell has high open circuit voltage, and the preparation method is particularly suitable for the preparation of multi-junction laminated solar cells and has higher photoelectric conversion efficiency.
Drawings
Fig. 1 is a schematic structural diagram of the present invention formed after step S200.
Fig. 2 is a schematic structural diagram of the present invention formed after step S300.
Fig. 3 is a schematic structural diagram of the present invention formed after step S400.
Fig. 4 is a schematic structural diagram of the present invention formed after step S500.
Fig. 5 is a schematic structural diagram of the present invention formed after step S600.
Fig. 6 is a schematic structural diagram of the present invention formed after step S700.
Fig. 7 is a schematic structural diagram of the present invention formed after step S800.
Fig. 8 is a schematic structural diagram of the present invention formed after step S1000.
Detailed Description
The invention is further preferably illustrated in the following detailed description of embodiments in conjunction with the accompanying drawings and examples:
referring to fig. 1 to 8, a method for fabricating a solar cell with a double-sided passivation structure includes the steps of:
s100, selecting a silicon wafer as a silicon substrate 100 of a battery, and performing texturing or polishing treatment on the front surface and the back surface of the silicon substrate 100, wherein the silicon wafer is P-type silicon or N-type silicon;
s200, forming a first silicon oxide passivation layer 200 on the front surface and the back surface of the silicon substrate 100, and forming a polysilicon layer 300 on the first silicon oxide passivation layer 200, wherein in a specific operation, one or more of a low pressure chemical vapor deposition method, a plasma enhanced chemical vapor deposition method and a sputtering method are adopted to form the first silicon oxide passivation layer 200 and the polysilicon layer 300, and the formation is shown in FIG. 1;
s300, performing N-type in-situ doping treatment on the polycrystalline silicon layer to generate an N-type doped polycrystalline silicon passivation layer 400, wherein the process for generating the N-type doped polycrystalline silicon passivation layer 400 comprises a diffusion method in specific operation, and the formed structure is shown in figure 2;
s400, forming an oxidation protection layer 500 on the N-type doped polycrystalline silicon passivation layer 400, wherein during specific operation, one or more of a low-pressure chemical vapor deposition method, a plasma enhanced chemical vapor deposition method and a sputtering method are adopted to form the oxidation protection layer 500, and the formed structure is shown in figure 3;
s500, removing the oxidation protection layer 500, the N-type doped polysilicon passivation layer 400 and the first silicon oxide passivation layer 200 on the back side of the silicon substrate 100 by an etching method until the silicon substrate 100 forms a tunneling structure, wherein during specific operation, the etching method is one or two of ion etching and/or wet etching, and the formed structure is shown in FIG. 4;
s600, removing the oxidation protection layer 500 on one side of the front surface of the silicon substrate 100 by an etching method until the N-type doped polysilicon passivation layer 400 forms a tunneling structure, wherein in a specific operation, the etching method is BOE/HF wet etching, and the formed structure is shown in FIG. 5;
s700, forming a second silicon oxide passivation layer 200 'and a polysilicon passivation layer 400' on the front and back sides of the silicon substrate 100, and forming the second silicon oxide passivation layer 200 'and the polysilicon passivation layer 400' by one or more of low pressure chemical vapor deposition, plasma enhanced chemical vapor deposition and sputtering in a specific operation, wherein the formed structure is shown in fig. 6;
s800, performing P-type in-situ doping on the polysilicon passivation layers 400' formed on two sides of the silicon substrate 100 in the previous step to generate a P-type doped polysilicon passivation layer 600, wherein during specific operation, the P-type in-situ doping method is a diffusion method, and the formed structure is shown in FIG. 7;
s900, manufacturing an antireflection layer 700 on a P-type doped polycrystalline silicon passivation layer on one side of the back surface of the silicon substrate 100, wherein during specific operation, the manufacturing method of the antireflection layer comprises one or two of atomic deposition or plasma enhanced chemical vapor deposition;
s1000, a metal bottom electrode layer 800 is manufactured on the anti-reflection layer obtained in the last step, and in a specific operation, the manufacturing method of the metal bottom electrode layer 800 comprises one or more of evaporation, screen printing and electroplating, and the formed structure is shown in FIG. 8.
In addition to the above steps, in practice, cz lift-off fabrication is employed to form a silicon substrate 100 having a resistivity of 1-5 ohm. The two-sided polishing process of the silicon substrate 100 is performed by an alkaline solution. The first silicon oxide passivation layer 200 formed in step S200 has a thickness of 2nm, and the polysilicon layer 300 has a thickness of 30nm and is in a thin film shape. In step S300, the polysilicon layer 300 is co-doped by a phosphine to form an N-doped polysilicon passivation layer 400 with a doping concentration of 1.5×10 20 cm −3 . The thickness of the oxidation protection layer 500 is 80nm. In step S500, the oxide protection layer 500, the n-doped polysilicon passivation layer 400, and the first silicon oxide passivation layer 200 on the back surface of the silicon wafer may be removed by Reactive-Ion Etching (RIE) to form a light trapping back surface. In step S600, the oxidation protection layer 500 is removed by an HF/BOE solution. After the above two etching processes are completed, an etched concave-convex surface is formed, and a first silicon oxide passivation layer 200 'with a thickness of 2nm and a polysilicon passivation layer 400' with a thickness of 70nm can be deposited on the front and back surfaces of the silicon wafer in an co-located manner by a low-pressure vapor deposition method. In step S800, the P-doped polysilicon passivation layer 600 may be formed by co-doping the front and back polysilicon films with borane at a doping concentration of 3×10 20 cm −3 。
Example two
As shown in fig. 8, in the battery structure formed by the above method embodiment, the battery structure is a layered structure and includes a silicon substrate 100, the silicon substrate 100 is made of P-type silicon or N-type silicon, the upper surface and the lower surface of the silicon substrate 100 are textured or polished surfaces, the upper surface of the silicon substrate 100 is provided with an upper passivation layer having a passivation effect, the lower surface is provided with a lower passivation layer having a passivation effect, the lower surface of the lower passivation layer is provided with an anti-reflection layer, and the lower surface of the anti-reflection layer 700 is provided with a metal bottom electrode layer 800;
the upper passivation layer 200 includes a first silicon oxide passivation layer 200, an N-type doped polysilicon passivation layer 400, a second silicon oxide passivation layer 200', and a P-type doped polysilicon passivation layer 600 in this order from bottom to top;
the lower passivation layer includes a second silicon oxide passivation layer 200' and a P-type doped polysilicon passivation layer 600 in this order from top to bottom.
The foregoing describes in detail preferred embodiments of the present invention. It should be understood that numerous modifications and variations can be made in accordance with the concepts of the invention by one of ordinary skill in the art without undue burden. Therefore, all technical solutions which can be obtained by logic analysis, reasoning or limited experiments based on the prior art by the person skilled in the art according to the inventive concept shall be within the scope of protection defined by the claims.
Claims (7)
1. The preparation method of the solar cell with the double-sided passivation structure is characterized by comprising the following steps of:
s100, selecting a silicon wafer as a silicon substrate of a battery, and performing texturing or polishing treatment on the front surface and the back surface of the silicon substrate;
s200, forming a first silicon oxide passivation layer on the front surface and the back surface of the silicon substrate, and forming a polysilicon layer on the first silicon oxide passivation layer;
s300, performing N-type in-situ doping treatment on the polycrystalline silicon layer to generate an N-type doped polycrystalline silicon passivation layer;
s400, forming an oxidation protection layer on the N-type doped polycrystalline silicon passivation layer;
s500, removing the oxidation protection layer, the N-type doped polycrystalline silicon passivation layer and the first silicon oxide passivation layer on one side of the back surface of the silicon substrate by an etching method until the silicon substrate is subjected to a tunneling structure; the etching method is one or two of ion etching and wet etching;
s600, removing the oxidation protection layer on one side of the front surface of the silicon substrate by an etching method until the N-type doped polycrystalline silicon passivation layer is formed, so as to form a tunneling structure; the etching method is BOE/HF wet etching;
s700, manufacturing a second silicon dioxide passivation layer and a polycrystalline silicon passivation layer on one side of the front surface and the back surface of the silicon substrate;
s800, performing P type in-situ doping on the polycrystalline silicon passivation layers formed on the two sides of the silicon substrate in the previous step to generate a P type doped polycrystalline silicon passivation layer;
s900, manufacturing an antireflection layer on the P-type doped polycrystalline silicon passivation layer on one side of the back surface of the silicon substrate;
s1000, manufacturing a metal bottom electrode layer on the antireflection layer obtained in the last step.
2. The method for manufacturing a solar cell with a double-sided passivation structure according to claim 1, wherein: in step S200, the first silicon oxide passivation layer and the polysilicon layer, and the method for forming the oxidation protection layer in step S400 may be one or more of low pressure chemical vapor deposition, plasma enhanced chemical vapor deposition, and sputtering.
3. The method for manufacturing a solar cell with a double-sided passivation structure according to claim 1, wherein: in step S300, the process of forming the N-type doped polysilicon passivation layer includes a diffusion method.
4. The method for manufacturing a solar cell with a double-sided passivation structure according to claim 1, wherein: in step S700, the second passivation layer of silicon and the passivation layer of polysilicon are formed by one or more of low pressure chemical vapor deposition, plasma enhanced chemical vapor deposition, and sputtering.
5. The method for manufacturing a solar cell with a double-sided passivation structure according to claim 1, wherein: in step S800, the P-type in-situ doping method is a diffusion method.
6. The method for manufacturing a solar cell with a double-sided passivation structure according to claim 1, wherein: in step S900, the method for forming the anti-reflection layer includes one or both of atomic deposition and plasma enhanced chemical vapor deposition.
7. The method for manufacturing a solar cell with a double-sided passivation structure according to claim 1, wherein: in step S100, the method for manufacturing the metal bottom electrode layer includes one or more of evaporation, screen printing, and electroplating.
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103413838A (en) * | 2013-07-23 | 2013-11-27 | 新奥光伏能源有限公司 | Crystalline silicon solar cell and preparation method thereof |
| KR20150124292A (en) * | 2014-04-28 | 2015-11-05 | 엘지전자 주식회사 | Solar cell and method for manufacturing the same |
| CN107464855A (en) * | 2016-06-02 | 2017-12-12 | 上海神舟新能源发展有限公司 | Silica-based solar cell N-type surface tunnel oxide passivation contact for producing method |
| CN109888057A (en) * | 2019-03-01 | 2019-06-14 | 苏州润阳光伏科技有限公司 | Crystal silicon PERC solar cell passivation on double surfaces method |
| CN111312843A (en) * | 2018-12-11 | 2020-06-19 | 君泰创新（北京）科技有限公司 | Three-junction laminated solar cell and preparation method thereof |
| CN111628052A (en) * | 2020-07-13 | 2020-09-04 | 苏州腾晖光伏技术有限公司 | Preparation method of passivated contact battery |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109256440A (en) * | 2018-09-17 | 2019-01-22 | 浙江爱旭太阳能科技有限公司 | It is a kind of to be selectively passivated contact crystalline silicon solar cell comprising and preparation method thereof |
-
2021
- 2021-07-23 CN CN202110836421.8A patent/CN113594295B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103413838A (en) * | 2013-07-23 | 2013-11-27 | 新奥光伏能源有限公司 | Crystalline silicon solar cell and preparation method thereof |
| KR20150124292A (en) * | 2014-04-28 | 2015-11-05 | 엘지전자 주식회사 | Solar cell and method for manufacturing the same |
| CN107464855A (en) * | 2016-06-02 | 2017-12-12 | 上海神舟新能源发展有限公司 | Silica-based solar cell N-type surface tunnel oxide passivation contact for producing method |
| CN111312843A (en) * | 2018-12-11 | 2020-06-19 | 君泰创新（北京）科技有限公司 | Three-junction laminated solar cell and preparation method thereof |
| CN109888057A (en) * | 2019-03-01 | 2019-06-14 | 苏州润阳光伏科技有限公司 | Crystal silicon PERC solar cell passivation on double surfaces method |
| CN111628052A (en) * | 2020-07-13 | 2020-09-04 | 苏州腾晖光伏技术有限公司 | Preparation method of passivated contact battery |
Non-Patent Citations (1)
| Title |
|---|
| 氧化硅及多晶硅对TOPCon太阳能电池性能的影响;张嘉华;《浙江师范大学学报》;第44卷(第2期);全文 * |
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