CN115332366A - Back passivation contact heterojunction solar cell and preparation method thereof - Google Patents
Back passivation contact heterojunction solar cell and preparation method thereof Download PDFInfo
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- 238000002161 passivation Methods 0.000 title claims abstract description 192
- 238000002360 preparation method Methods 0.000 title claims abstract description 45
- 229910021424 microcrystalline silicon Inorganic materials 0.000 claims abstract description 268
- 229910021423 nanocrystalline silicon Inorganic materials 0.000 claims abstract description 267
- 238000000034 method Methods 0.000 claims abstract description 121
- 229910021419 crystalline silicon Inorganic materials 0.000 claims abstract description 109
- 239000000758 substrate Substances 0.000 claims abstract description 107
- 230000008569 process Effects 0.000 claims abstract description 87
- -1 boron ions Chemical class 0.000 claims abstract description 64
- 230000005641 tunneling Effects 0.000 claims abstract description 61
- 229910052796 boron Inorganic materials 0.000 claims abstract description 32
- 229910052698 phosphorus Inorganic materials 0.000 claims abstract description 32
- 239000011574 phosphorus Substances 0.000 claims abstract description 32
- 238000002347 injection Methods 0.000 claims abstract description 30
- 239000007924 injection Substances 0.000 claims abstract description 30
- 238000000137 annealing Methods 0.000 claims abstract description 27
- 150000002500 ions Chemical class 0.000 claims abstract description 24
- 239000010409 thin film Substances 0.000 claims abstract description 17
- 230000003647 oxidation Effects 0.000 claims abstract description 8
- 238000007254 oxidation reaction Methods 0.000 claims abstract description 8
- 239000010408 film Substances 0.000 claims description 87
- 229910052751 metal Inorganic materials 0.000 claims description 71
- 239000002184 metal Substances 0.000 claims description 71
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 claims description 42
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 claims description 40
- 238000002513 implantation Methods 0.000 claims description 33
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 32
- 238000000151 deposition Methods 0.000 claims description 27
- 238000002156 mixing Methods 0.000 claims description 24
- 239000007789 gas Substances 0.000 claims description 22
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 20
- 229910052786 argon Inorganic materials 0.000 claims description 20
- 150000008049 diazo compounds Chemical class 0.000 claims description 20
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 20
- 230000008021 deposition Effects 0.000 claims description 18
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 17
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 17
- 239000001301 oxygen Substances 0.000 claims description 17
- 229910052760 oxygen Inorganic materials 0.000 claims description 17
- 238000005530 etching Methods 0.000 claims description 16
- 229920002120 photoresistant polymer Polymers 0.000 claims description 16
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 claims description 14
- 239000012670 alkaline solution Substances 0.000 claims description 13
- 238000005137 deposition process Methods 0.000 claims description 12
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims description 12
- 239000000243 solution Substances 0.000 claims description 11
- 239000012298 atmosphere Substances 0.000 claims description 8
- 238000010438 heat treatment Methods 0.000 claims description 8
- 239000000654 additive Substances 0.000 claims description 7
- 230000000996 additive effect Effects 0.000 claims description 7
- 239000008367 deionised water Substances 0.000 claims description 7
- 229910021641 deionized water Inorganic materials 0.000 claims description 7
- 239000011259 mixed solution Substances 0.000 claims description 7
- 238000005498 polishing Methods 0.000 claims description 7
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 7
- 238000009713 electroplating Methods 0.000 claims description 6
- 239000012299 nitrogen atmosphere Substances 0.000 claims description 5
- 238000005245 sintering Methods 0.000 claims description 5
- 238000007650 screen-printing Methods 0.000 claims description 3
- 239000007788 liquid Substances 0.000 claims 1
- 238000006243 chemical reaction Methods 0.000 abstract description 19
- 230000009286 beneficial effect Effects 0.000 abstract description 6
- 230000001737 promoting effect Effects 0.000 abstract description 5
- 238000004519 manufacturing process Methods 0.000 description 15
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 13
- 230000006872 improvement Effects 0.000 description 13
- 229910052710 silicon Inorganic materials 0.000 description 13
- 239000010703 silicon Substances 0.000 description 13
- 230000003667 anti-reflective effect Effects 0.000 description 6
- 239000013078 crystal Substances 0.000 description 6
- 230000007547 defect Effects 0.000 description 5
- 235000013855 polyvinylpyrrolidone Nutrition 0.000 description 4
- 229920000036 polyvinylpyrrolidone Polymers 0.000 description 4
- 239000001267 polyvinylpyrrolidone Substances 0.000 description 4
- 230000002349 favourable effect Effects 0.000 description 3
- 238000005468 ion implantation Methods 0.000 description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 125000005842 heteroatom Chemical group 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- 238000007639 printing Methods 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 239000000969 carrier Substances 0.000 description 1
- 230000001276 controlling effect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000014759 maintenance of location Effects 0.000 description 1
- 239000002159 nanocrystal Substances 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 238000010248 power generation Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
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Abstract
The invention discloses a back passivation contact heterojunction solar cell and a preparation method thereof, wherein the cell comprises a crystalline silicon substrate, the back of the crystalline silicon substrate is provided with a back contact passivation structure which is formed by a tunneling oxidation layer, a P + doped nanocrystalline silicon/microcrystalline silicon layer, a nanocrystalline silicon/microcrystalline silicon layer and an N + doped nanocrystalline silicon/microcrystalline silicon layer which are alternately arranged, and a back antireflection passivation layer. The preparation method comprises the steps of injecting boron ions and phosphorus ions into the nanocrystalline silicon/microcrystalline silicon thin film at intervals in an ion injection mode and carrying out annealing treatment to form P + doping regions and N + doping regions which are alternately arranged. The back passivation contact heterojunction solar cell has the characteristic of high conversion efficiency which can reach more than 25%, and the preparation method has the advantages of simple process, convenience in operation, low cost and the like, is beneficial to conversion efficiency and yield of the cell, is suitable for large-scale preparation, is beneficial to industrial application, and has very important significance for promoting industrial application of HBC cells.
Description
Technical Field
The invention belongs to the technical field of solar cells, and relates to a back passivation contact heterojunction solar cell and a preparation method thereof.
Background
From the perspective of new energy forms in the world, photovoltaic power generation is the key point of new energy development. The photovoltaic industry as a new industry is developing continuously and rapidly, and cost reduction and efficiency improvement are the key points for promoting the development of photovoltaic. For solar cells, particularly back passivated contact heterojunction solar cells (HBC cells) combined by an all-back passivated contact heterojunction solar cell (IBC cell) and a heterojunction solar cell (HJT cell) have high conversion efficiency and are key development objects in the future of the photovoltaic industry, but the existing HBC cell manufacturing technology has the problems of complex process route, high equipment investment cost and the like. For example, some researchers have proposed a method for fabricating an interdigitated back contact cell, however, in this method, only a first silicon nitride layer and a second silicon nitride layer are formed on the back surface of the cell by a plasma enhanced chemical vapor deposition method as an anti-reflection layer, and a tunneling layer or an amorphous silicon layer is not used as a passivation layer, which is not favorable for the open-circuit voltage, so that the cell conversion efficiency is still poor. In contrast, researchers have proposed an HBC solar cell with a back contact passivation structure and a method for manufacturing the same, where a tunneling oxide layer is introduced into the back surface of the HBC solar cell, but a laser grooving region with a large width is used to separate an N + doping region from a P + doping region on the tunneling oxide layer, which is not beneficial to improving the mobility of carriers in the N + doping region and the P + doping region, and thus such a structure is also not beneficial to improving the conversion efficiency of the cell; meanwhile, the preparation method still has the defect of complex preparation process, and when the middle back passivation layer and the polysilicon layer are removed by adopting a laser grooving mode, the tunneling oxide layer is only 1-2nm thick, so that the complete retention of the tunneling oxide layer is difficult to realize by adopting the laser grooving mode, and the possibility of burning through of the tunneling oxide layer still exists, thereby reducing the conversion efficiency and the yield of the battery. Therefore, how to obtain the back passivation contact heterojunction solar cell with high conversion efficiency and the preparation method matched with the back passivation contact heterojunction solar cell with simple process, convenient operation and low cost has important significance for promoting the industrial application of the back passivation contact heterojunction solar cell.
Disclosure of Invention
The invention aims to overcome the defects of the prior art, provides a back passivation contact heterojunction solar cell with high conversion efficiency, and also provides a preparation method of the back passivation contact heterojunction solar cell with simple process, convenient operation and low cost.
In order to solve the technical problems, the invention adopts the technical scheme that:
a back passivation contact heterojunction solar cell comprises a crystalline silicon substrate, wherein a front passivation layer and a front antireflection passivation layer are sequentially arranged on the front side of the crystalline silicon substrate from inside to outside; a tunneling oxide layer is arranged on the back surface of the crystalline silicon substrate; the tunneling oxide layer is alternately provided with a P + doped nanocrystalline silicon/microcrystalline silicon layer, a nanocrystalline silicon/microcrystalline silicon layer and an N + doped nanocrystalline silicon/microcrystalline silicon layer, and the nanocrystalline silicon/microcrystalline silicon layer is positioned between the P + doped nanocrystalline silicon/microcrystalline silicon layer and the N + doped nanocrystalline silicon/microcrystalline silicon layer; a back antireflection passivation layer is arranged on the P + doped nanocrystalline silicon/microcrystalline silicon layer, the nanocrystalline silicon/microcrystalline silicon layer and the N + doped nanocrystalline silicon/microcrystalline silicon layer; a metal negative electrode and a metal positive electrode are further arranged on the back antireflection passivation layer; the metal negative electrode penetrates through the back antireflection passivation layer to form ohmic contact with the N + doped nanocrystalline silicon/microcrystalline silicon layer; the metal positive electrode penetrates through the back antireflection passivation layer to form ohmic contact with the P + doped nanocrystalline silicon/microcrystalline silicon layer.
In the back passivation contact heterojunction solar cell, the P + doped nanocrystalline silicon/microcrystalline silicon layer is obtained by mixing P + doped nanocrystalline silicon and P + doped microcrystalline silicon; the nanocrystalline silicon/microcrystalline silicon layer is formed by mixing hetero-nanocrystalline silicon and hetero-microcrystalline silicon; the width of the nanocrystalline silicon/microcrystalline silicon layer is 1-5 mu m; the N + doped nanocrystalline silicon/microcrystalline silicon layer is formed by mixing N + doped nanocrystalline silicon and N + doped microcrystalline silicon.
In the back passivation contact heterojunction solar cell, the sheet resistance of the P + doped nanocrystalline silicon/microcrystalline silicon layer is 30 omega/□ -80 omega/□; the thickness of the P + doped nanocrystalline silicon/microcrystalline silicon layer is 20 nm-150 nm; the square resistance of the N + doped nanocrystalline silicon/microcrystalline silicon layer is 70 omega/□ -120 omega/□; the thickness of the N + doped nanocrystalline silicon/microcrystalline silicon layer is 20 nm-150 nm.
In the back passivation contact heterojunction solar cell, the crystalline silicon substrate is an N-type monocrystalline silicon or a P-type monocrystalline silicon; the resistivity of the crystalline silicon substrate is 1 omega/□ -10 omega/□.
In the back passivation contact heterojunction solar cell, the front passivation layer is a silicon oxide film; the thickness of the front passivation layer is 50 nm-100 nm.
In the back passivation contact heterojunction solar cell, the front antireflection passivation layer is formed by two layers of SiN with different refractive indexes x The films are superposed; in the front antireflection passivation layer, the bottom layer is SiN with the refractive index of 2.1-2.2 x A film having a thickness of 30nm and a top layer of SiN having a refractive index of 1.6 to 1.6 x The film has a thickness of 45nm to 55nm.
In the back passivation contact heterojunction solar cell, the tunneling oxide layer is a silicon oxide film; the thickness of the tunneling oxide layer is 0.5 nm-2 nm.
In the back passivation contact heterojunction solar cell, the back antireflection passivation layer is further improved by SiN x A film; the thickness of the back antireflection passivation layer is 80 nm-90 nm.
In the above back passivated contact heterojunction solar cell, the metal negative electrode is an Ag electrode or a Cu electrode.
In the above back-passivated contact heterojunction solar cell, the metal positive electrode is an Ag electrode or a Cu electrode.
As a technical concept, the present invention also provides a method for manufacturing a back passivated contact heterojunction solar cell, comprising the steps of:
s1, polishing the back of a crystalline silicon substrate;
s2, depositing a tunneling oxide layer and an intrinsic amorphous silicon layer on the back surface of the crystalline silicon substrate in sequence;
s3, texturing the front side of the crystalline silicon substrate to form a pyramid textured surface;
s4, performing thermal oxidation annealing on the crystalline silicon substrate deposited with the tunneling oxide layer and the intrinsic amorphous silicon layer, forming a front passivation layer on the front side of the crystalline silicon substrate, and forming a nanocrystalline silicon/microcrystalline silicon thin film on the back side of the crystalline silicon substrate;
s5, injecting phosphorus ions and boron ions into the nanocrystalline silicon/microcrystalline silicon film at intervals in an ion injection mode;
s6, annealing the nanocrystalline silicon/microcrystalline silicon thin film injected with the phosphorus ions and the boron ions to form a P + doped nanocrystalline silicon/microcrystalline silicon layer, a nanocrystalline silicon/microcrystalline silicon layer and an N + doped nanocrystalline silicon/microcrystalline silicon layer which are alternately arranged;
s7, depositing an antireflection passivation layer on the front side and the back side of the crystalline silicon substrate;
and S8, respectively preparing a metal negative electrode and a metal positive electrode on the antireflection passivation layer on the back surface of the crystalline silicon substrate, and finishing the preparation of the back-to-back passivation contact heterojunction solar cell.
In the above method for manufacturing a back-passivated contact heterojunction solar cell, it is further improved that in step S5, phosphorus ions and boron ions are injected into the nanocrystalline silicon/microcrystalline silicon thin film at intervals by any one of the following methods;
the method comprises the following steps:
(1) Preparing a mask on the surface of a P + region on the back surface of the crystalline silicon substrate;
(2) Injecting phosphorus ions into the nanocrystalline silicon/microcrystalline silicon thin film in the N + region in an ion injection mode;
(3) Preparing a mask on the surface of the N + region;
(4) Removing the mask on the surface of the P + region, and injecting boron ions into the nanocrystalline silicon/microcrystalline silicon film of the P + region in an ion injection mode;
(5) And removing the mask on the surface of the N + region.
The method II comprises the following steps:
(a) Preparing a mask on the surface of an N + region on the back surface of the crystalline silicon substrate;
(b, injecting boron ions into the nanocrystalline silicon/microcrystalline silicon film in the P + region in an ion injection mode;
(c) Preparing a mask on the surface of the P + region;
(d) Removing the mask on the surface of the N + region, and injecting phosphorus ions into the nanocrystalline silicon/microcrystalline silicon film of the N + region in an ion injection mode;
(e) And removing the mask on the surface of the P + region.
In the preparation method of the back passivation contact heterojunction solar cell, the improvement is further that in the step (1), a mask is prepared on the surface of the N + region on the back surface of the crystalline silicon substrate by adopting the processes of exposure, development and etching; the mask is a diazo compound positive photoresist.
In the above method for manufacturing a back-passivated contact heterojunction solar cell, it is further improved that in the step (2), in the process of implanting the phosphorus ions, the implantation dose is 5 × 10 14 cm -2 ～2×10 15 cm -2 The implantation energy is 5keV to 50keV.
In the preparation method of the back passivation contact heterojunction solar cell, the further improvement is that in the step (3), the process of exposure, development and etching is adopted to prepare a mask on the surface of the N + region; the mask is a diazo compound positive photoresist.
In the preparation method of the back passivation contact heterojunction solar cell, the further improvement is that in the step (4), the mask on the surface of the P + region is removed in a laser grooving mode; in the process of implanting the boron ions, the implantation dosage is 5 multiplied by 10 14 cm -2 ～2×10 15 cm -2 Note thatThe incident energy is 5keV to 50keV.
In the above method for manufacturing a back-passivated contact heterojunction solar cell, a further improvement is that in the step (5), the mask on the surface of the N + region is removed by a laser grooving method.
In the preparation method of the back passivation contact heterojunction solar cell, the further improvement is that in the step (a), a mask is prepared on the surface of a P + region on the back surface of the crystalline silicon substrate by adopting the processes of exposure, development and etching; the mask is a diazo compound positive photoresist.
In the above method for manufacturing a back-passivated contact heterojunction solar cell, it is further improved that in the step (b), during the implantation of the boron ions, the implantation dose is 5 × 10 14 cm -2 ～2×10 15 cm -2 The implantation energy is 5keV to 50keV.
In the step (c), a mask is prepared on the surface of the N + region on the back surface of the crystalline silicon substrate by adopting the processes of exposure, development and etching; the mask is a diazo compound positive photoresist.
In the preparation method of the back passivation contact heterojunction solar cell, the further improvement is that in the step (d), the mask of the N + region is removed in a laser grooving mode; in the process of implanting the phosphorus ions, the implantation dosage is 5 multiplied by 10 14 cm -2 ～2×10 15 cm -2 The implantation energy is 5keV to 50keV.
In the step (e), the mask of the P + region is removed by laser grooving.
In the preparation method of the back passivation contact heterojunction solar cell, the further improvement is that in the step S1, alkaline solution is adopted to polish the back surface of the crystalline silicon substrate; the alkaline solution is a sodium hydroxide solution; the mass concentration of the alkaline solution is 2-10%; the thickness of the crystalline silicon substrate is 100-180 mu m.
In the preparation method of the back passivation contact heterojunction solar cell, the step S2 is further improvedIn the method, a tunneling oxide layer and an intrinsic amorphous silicon layer are deposited on the back surface of a crystalline silicon substrate in sequence by adopting a PECVD (plasma enhanced chemical vapor deposition) process; in the deposition process of the tunneling oxide layer, the process parameters of the PECVD process are as follows: the temperature is 250-600 ℃, the distance between the parallel polar plates is 20-60 mm, the pressure of the process cavity is 15-200 Pa, the radio frequency power is 50-400W, the deposition time is 20-120s, siH is added 4 The flow rate of the argon gas is 25sccm to 2400sccm, the flow rate of the argon gas is 0sccm to 20000sccm 2 The flow rate of O is 0sccm to 20000sccm; in the deposition process of the intrinsic amorphous silicon layer, the process parameters of the PECVD process are as follows: the pressure of the process cavity is 30 Pa-80 Pa, the temperature is 450 ℃ -600 ℃, the power of the radio frequency is 50W-1200W, the deposition time is 100 s-600s 4 The flow rate of the argon gas is 25sccm to 2400sccm, the flow rate of the argon gas is 0sccm to 20000sccm 2 The flow rate of O is 0sccm to 20000sccm; h 2 The flow rate of the gas is 0sccm to 20000sccm.
In the preparation method of the back passivation contact heterojunction solar cell, the improvement is further that in the step S3, the mixed solution of hydrogen peroxide, deionized water, an additive and sodium hydroxide is adopted to perform texturing on the front surface of the crystalline silicon substrate;
in the above method for manufacturing a back passivation contact heterojunction solar cell, step S4 is further improved, wherein the thermal oxygen annealing is performed in an oxygen atmosphere; in the process of the thermal oxygen annealing, the pressure is kept between 40 and 80kPa, and the temperature is kept between 600 and 700 ℃.
In step S6, the annealing process is as follows: heating to 560-600 deg.c in nitrogen atmosphere for 60-90 min, heating to 900-1000 deg.c in oxygen atmosphere for 25-30 min.
In the preparation method of the back passivation contact heterojunction solar cell, the improvement is further that in the step S7, an antireflection passivation layer is deposited on the front side and the back side of the crystalline silicon substrate by adopting a PECVD process; in the deposition process of the antireflection passivation layer on the front side of the crystalline silicon substrate, the process parameters of the PECVD process are as follows: deposition temperature 450 ℃ SiH 4 And NH 3 Has a flow ratio of 1:4 and 1:8; the crystal silicon liningIn the deposition process of the antireflection passivation layer on the bottom back surface, the process parameters of the PECVD process are as follows: deposition temperature 450 ℃ SiH 4 And NH 3 Has a flow ratio of 1:8.
In step S8, a metal negative electrode and a metal positive electrode are respectively prepared on the antireflection passivation layer on the back surface of the crystalline silicon substrate by adopting a screen printing and sintering mode or an electroplating mode.
In the preparation method of the back passivation contact heterojunction solar cell, the back passivation contact heterojunction solar cell is further improved and comprises a crystalline silicon substrate, wherein the front side of the crystalline silicon substrate is sequentially provided with a front passivation layer and a front side antireflection passivation layer from inside to outside; a tunneling oxide layer is arranged on the back surface of the crystalline silicon substrate; the tunneling oxide layer is alternately provided with a P + doped nanocrystalline silicon/microcrystalline silicon layer, a nanocrystalline silicon/microcrystalline silicon layer and an N + doped nanocrystalline silicon/microcrystalline silicon layer, and the nanocrystalline silicon/microcrystalline silicon layer is positioned between the P + doped nanocrystalline silicon/microcrystalline silicon layer and the N + doped nanocrystalline silicon/microcrystalline silicon layer; a back antireflection passivation layer is arranged on the P + doped nanocrystalline silicon/microcrystalline silicon layer, the nanocrystalline silicon/microcrystalline silicon layer and the N + doped nanocrystalline silicon/microcrystalline silicon layer; a metal negative electrode and a metal positive electrode are further arranged on the back antireflection passivation layer; the metal negative electrode penetrates through the back antireflection passivation layer to form ohmic contact with the N + doped nanocrystalline silicon/microcrystalline silicon layer; the metal positive electrode penetrates through the back antireflection passivation layer to form ohmic contact with the P + doped nanocrystalline silicon/microcrystalline silicon layer.
In the preparation method of the back passivation contact heterojunction solar cell, the P + doped nanocrystalline silicon/microcrystalline silicon layer is obtained by mixing P + doped nanocrystalline silicon and P + doped microcrystalline silicon; the nanocrystalline silicon/microcrystalline silicon layer is formed by mixing hetero-nanocrystalline silicon and hetero-microcrystalline silicon; the width of the nanocrystalline silicon/microcrystalline silicon layer is 1-5 mu m; the N + doped nanocrystalline silicon/microcrystalline silicon layer is formed by mixing N + doped nanocrystalline silicon and N + doped microcrystalline silicon.
In the preparation method of the back passivation contact heterojunction solar cell, the square resistance of the P + doped nanocrystalline silicon/microcrystalline silicon layer is 30 omega/□ -80 omega/□; the thickness of the P + doped nanocrystalline silicon/microcrystalline silicon layer is 20 nm-150 nm; the square resistance of the N + doped nanocrystalline silicon/microcrystalline silicon layer is 70 omega/□ -120 omega/□; the thickness of the N + doped nanocrystalline silicon/microcrystalline silicon layer is 20 nm-150 nm.
In the preparation method of the back passivation contact heterojunction solar cell, the crystalline silicon substrate is N-type monocrystalline silicon or P-type monocrystalline silicon; the resistivity of the crystalline silicon substrate is 1 omega/□ -10 omega/□.
In the preparation method of the back passivation contact heterojunction solar cell, the front passivation layer is a silicon oxide film; the thickness of the front passivation layer is 5-100 nm.
In the preparation method of the back passivation contact heterojunction solar cell, the front antireflection passivation layer is formed by two layers of SiN with different refractive indexes x The films are superposed; in the front antireflection passivation layer, the bottom layer is SiN with the refractive index of 2.1-2.2 x A film having a thickness of 30nm and a top layer of SiN having a refractive index of 1.6 to 1.6 x The film has a thickness of 45nm to 55nm.
In the preparation method of the back passivation contact heterojunction solar cell, the tunneling oxide layer is a silicon oxide film; the thickness of the tunneling oxide layer is 0.5 nm-2 nm.
In the preparation method of the back passivation contact heterojunction solar cell, the back antireflection passivation layer is further improved by SiN x A film; the thickness of the back antireflection passivation layer is 80 nm-90 nm.
In the preparation method of the back passivation contact heterojunction solar cell, the metal negative electrode is an Ag electrode or a Cu electrode.
In the preparation method of the back passivation contact heterojunction solar cell, the metal positive electrode is an Ag electrode or a Cu electrode.
Compared with the prior art, the invention has the advantages that:
(1) Aiming at the defects of low conversion efficiency and the like of the existing HBC battery, the invention creatively provides a back passivation contact heterojunction solar battery, wherein a tunneling oxidation layer is arranged on the back surface of the battery, a P + doped nanocrystalline silicon/microcrystalline silicon layer, a nanocrystalline silicon/microcrystalline silicon layer and an N + doped nanocrystalline silicon/microcrystalline silicon layer are alternately arranged on the tunneling oxidation layer, the nanocrystalline silicon/microcrystalline silicon layer is positioned between the P + doped nanocrystalline silicon/microcrystalline silicon layer and the N + doped nanocrystalline silicon/microcrystalline silicon layer, and a back antireflection passivation layer is arranged on the P + doped nanocrystalline silicon/microcrystalline silicon layer, the nanocrystalline silicon/microcrystalline silicon layer and the N + doped nanocrystalline silicon/microcrystalline silicon layer. The back passivation contact heterojunction solar cell has the advantages of high conversion efficiency and the like, is a novel solar cell with excellent performance, has high use value and good application prospect, and has important significance for promoting the industrial application of the back passivation contact heterojunction solar cell.
(2) Aiming at the defects of complex process, difficult operation, difficulty in completely retaining a back passivation contact structure and low battery conversion efficiency and yield caused by the defects in the existing HBC battery preparation method, the invention creatively provides a preparation method of a back passivation contact heterojunction solar battery, wherein an ion injection mode is adopted to prepare an N + doping layer and a P + doping layer, so that the doping concentration can be accurately controlled, phosphorus ions and boron ions can be selectively injected into a back nanocrystalline silicon/microcrystalline silicon film at intervals to form an N + doping area and a P + doping area separated by a nanocrystalline silicon/microcrystalline silicon film, the preparation method has the characteristics of high control precision, good diffusion uniformity and the like, the interval distance between the N + doping area and the P + doping area can be regulated, meanwhile, after the ion injection, the annealing treatment is continuously carried out, impurities can be activated and pushed into a silicon chip, a tunneling oxidation layer, a P + doping nanocrystalline silicon/microcrystalline silicon layer, a nano/microcrystalline silicon layer and an N + doping nanocrystalline silicon layer/microcrystalline silicon layer, a back passivation structure can be formed on the back, the back passivation contact structure can be activated and the back passivation contact heterojunction solar battery can be repaired by injecting ions, so that the crystal lattice damage of the back passivation contact structure can be further improved, and the crystal lattice conversion efficiency of the HBC battery can be improved. Compared with the HBC cell prepared by the conventional method, the conversion efficiency of the back passivation contact heterojunction solar cell prepared by the preparation method can be improved to more than 25% from 24.5%, the open circuit voltage can be increased to 0.735V from 0.705V, and the back passivation contact heterojunction solar cell shows very excellent electrical properties. In addition, the preparation method provided by the invention has the advantages of simple process, convenience in operation, low cost and the like, is beneficial to the conversion efficiency and yield of the battery, is suitable for large-scale preparation, and is beneficial to industrial application.
Drawings
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention.
Fig. 1 is a schematic view of a partial structure of a back passivated contact heterojunction solar cell in example 1 of the present invention.
Fig. 2 is a flow chart of a process for manufacturing a back passivated contact heterojunction solar cell in example 1 of the invention.
Illustration of the drawings: 10. a crystalline silicon substrate; 11. a front passivation layer; 12. a front side antireflection passivation layer; 20. tunneling through the oxide layer; 30. p + doped nanocrystalline silicon/microcrystalline silicon layer; 40. n + doped nanocrystalline silicon/microcrystalline silicon layer; 50. a back side antireflection passivation layer; 60. a metal negative electrode; 70. and a metal positive electrode.
Detailed Description
The invention is further described below with reference to the drawings and specific preferred embodiments of the description, without thereby limiting the scope of protection of the invention.
Examples
A back passivation contact heterojunction solar cell comprises a crystalline silicon substrate, wherein a front passivation layer and a front antireflection passivation layer are sequentially arranged on the front side of the crystalline silicon substrate from inside to outside; a tunneling oxide layer is arranged on the back surface of the crystalline silicon substrate; the tunneling oxide layer is alternately provided with a P + doped nanocrystalline silicon/microcrystalline silicon layer, a nanocrystalline silicon/microcrystalline silicon layer and an N + doped nanocrystalline silicon/microcrystalline silicon layer, and the nanocrystalline silicon/microcrystalline silicon layer is positioned between the P + doped nanocrystalline silicon/microcrystalline silicon layer and the N + doped nanocrystalline silicon/microcrystalline silicon layer; a back antireflection passivation layer is arranged on the P + doped nanocrystalline silicon/microcrystalline silicon layer, the nanocrystalline silicon/microcrystalline silicon layer and the N + doped nanocrystalline silicon/microcrystalline silicon layer; a metal negative electrode and a metal positive electrode are also arranged on the back antireflection passivation layer; the metal negative electrode penetrates through the back antireflection passivation layer to form ohmic contact with the N + doped nanocrystalline silicon/microcrystalline silicon layer; the metal positive electrode penetrates through the back antireflection passivation layer to form ohmic contact with the P + doped nanocrystalline silicon/microcrystalline silicon layer.
In this embodiment, a further improvement is that the P + doped nanocrystalline silicon/microcrystalline silicon layer is formed by mixing P + doped nanocrystalline silicon and P + doped microcrystalline silicon; the nanocrystalline silicon/microcrystalline silicon layer is formed by mixing hetero-nanocrystalline silicon and hetero-microcrystalline silicon; the width of the nanocrystalline silicon/microcrystalline silicon layer is 1-5 mu m; the N + doped nanocrystalline silicon/microcrystalline silicon layer is formed by mixing N + doped nanocrystalline silicon and N + doped microcrystalline silicon.
In this embodiment, the sheet resistance of the P + doped nanocrystalline silicon/microcrystalline silicon layer is 30 Ω/□ -80 Ω/□; the thickness of the P + doped nanocrystalline silicon/microcrystalline silicon layer is 20 nm-150 nm; the square resistance of the N + doped nanocrystalline silicon/microcrystalline silicon layer is 70 omega/□ -120 omega/□; the thickness of the N + doped nanocrystalline silicon/microcrystalline silicon layer is 20 nm-150 nm.
In this embodiment, the crystalline silicon substrate is N-type monocrystalline silicon or P-type monocrystalline silicon; the resistivity of the crystalline silicon substrate is 1 omega/□ -10 omega/□.
In this embodiment, the front passivation layer is a silicon oxide film; the thickness of the front passivation layer is 50 nm-100 nm.
In this embodiment, the front anti-reflective passivation layer is composed of two layers of SiN with different refractive indexes x The films are superposed; in the front antireflection passivation layer, the bottom layer is SiN with the refractive index of 2.1-2.2 x A film having a thickness of 30nm and a top layer of SiN having a refractive index of 1.6 to 1.6 x The film has a thickness of 45nm to 55nm.
In this embodiment, the tunneling oxide layer is a silicon oxide film; the thickness of the tunneling oxide layer is 0.5 nm-2 nm.
In this embodiment, the back antireflection passivation layer is SiN x A film; the thickness of the back antireflection passivation layer is 80 nm-90 nm.
In this embodiment, the metal negative electrode is an Ag electrode or a Cu electrode.
In this embodiment, the metal positive electrode is an Ag electrode or a Cu electrode.
In this embodiment, a method for manufacturing a back passivation contact heterojunction solar cell is also provided, and includes the following steps:
s1, polishing the back of a crystalline silicon substrate;
s2, depositing a tunneling oxide layer and an intrinsic amorphous silicon layer on the back surface of the crystalline silicon substrate in sequence;
s3, texturing the front side of the crystalline silicon substrate to form a pyramid textured surface;
s4, performing thermal oxidation annealing on the crystalline silicon substrate deposited with the tunneling oxide layer and the intrinsic amorphous silicon layer, forming a front passivation layer on the front side of the crystalline silicon substrate, and forming a nanocrystalline silicon/microcrystalline silicon thin film on the back side of the crystalline silicon substrate;
s5, injecting phosphorus ions and boron ions into the nanocrystalline silicon/microcrystalline silicon film at intervals in an ion injection mode;
s6, annealing the nanocrystalline silicon/microcrystalline silicon thin film injected with the phosphorus ions and the boron ions to form a P + doped nanocrystalline silicon/microcrystalline silicon layer, a nanocrystalline silicon/microcrystalline silicon layer and an N + doped nanocrystalline silicon/microcrystalline silicon layer which are alternately arranged;
s7, depositing an antireflection passivation layer on the front side and the back side of the crystalline silicon substrate;
and S8, respectively preparing a metal negative electrode and a metal positive electrode on the antireflection passivation layer on the back surface of the crystalline silicon substrate, and finishing the preparation of the back-to-back passivation contact heterojunction solar cell.
In this embodiment, in step S5, phosphorus ions and boron ions are implanted into the nanocrystalline silicon/microcrystalline silicon thin film at intervals in any one of the following manners;
the method comprises the following steps:
(1) Preparing a mask on the surface of a P + region on the back surface of the crystalline silicon substrate;
(2) Injecting phosphorus ions into the nanocrystalline silicon/microcrystalline silicon film in the N + region by adopting an ion injection mode;
(3) Preparing a mask on the surface of the N + region;
(4) Removing the mask on the surface of the P + region, and injecting boron ions into the nanocrystalline silicon/microcrystalline silicon film of the P + region in an ion injection mode;
(5) And removing the mask on the surface of the N + region.
The method II comprises the following steps:
(a) Preparing a mask on the surface of an N + region on the back surface of the crystalline silicon substrate;
(b, injecting boron ions into the nanocrystalline silicon/microcrystalline silicon thin film in the P + region in an ion injection mode;
(c) Preparing a mask on the surface of the P + region;
(d) Removing the mask on the surface of the N + region, and injecting phosphorus ions into the nanocrystalline silicon/microcrystalline silicon film of the N + region in an ion injection mode;
(e) And removing the mask on the surface of the P + region.
In the embodiment, in the step (1), a mask is prepared on the surface of an N + region on the back surface of a crystalline silicon substrate by adopting the processes of exposure, development and etching; the mask is a diazo compound positive photoresist.
In this embodiment, in the step (2), during the implantation of the phosphorus ions, the implantation dose is 5 × 10 14 cm -2 ～2×10 15 cm -2 The implantation energy is 5keV to 50keV.
In this embodiment, in the step (3), a mask is prepared on the surface of the N + region by using the processes of exposure, development and etching; the mask is a diazo compound positive photoresist.
In this embodiment, in the step (4), the mask on the surface of the P + region is removed by laser grooving; the implantation dosage is 5 × 10 during the implantation of boron ions 14 cm -2 ～2×10 15 cm -2 The implantation energy is 5keV to 50keV.
In this embodiment, in the step (5), the mask on the surface of the N + region is removed by laser grooving.
In the embodiment, in the step (a), a mask is prepared on the surface of a P + region on the back surface of a crystalline silicon substrate by adopting the processes of exposure, development and etching; the mask is a diazo compound positive photoresist.
In the present embodiment of the present invention,in the step (b), the implantation dosage is 5 × 10 during the implantation of boron ions 14 cm -2 ～2×10 15 cm -2 The implantation energy is 5keV to 50keV.
In this embodiment, in the step (c), a mask is prepared on the surface of the N + region on the back surface of the crystalline silicon substrate by using the processes of exposure, development and etching; the mask is a diazo compound positive photoresist.
In this embodiment, in the step (d), the mask of the N + region is removed by laser grooving; the implantation dosage is 5 × 10 during the implantation of phosphorus ions 14 cm -2 ～2×10 15 cm -2 The implantation energy is 5keV to 50keV.
In this embodiment, in the step (e), the mask of the P + region is removed by laser grooving.
In this embodiment, in step S1, an alkaline solution is used to polish the back surface of the crystalline silicon substrate; the alkaline solution is sodium hydroxide solution; the mass concentration of the alkaline solution is 2-10%; the thickness of the crystalline silicon substrate is 100-180 mu m.
In the embodiment, in the step S2, a PECVD process is adopted to deposit a tunneling oxide layer and an intrinsic amorphous silicon layer on the back surface of the crystalline silicon substrate in sequence; in the deposition process of the tunneling oxide layer, the process parameters of the PECVD process are as follows: the temperature is 250-600 ℃, the distance between the parallel polar plates is 20-60 mm, the pressure of the process chamber is 15-200 Pa, the radio frequency power is 50-400W, the deposition time is 20-120s 4 The flow rate of the argon gas is 25sccm to 2400sccm, the flow rate of the argon gas is 0sccm to 20000sccm 2 The flow rate of O is 0sccm to 20000sccm; in the deposition process of the intrinsic amorphous silicon layer, the process parameters of the PECVD process are as follows: the pressure of the process cavity is 30Pa to 80Pa, the temperature is 450 ℃ to 600 ℃, the radio frequency power is 50W to 1200W, the deposition time is 100s to 600s, and SiH is added 4 The flow rate of the argon gas is 25sccm to 2400sccm, the flow rate of the argon gas is 0sccm to 20000sccm 2 The flow rate of O is 0sccm to 20000sccm; h 2 The flow rate of the gas is 0sccm to 20000sccm.
In this embodiment, in step S3, a mixed solution of hydrogen peroxide, deionized water, an additive and sodium hydroxide is used to texture the front surface of the crystalline silicon substrate;
in this embodiment, in step S4, thermal oxygen annealing is performed in an oxygen atmosphere; in the process of thermal oxygen annealing, the pressure is kept between 40 and 80kPa, and the temperature is kept between 600 and 700 ℃.
In this embodiment, in step S6, the annealing process includes: heating to 560-600 deg.c in nitrogen atmosphere for 60-90 min, heating to 900-1000 deg.c in oxygen atmosphere for 25-30 min.
In this embodiment, in step S7, an anti-reflection passivation layer is deposited on the front surface and the back surface of the crystalline silicon substrate by using a PECVD process; in the deposition process of the antireflection passivation layer on the front side of the crystalline silicon substrate, the process parameters of the PECVD process are as follows: deposition temperature 450 ℃ SiH 4 And NH 3 Has a flow ratio of 1:4 and 1:8; in the deposition process of the antireflection passivation layer on the back surface of the crystalline silicon substrate, the process parameters of the PECVD process are as follows: deposition temperature 450 ℃ SiH 4 And NH 3 Has a flow ratio of 1:8.
In this embodiment, in step S8, a metal negative electrode and a metal positive electrode are respectively prepared on the anti-reflection passivation layer on the back surface of the crystalline silicon substrate by using a screen printing and sintering method or an electroplating method.
In the embodiment, the prepared back passivation contact heterojunction solar cell comprises a crystalline silicon substrate, wherein a front passivation layer and a front antireflection passivation layer are sequentially arranged on the front surface of the crystalline silicon substrate from inside to outside; a tunneling oxide layer is arranged on the back surface of the crystalline silicon substrate; the tunneling oxide layer is alternately provided with a P + doped nanocrystalline silicon/microcrystalline silicon layer, a nanocrystalline silicon/microcrystalline silicon layer and an N + doped nanocrystalline silicon/microcrystalline silicon layer, and the nanocrystalline silicon/microcrystalline silicon layer is positioned between the P + doped nanocrystalline silicon/microcrystalline silicon layer and the N + doped nanocrystalline silicon/microcrystalline silicon layer; a back antireflection passivation layer is arranged on the P + doped nanocrystalline silicon/microcrystalline silicon layer, the nanocrystalline silicon/microcrystalline silicon layer and the N + doped nanocrystalline silicon/microcrystalline silicon layer; a metal negative electrode and a metal positive electrode are also arranged on the back antireflection passivation layer; the metal negative electrode penetrates through the back antireflection passivation layer to form ohmic contact with the N + doped nanocrystalline silicon/microcrystalline silicon layer; the metal positive electrode penetrates through the back antireflection passivation layer to form ohmic contact with the P + doped nanocrystalline silicon/microcrystalline silicon layer.
In this embodiment, the P + doped nanocrystalline silicon/microcrystalline silicon layer is formed by mixing P + doped nanocrystalline silicon and P + doped microcrystalline silicon; the nanocrystalline silicon/microcrystalline silicon layer is formed by mixing hetero-nanocrystalline silicon and hetero-microcrystalline silicon; the width of the nanocrystalline silicon/microcrystalline silicon layer is 1-5 mu m; the N + doped nanocrystalline silicon/microcrystalline silicon layer is formed by mixing N + doped nanocrystalline silicon and N + doped microcrystalline silicon.
In this embodiment, the sheet resistance of the P + doped nanocrystalline silicon/microcrystalline silicon layer is 30 Ω/□ -80 Ω/□; the thickness of the P + doped nanocrystalline silicon/microcrystalline silicon layer is 20 nm-150 nm; the square resistance of the N + doped nanocrystalline silicon/microcrystalline silicon layer is 70 omega/□ -120 omega/□; the thickness of the N + doped nanocrystalline silicon/microcrystalline silicon layer is 20 nm-150 nm.
In this embodiment, the crystalline silicon substrate is N-type monocrystalline silicon or P-type monocrystalline silicon; the resistivity of the crystalline silicon substrate is 1 omega/□ -10 omega/□.
In this embodiment, the front passivation layer is a silicon oxide film; the thickness of the front passivation layer is 5-100 nm.
In this embodiment, the front anti-reflective passivation layer is composed of two layers of SiN with different refractive indexes x The films are superposed; in the front antireflection passivation layer, the bottom layer is SiN with the refractive index of 2.1-2.2 x A film having a thickness of 30nm and a top layer of SiN having a refractive index of 1.6 to 1.6 x The film has a thickness of 45nm to 55nm.
In this embodiment, the tunneling oxide layer is a silicon oxide film; the thickness of the tunneling oxide layer is 0.5 nm-2 nm.
In this embodiment, the back antireflection passivation layer is SiN x A film; the thickness of the back antireflection passivation layer is 80 nm-90 nm.
In this embodiment, the metal negative electrode is an Ag electrode or a Cu electrode.
In this embodiment, the metal positive electrode is an Ag electrode or a Cu electrode.
Example 1:
as shown in fig. 1, a back passivation contact heterojunction solar cell comprises a crystalline silicon substrate 10, wherein a front passivation layer 11 and a front antireflection passivation layer 12 are sequentially arranged on the front surface of the crystalline silicon substrate 10 from inside to outside; the back surface of the crystalline silicon substrate 10 is provided with a tunneling oxide layer 20, P + doped nanocrystalline silicon/microcrystalline silicon layers 30, nanocrystalline silicon/microcrystalline silicon layers and N + doped nanocrystalline silicon/microcrystalline silicon layers 40 are alternately arranged on the tunneling oxide layer 20, the nanocrystalline silicon/microcrystalline silicon layers are located between the P + doped nanocrystalline silicon/microcrystalline silicon layers and the N + doped nanocrystalline silicon/microcrystalline silicon layers, a back surface antireflection passivation layer 50 is arranged on the P + doped nanocrystalline silicon/microcrystalline silicon layers 30, the nanocrystalline silicon/microcrystalline silicon layers and the N + doped nanocrystalline silicon/microcrystalline silicon layers 40, a metal negative electrode 60 and a metal positive electrode are further arranged on the back surface antireflection passivation layer 50, the metal negative electrode 60 penetrates through the back surface antireflection passivation layer 50 to form ohmic contact with the N + doped nanocrystalline silicon/microcrystalline silicon layers 40, and the metal positive electrode 70 penetrates through the back surface antireflection passivation layer 50 to form ohmic contact with the P + doped nanocrystalline silicon/microcrystalline silicon layers 30.
In this embodiment, the alternating arrangement of the P + doped nanocrystalline silicon/microcrystalline silicon layer 30, the nanocrystalline silicon/microcrystalline silicon layer, and the N + doped nanocrystalline silicon/microcrystalline silicon layer 40 is referred to as an "interdigitated" structure.
In this embodiment, the P + doped nanocrystalline silicon/microcrystalline silicon layer 30 is formed by mixing P + doped nanocrystalline silicon and P + doped microcrystalline silicon; the nanocrystalline silicon/microcrystalline silicon layer is formed by mixing hetero nanocrystalline silicon and hetero microcrystalline silicon, the width of the nanocrystalline silicon/microcrystalline silicon layer is 3 μm, namely the spacing distance between the P + doped nanocrystalline silicon/microcrystalline silicon layer 30 and the N + doped nanocrystalline silicon/microcrystalline silicon layer 40 is 3 μm and is far smaller than the width of a laser grooving area, generally speaking, the width of the laser grooving area is as high as more than 100 μm; the N + doped nanocrystalline silicon/microcrystalline silicon layer 40 is formed by mixing N + doped nanocrystalline silicon and N + doped microcrystalline silicon.
In this embodiment, the sheet resistance of the P + doped nanocrystalline silicon/microcrystalline silicon layer 30 is 40 Ω/□; the sheet resistance of the N + doped nanocrystalline silicon/microcrystalline silicon layer 40 is 110 Ω/□.
In this embodiment, the thickness of the P + doped nanocrystalline silicon/microcrystalline silicon layer 30 is 80nm; the thickness of the N + doped nanocrystalline silicon/microcrystalline silicon layer 40 is 80nm.
In this embodiment, the crystalline silicon substrate 10 is N-type single crystalline silicon and has a resistivity of 10 Ω/□.
In this embodiment, the front passivation layer 11 is a silicon oxide thin film with a thickness of 100nm.
In this embodiment, the front anti-reflective passivation layer 12 is composed of two layers of SiN with different refractive indexes x The film is formed by stacking films, wherein the bottom layer is SiN with the refractive index of 2.1-2.2 x A film having a thickness of 30nm and a top layer of SiN having a refractive index of 1.6 to 1.6 x The film had a thickness of 55nm and a total thickness of 85nm.
In this embodiment, the tunneling oxide layer 20 is a silicon oxide film with a thickness of 2nm.
In this embodiment, the back anti-reflective passivation layer 50 is SiN x Film, thickness 80nm.
In the present embodiment, the metal negative electrode 60 is an Ag electrode.
In the present embodiment, the metal positive electrode 70 is an Ag electrode.
A schematic flow chart of the manufacturing process of the method for manufacturing the back passivated contact heterojunction solar cell in this embodiment is shown in fig. 2, and the method includes the following steps:
s1: and (3) polishing the back of the monocrystalline N-type silicon wafer by using alkaline solution through groove type alkaline polishing equipment, wherein the alkaline solution is sodium hydroxide solution, and the mass concentration of the sodium hydroxide solution is 10%.
S2: introducing SiH by adopting a flat PECVD device 4 And N 2 O, growing a silicon oxide tunneling oxide layer on the back surface of the N-type polished wafer, wherein the thickness is 2nm, and the process parameters of the PECVD process are as follows: the temperature is 450 ℃, the distance between the parallel polar plates is 20mm, the pressure of the process cavity is 100Pa, the radio frequency power is 200W, the deposition time is 60s 4 The flow rate of argon gas was 400sccm, the flow rate of argon gas was 5000sccm, N was added 2 The flow rate of O is 1000sccm; subsequently introducing SiH 4 And H 2 Depositing an intrinsic amorphous silicon layer on the outer surface of the tunneling oxide layer, wherein the thickness is 100nm, and the process parameters of the PECVD process are as follows: the pressure of the process chamber is 50pa, the temperature is 450 ℃, the radio frequency power is 150W, the deposition time is 600s, siH 4 The flow rate of argon gas was 400sccm, the flow rate of argon gas was 5000sccm, H 2 The flow rate of (2) is 1000sccm.
S3: performing texturing treatment on the front side of the silicon wafer, wherein the used solution is a mixed solution of hydrogen peroxide, deionized water, an additive (polyvinylpyrrolidone) and sodium hydroxide, and the mass ratio of hydrogen peroxide to deionized water to the additive (polyvinylpyrrolidone) to the sodium hydroxide in the mixed solution is 5:74:1: and 20, manufacturing a pyramid suede.
S4: and carrying out thermal oxygen annealing on the N-type polished silicon wafer, and growing a silicon oxide passivation layer with the thickness of 100nm on the front surface, wherein the thermal oxygen annealing is carried out under the aerobic condition, the pressure is 80kPa, the temperature is 600 ℃, and meanwhile, the intrinsic amorphous silicon layer crystal on the back surface of the silicon wafer is ensured to be converted into a nanocrystalline silicon/microcrystalline silicon film.
S5: phosphorus ions and boron ions are implanted into the nanocrystalline silicon/microcrystalline silicon film at intervals by adopting an ion implantation mode, which specifically comprises the following steps:
(1) A mask is prepared on the surface of a P + area on the back surface of the crystalline silicon substrate by adopting the processes of exposure, development and etching, and the mask is a diazo compound (DQN) positive photoresist.
(2) Implanting phosphorus ions into the N + region of the nanocrystalline silicon/microcrystalline silicon thin film by ion implantation, wherein the implantation dosage is 5 multiplied by 10 in the implantation process of the phosphorus ions 14 cm -2 ～2×10 15 cm -2 The implantation energy is 5keV to 50keV.
(3) And preparing a mask on the surface of the N + region by adopting the processes of exposure, development and etching, wherein the mask is a diazo compound (DQN) positive photoresist.
(4) Removing the mask on the surface of the P + region by adopting a laser grooving mode, and injecting boron ions into the nanocrystalline silicon/microcrystalline silicon film of the P + region by adopting an ion injection mode, wherein the injection dosage is 5 multiplied by 10 in the injection process of the boron ions 14 cm -2 ～2×10 15 cm -2 The implantation energy is 5keV to 50keV.
(5) And removing the mask on the surface of the N + region by adopting a laser grooving mode.
S6: the method comprises the following steps of annealing the nanocrystalline silicon/microcrystalline silicon film injected with phosphorus ions and boron ions by adopting a two-step annealing mode of firstly low temperature and then high temperature, and specifically comprises the following steps: raising the temperature to 560 ℃ in the nitrogen atmosphere, keeping the temperature for 90min, raising the temperature to 1000 ℃ in the oxygen atmosphere, keeping the temperature for 25min, and forming a P + doped nanocrystalline silicon/microcrystalline silicon layer with the square resistance of 40 omega/□, a nanocrystalline silicon/microcrystalline silicon layer and an N + doped nanocrystalline silicon/microcrystalline silicon layer with the square resistance of 110 omega/□. In the invention, the sheet resistance of the N + region and the P + region is accurately controlled by controlling the implantation dosage and the annealing time.
S7: plating antireflection passivation films on the front surface and the back surface of the crystalline silicon substrate by adopting a flat PECVD (plasma enhanced chemical vapor deposition) device, wherein SiN on the front surface x The film is made into two layers with different refractive indexes, siH is introduced 4 And NH 3 The deposition temperature is 450 ℃, and the high-folding film layer is SiH 4 And NH 3 The flow ratio of 1:4, low-baffled film layer SiH 4 And NH 3 The flow ratio of (A) is 1:8, and the total thickness of the two layers of films is controlled to be 85nm; backside SiN x Low folding film layer SiH 4 And NH 3 The flow ratio of (A) was 1:8, and the film thickness was controlled to 80nm.
S8: printing metal Ag on the P + region; and printing metal Ag in the N + region, putting the metal Ag into sintering equipment for sintering to form a metal positive electrode and a metal negative electrode, and finishing the preparation of the back-to-back passivated contact heterojunction solar cell.
Example 2:
as shown in fig. 1, a back passivation contact heterojunction solar cell comprises a crystalline silicon substrate 10, wherein a front passivation layer 11 and a front antireflection passivation layer 12 are sequentially arranged on the front surface of the crystalline silicon substrate 10 from inside to outside; the back surface of the crystalline silicon substrate 10 is provided with a tunneling oxide layer 20, P + doped nanocrystalline silicon/microcrystalline silicon layers 30, nanocrystalline silicon/microcrystalline silicon layers and N + doped nanocrystalline silicon/microcrystalline silicon layers 40 are alternately arranged on the tunneling oxide layer 20, the nanocrystalline silicon/microcrystalline silicon layers are located between the P + doped nanocrystalline silicon/microcrystalline silicon layers and the N + doped nanocrystalline silicon/microcrystalline silicon layers, a back surface antireflection passivation layer 50 is arranged on the P + doped nanocrystalline silicon/microcrystalline silicon layers 30, the nanocrystalline silicon/microcrystalline silicon layers and the N + doped nanocrystalline silicon/microcrystalline silicon layers 40, a metal negative electrode 60 and a metal positive electrode are further arranged on the back surface antireflection passivation layer 50, the metal negative electrode 60 penetrates through the back surface antireflection passivation layer 50 to form ohmic contact with the N + doped nanocrystalline silicon/microcrystalline silicon layers 40, and the metal positive electrode 70 penetrates through the back surface antireflection passivation layer 50 to form ohmic contact with the P + doped nanocrystalline silicon/microcrystalline silicon layers 30.
In this embodiment, the alternating arrangement of the P + doped nanocrystalline silicon/microcrystalline silicon layer 30, the nanocrystalline silicon/microcrystalline silicon layer, and the N + doped nanocrystalline silicon/microcrystalline silicon layer 40 is referred to as an "interdigitated" structure.
In this embodiment, the P + doped nanocrystalline silicon/microcrystalline silicon layer 30 is formed by mixing P + doped nanocrystalline silicon and P + doped microcrystalline silicon; the nanocrystalline silicon/microcrystalline silicon layer is formed by mixing hetero-nanocrystalline silicon and hetero-microcrystalline silicon, the width of the nanocrystalline silicon/microcrystalline silicon layer is 4 microns, namely the spacing distance between the P + doped nanocrystalline silicon/microcrystalline silicon layer 30 and the N + doped nanocrystalline silicon/microcrystalline silicon layer 40 is 4 microns, which is far smaller than the width of a laser grooving area, generally speaking, the width of the laser grooving area is as high as more than 100 microns; the N + doped nanocrystalline silicon/microcrystalline silicon layer 40 is formed by mixing N + doped nanocrystalline silicon and N + doped microcrystalline silicon.
In this embodiment, the sheet resistance of the P + doped nanocrystalline silicon/microcrystalline silicon layer 30 is 35 Ω/□; the sheet resistance of the N + doped nanocrystalline silicon/microcrystalline silicon layer 40 is 100 Ω/□.
In this embodiment, the thickness of the P + doped nanocrystalline silicon/microcrystalline silicon layer 30 is 90nm; the thickness of the N + doped nanocrystalline silicon/microcrystalline silicon layer 40 is 90nm.
In this embodiment, the crystalline silicon substrate 10 is N-type single crystalline silicon and has a resistivity of 10 Ω/□.
In this embodiment, the front passivation layer 11 is a silicon oxide thin film with a thickness of 100nm.
In this embodiment, the front anti-reflective passivation layer 12 is composed of two layers of SiN with different refractive indexes x The film is formed by stacking films, wherein the bottom layer is SiN with the refractive index of 2.1-2.2 x A film having a thickness of 30nm and a top layer of SiN having a refractive index of 1.6 to 1.6 x Film, thickness 55nm, total thickness 85nm.
In this embodiment, the tunneling oxide layer 20 is a silicon oxide film with a thickness of 1nm.
In this embodiment, the back anti-reflective passivation layer 50 is SiN x Film, thickness 90nm.
In the present embodiment, the metal negative electrode 60 is a Cu electrode.
In the present embodiment, the metal positive electrode 70 is a Cu electrode.
A method for manufacturing the back passivated contact heterojunction solar cell in the embodiment includes the following steps:
s1: and (2) polishing the back surface of the monocrystalline N-type silicon wafer by using alkaline solution through groove type alkaline polishing equipment, wherein the alkaline solution is sodium hydroxide solution, and the mass concentration of the sodium hydroxide solution is 10%.
S2: introducing SiH by adopting a flat PECVD device 4 And N 2 And O, growing a silicon oxide tunneling oxide layer on the back surface of the N-type polished wafer, wherein the thickness is 1nm, and the process parameters of the PECVD process are as follows: the temperature is 500 ℃, the distance between the parallel polar plates is 30mm, the pressure of the process cavity is 100Pa, the radio frequency power is 200W, the deposition time is 50s, siH 4 The flow rate of argon gas was 400sccm, the flow rate of argon gas was 5000sccm, N was added 2 The flow rate of O is 1000sccm; subsequently introducing SiH 4 And H 2 Depositing an intrinsic amorphous silicon layer on the outer surface of the tunneling oxide layer, wherein the thickness is 100nm, and the process parameters of the PECVD process are as follows: the pressure of the process chamber is 50pa, the temperature is 450 ℃, the radio frequency power is 150W, the deposition time is 600s, siH 4 The flow rate of argon gas was 400sccm, the flow rate of argon gas was 5000sccm, H 2 The flow rate of (2) is 1000sccm.
S3: the front surface of the silicon wafer is subjected to texturing treatment, a used solution is a mixed solution of hydrogen peroxide, deionized water, an additive (polyvinylpyrrolidone) and sodium hydroxide, and the mass ratio of hydrogen peroxide to deionized water to the additive (polyvinylpyrrolidone) to sodium hydroxide in the mixed solution is 5:74:1: and 20, manufacturing a pyramid suede.
S4: and carrying out thermal oxygen annealing on the N-type polished silicon wafer, and growing a silicon oxide passivation layer with the thickness of 100nm on the front surface, wherein the thermal oxygen annealing is carried out under the aerobic condition, the pressure is 80kPa, the temperature is 600 ℃, and meanwhile, the intrinsic amorphous silicon layer crystal on the back surface of the silicon wafer is ensured to be converted into a nanocrystalline silicon film or a microcrystalline silicon film.
S5: phosphorus ions and boron ions are implanted into the nanocrystalline silicon/microcrystalline silicon film at intervals by adopting an ion implantation mode, which specifically comprises the following steps:
(1) A mask is prepared on the surface of a P + area on the back surface of a crystalline silicon substrate by adopting the processes of exposure, development and etching, and the mask is a diazo compound (DQN) positive photoresist.
(2) Implanting phosphorus ions into the N + region nanocrystals by ion implantationIn the silicon/microcrystalline silicon film, the implantation dosage is 5 × 10 during the implantation of phosphorus ions 14 cm -2 ～2×10 15 cm -2 The implantation energy is 5keV to 50keV.
(3) And preparing a mask on the surface of the N + region by adopting the processes of exposure, development and etching, wherein the mask is a diazo compound (DQN) positive photoresist.
(4) Removing the mask on the surface of the P + region by adopting a laser grooving mode, and injecting boron ions into the nanocrystalline silicon/microcrystalline silicon film of the P + region by adopting an ion injection mode, wherein the injection dosage is 5 multiplied by 10 in the injection process of the boron ions 14 cm -2 ～2×10 15 cm -2 The implantation energy is 5keV to 50keV.
(5) And removing the mask on the surface of the N + region by adopting a laser grooving mode.
S6: the method comprises the following steps of annealing the nanocrystalline silicon/microcrystalline silicon film injected with phosphorus ions and boron ions by adopting a two-step annealing mode of firstly low temperature and then high temperature, and specifically comprises the following steps: heating to 600 ℃ in the nitrogen atmosphere, keeping the temperature for 60min, heating to 900 ℃ in the oxygen atmosphere, keeping the temperature for 30min, and forming a P + doped nanocrystalline silicon/microcrystalline silicon layer with the square resistance of 35 omega/□, a nanocrystalline silicon/microcrystalline silicon layer and an N + doped nanocrystalline silicon/microcrystalline silicon layer with the square resistance of 100 omega/□.
S7: plating antireflection passivation films on the front surface and the back surface of the crystalline silicon substrate by adopting a flat PECVD (plasma enhanced chemical vapor deposition) device, wherein SiN on the front surface x The film is made into two layers with different refractive indexes, siH is introduced 4 And NH 3 The deposition temperature is 450 ℃, and the high-refractive-index film layer is SiH 4 And NH 3 The flow ratio of 1:4, low-refractive-index film layer SiH 4 And NH 3 The flow ratio of (A) is 1:8, and the total thickness of the two layers of films is controlled to be 85nm; backside SiN x Low folding film layer SiH 4 And NH 3 The flow ratio of (A) was 1:8, and the film thickness was controlled to 90nm.
S8: electroplating metal Cu in the P + region by adopting an electroplating mode; and electroplating metal Cu in the N + region to form a metal positive electrode and a metal negative electrode, and finishing the preparation of the back-to-back passivated contact heterojunction solar cell.
The electrical properties of the back passivated contact heterojunction solar cells prepared in examples 1 and 2 were tested and the results are shown in table 1.
Table 1 electrical performance data of different back passivated contact heterojunction solar cells
As can be seen from table 1, compared with the conventional HBC cell, the back passivated contact heterojunction solar cell prepared by the invention has more excellent electrical properties, wherein the conversion efficiency of the cell is improved from 24.5% to 25.0%, and the improvement range is as high as 0.5%, and the improvement range is very large.
From the above results, compared with the prior art, the back passivation contact heterojunction solar cell of the invention has the advantages that the back passivation contact structure of the tunneling oxide layer is deposited on the back surface of the cell, the tunneling oxide layer is arranged on the back surface of the cell, the P + doped nanocrystalline silicon/microcrystalline silicon layer, the nanocrystalline silicon/microcrystalline silicon layer and the N + doped nanocrystalline silicon/microcrystalline silicon layer are alternately arranged on the tunneling oxide layer, the nanocrystalline silicon/microcrystalline silicon layer is positioned between the P + doped nanocrystalline silicon/microcrystalline silicon layer and the N + doped nanocrystalline silicon/microcrystalline silicon layer, and the back antireflection passivation layer is arranged on the P + doped nanocrystalline silicon/microcrystalline silicon layer, the nanocrystalline silicon/microcrystalline silicon layer and the N + doped nanocrystalline silicon/microcrystalline silicon layer, so that the back passivation contact structure constructed by the method can effectively improve the short-circuit current density and the open-circuit voltage of the cell, and further can remarkably improve the conversion efficiency of the cell. Meanwhile, the method for preparing the back passivation contact heterojunction solar cell not only can accurately control the doping concentration, but also can selectively inject phosphorus ions and boron ions into the nanocrystalline silicon/microcrystalline silicon thin film on the back at intervals to form an N + doping area and a P + doping area which are separated by the nanocrystalline silicon/microcrystalline silicon thin film, has the characteristics of high control precision, good diffusion uniformity and the like, can regulate and control the interval distance between the N + doping area and the P + doping area, meanwhile, after the ion injection, the annealing treatment is continuously carried out, impurities can be activated and pushed into the silicon wafer, a back passivation contact structure which is formed by a tunneling oxidation layer, the P + doping nanocrystalline silicon/microcrystalline silicon layer, the N + doping nanocrystalline silicon/microcrystalline silicon layer and an antireflection passivation layer can be formed on the back, the crystal lattice damage on the surface of the silicon wafer caused by the ion injection can be repaired, and the conversion efficiency of the cell can be improved. Compared with the HBC cell prepared by the conventional method, the conversion efficiency of the back passivated contact heterojunction solar cell prepared by the preparation method can be improved to more than 25% from 24.5%, the open circuit voltage can be increased by 0.735V from 0.705V, and very excellent electrical properties are shown. In addition, the preparation method has the advantages of simple process, convenience in operation, low cost and the like, is favorable for conversion efficiency and yield of the cell, is suitable for large-scale preparation, is favorable for industrial application, and has important significance for promoting the industrial application of the back passivation contact heterojunction solar cell.
The above examples are merely preferred embodiments of the present invention, and the scope of the present invention is not limited to the above examples. All technical schemes belonging to the idea of the invention belong to the protection scope of the invention. It should be noted that modifications and embellishments within the scope of the invention may be made by those skilled in the art without departing from the principle of the invention, and such modifications and embellishments should also be considered as within the scope of the invention.
Claims (10)
1. The back passivation contact heterojunction solar cell is characterized by comprising a crystalline silicon substrate, wherein a front passivation layer and a front antireflection passivation layer are sequentially arranged on the front side of the crystalline silicon substrate from inside to outside; a tunneling oxide layer is arranged on the back surface of the crystalline silicon substrate; the tunneling oxide layer is alternately provided with a P + doped nanocrystalline silicon/microcrystalline silicon layer, a nanocrystalline silicon/microcrystalline silicon layer and an N + doped nanocrystalline silicon/microcrystalline silicon layer, and the nanocrystalline silicon/microcrystalline silicon layer is positioned between the P + doped nanocrystalline silicon/microcrystalline silicon layer and the N + doped nanocrystalline silicon/microcrystalline silicon layer; a back antireflection passivation layer is arranged on the P + doped nanocrystalline silicon/microcrystalline silicon layer, the nanocrystalline silicon/microcrystalline silicon layer and the N + doped nanocrystalline silicon/microcrystalline silicon layer; a metal negative electrode and a metal positive electrode are further arranged on the back antireflection passivation layer; the metal negative electrode penetrates through the back antireflection passivation layer to form ohmic contact with the N + doped nanocrystalline silicon/microcrystalline silicon layer; the metal positive electrode penetrates through the back antireflection passivation layer to form ohmic contact with the P + doped nanocrystalline silicon/microcrystalline silicon layer.
2. The back-passivated contact heterojunction solar cell of claim 1, wherein the P + doped nanocrystalline silicon/microcrystalline silicon layer is formed by mixing P + doped nanocrystalline silicon and P + doped microcrystalline silicon; the nanocrystalline silicon/microcrystalline silicon layer is formed by mixing hetero-nanocrystalline silicon and hetero-microcrystalline silicon; the width of the nanocrystalline silicon/microcrystalline silicon layer is 1-5 mu m; the N + doped nanocrystalline silicon/microcrystalline silicon layer is formed by mixing N + doped nanocrystalline silicon and N + doped microcrystalline silicon.
3. The back-passivated contact heterojunction solar cell of claim 2, wherein the P + doped nanocrystalline silicon/microcrystalline silicon layer has a sheet resistance of 30 Ω/□ -80 Ω/□; the thickness of the P + doped nanocrystalline silicon/microcrystalline silicon layer is 20 nm-150 nm; the square resistance of the N + doped nanocrystalline silicon/microcrystalline silicon layer is 70 omega/□ -120 omega/□; the thickness of the N + doped nanocrystalline silicon/microcrystalline silicon layer is 20 nm-150 nm.
4. The back-passivated contact heterojunction solar cell according to any of claims 1 to 3, wherein the crystalline silicon substrate is N-type monocrystalline silicon or P-type monocrystalline silicon; the resistivity of the crystalline silicon substrate is 1 omega/□ -10 omega/□;
the front passivation layer is a silicon oxide film; the thickness of the front passivation layer is 50 nm-100 nm;
the front antireflection passivation layer consists of two layers of SiN with different refractive indexes x The films are superposed; in the front antireflection passivation layer, the bottom layer is SiN with the refractive index of 2.1-2.2 x A film having a thickness of 30nm and a top layer of SiN having a refractive index of 1.6 to 1.6 x A film having a thickness of 45nm to 55nm;
the tunneling oxide layer is a silicon oxide film; the thickness of the tunneling oxide layer is 0.5 nm-2 nm;
the back antireflection passivation layer is SiN x A film; the thickness of the back antireflection passivation layer is 80 nm-90 nm;
the metal negative electrode is an Ag electrode or a Cu electrode;
the metal positive electrode is an Ag electrode or a Cu electrode.
5. A preparation method of a back passivation contact heterojunction solar cell is characterized by comprising the following steps:
s1, polishing the back of a crystalline silicon substrate;
s2, depositing a tunneling oxide layer and an intrinsic amorphous silicon layer on the back surface of the crystalline silicon substrate in sequence;
s3, texturing the front side of the crystalline silicon substrate to form a pyramid textured surface;
s4, performing thermal oxidation annealing on the crystalline silicon substrate deposited with the tunneling oxide layer and the intrinsic amorphous silicon layer, forming a front passivation layer on the front side of the crystalline silicon substrate, and forming a nanocrystalline silicon/microcrystalline silicon thin film on the back side of the crystalline silicon substrate;
s5, injecting phosphorus ions and boron ions into the nanocrystalline silicon/microcrystalline silicon film at intervals in an ion injection mode;
s6, annealing the nanocrystalline silicon/microcrystalline silicon thin film injected with the phosphorus ions and the boron ions to form a P + doped nanocrystalline silicon/microcrystalline silicon layer, a nanocrystalline silicon/microcrystalline silicon layer and an N + doped nanocrystalline silicon/microcrystalline silicon layer which are alternately arranged;
s7, depositing an antireflection passivation layer on the front side and the back side of the crystalline silicon substrate;
and S8, respectively preparing a metal negative electrode and a metal positive electrode on the antireflection passivation layer on the back surface of the crystalline silicon substrate, and finishing the preparation of the back-to-back passivation contact heterojunction solar cell.
6. The method for preparing a back-passivated contact heterojunction solar cell according to claim 5, wherein in step S5, phosphorus ions and boron ions are implanted into the nanocrystalline silicon/microcrystalline silicon thin film at intervals in any one of the following manners;
the method comprises the following steps:
(1) Preparing a mask on the surface of a P + region on the back surface of the crystalline silicon substrate;
(2) Injecting phosphorus ions into the nanocrystalline silicon/microcrystalline silicon film in the N + region by adopting an ion injection mode;
(3) Preparing a mask on the surface of the N + region;
(4) Removing the mask on the surface of the P + region, and injecting boron ions into the nanocrystalline silicon/microcrystalline silicon film of the P + region in an ion injection mode;
(5) Removing the mask on the surface of the N + region;
the method II comprises the following steps:
(a) Preparing a mask on the surface of an N + region on the back surface of the crystalline silicon substrate;
(b, injecting boron ions into the nanocrystalline silicon/microcrystalline silicon film in the P + region in an ion injection mode;
(c) Preparing a mask on the surface of the P + region;
(d) Removing the mask on the surface of the N + region, and injecting phosphorus ions into the nanocrystalline silicon/microcrystalline silicon film of the N + region in an ion injection mode;
(e) And removing the mask on the surface of the P + region.
7. The method for preparing the back passivated contact heterojunction solar cell according to claim 6, wherein in the step (1), a mask is prepared on the surface of the N + region on the back surface of the crystalline silicon substrate by adopting the processes of exposure, development and etching; the mask is a diazo compound positive photoresist;
in the step (2), in the process of implanting the phosphorus ions, the implantation dose is 5 × 10 14 cm -2 ～2×10 15 cm -2 The injection energy is 5 keV-50 keV;
in the step (3), a mask is prepared on the surface of the N + region by adopting the processes of exposure, development and etching; the mask is a diazo compound positive photoresist;
in the step (4), removing the mask on the surface of the P + region in a laser grooving mode; in the process of implanting the boron ions, an implanting agentIn an amount of 5X 10 14 cm -2 ～2×10 15 cm -2 The injection energy is 5 keV-50 keV;
in the step (5), removing the mask on the surface of the N + region in a laser grooving mode;
in the step (a), preparing a mask on the surface of a P + region on the back surface of the crystalline silicon substrate by adopting the processes of exposure, development and etching; the mask is a diazo compound positive photoresist;
in the step (b), during the implantation of the boron ions, the implantation dose is 5 × 10 14 cm -2 ～2×10 15 cm -2 The injection energy is 5 keV-50 keV;
in the step (c), a mask is prepared on the surface of the N + region on the back surface of the crystalline silicon substrate by adopting the processes of exposure, development and etching; the mask is a diazo compound positive photoresist;
in the step (d), removing the mask of the N + region by adopting a laser grooving mode; in the process of implanting the phosphorus ions, the implantation dosage is 5 multiplied by 10 14 cm -2 ～2×10 15 cm -2 The injection energy is 5 keV-50 keV;
in the step (e), the mask of the P + region is removed in a laser grooving mode.
8. The method for preparing a back passivated contact heterojunction solar cell according to any of claims 5 to 7, wherein in step S1, the back of the crystalline silicon substrate is polished with an alkaline solution; the alkaline solution is a sodium hydroxide solution; the mass concentration of the alkaline solution is 2-10%; the thickness of the crystalline silicon substrate is 100-180 mu m;
in the step S2, a tunneling oxide layer and an intrinsic amorphous silicon layer are sequentially deposited on the back surface of the crystalline silicon substrate by adopting a PECVD (plasma enhanced chemical vapor deposition) process; in the deposition process of the tunneling oxide layer, the process parameters of the PECVD process are as follows: the temperature is 250-600 ℃, the distance between the parallel polar plates is 20-60 mm, the pressure of the process chamber is 15-200 Pa, the radio frequency power is 50-400W, the deposition time is 20-120s 4 The flow rate of the argon gas is 25sccm to 2400sccm, the flow rate of the argon gas is 0sccm to 20000sccm 2 Of OThe flow rate is 0 sccm-20000 sccm; in the deposition process of the intrinsic amorphous silicon layer, the process parameters of the PECVD process are as follows: the pressure of the process cavity is 30Pa to 80Pa, the temperature is 450 ℃ to 600 ℃, the radio frequency power is 50W to 1200W, the deposition time is 100s to 600s, and SiH is added 4 The flow rate of the argon gas is 25sccm to 2400sccm, the flow rate of the argon gas is 0sccm to 20000sccm 2 The flow rate of O is 0sccm to 20000sccm; h 2 The flow rate of the liquid is 0sccm to 20000sccm;
in the step S3, the front side of the crystalline silicon substrate is subjected to texturing by adopting a mixed solution of hydrogen peroxide, deionized water, an additive and sodium hydroxide;
in step S4, the thermal annealing is performed in an oxygen atmosphere; in the process of the thermal oxygen annealing, the pressure is kept at 40-80 kPa, and the temperature is kept at 600-700 ℃;
in step S6, the annealing process includes: heating to 560-600 ℃ in nitrogen atmosphere, keeping for 60-90 min, heating to 900-1000 ℃ in oxygen atmosphere, keeping for 25-30 min;
in the step S7, depositing an antireflection passivation layer on the front surface and the back surface of the crystalline silicon substrate by adopting a PECVD (plasma enhanced chemical vapor deposition) process; in the deposition process of the antireflection passivation layer on the front side of the crystalline silicon substrate, the process parameters of the PECVD process are as follows: deposition temperature 450 ℃ SiH 4 And NH 3 Has a flow ratio of 1:4 and 1:8; in the deposition process of the anti-reflection passivation layer on the back surface of the crystalline silicon substrate, the process parameters of the PECVD process are as follows: deposition temperature 450 ℃ SiH 4 And NH 3 Has a flow ratio of 1:8;
in step S8, a metal negative electrode and a metal positive electrode are respectively prepared on the antireflection passivation layer on the back surface of the crystalline silicon substrate by adopting a screen printing and sintering manner or an electroplating manner.
9. The method for preparing the back passivated contact heterojunction solar cell according to claim 8, wherein the back passivated contact heterojunction solar cell comprises a crystalline silicon substrate, and a front passivation layer and a front antireflection passivation layer are sequentially arranged on the front surface of the crystalline silicon substrate from inside to outside; a tunneling oxide layer is arranged on the back surface of the crystalline silicon substrate; the tunneling oxide layer is alternately provided with a P + doped nanocrystalline silicon/microcrystalline silicon layer, a nanocrystalline silicon/microcrystalline silicon layer and an N + doped nanocrystalline silicon/microcrystalline silicon layer, and the nanocrystalline silicon/microcrystalline silicon layer is positioned between the P + doped nanocrystalline silicon/microcrystalline silicon layer and the N + doped nanocrystalline silicon/microcrystalline silicon layer; a back antireflection passivation layer is arranged on the P + doped nanocrystalline silicon/microcrystalline silicon layer, the nanocrystalline silicon/microcrystalline silicon layer and the N + doped nanocrystalline silicon/microcrystalline silicon layer; a metal negative electrode and a metal positive electrode are further arranged on the back antireflection passivation layer; the metal negative electrode penetrates through the back antireflection passivation layer to form ohmic contact with the N + doped nanocrystalline silicon/microcrystalline silicon layer; the metal positive electrode penetrates through the back antireflection passivation layer to form ohmic contact with the P + doped nanocrystalline silicon/microcrystalline silicon layer.
10. The method for preparing a back-passivated contact heterojunction solar cell according to claim 9, wherein the P + doped nanocrystalline silicon/microcrystalline silicon layer is formed by mixing P + doped nanocrystalline silicon and P + doped microcrystalline silicon; the nanocrystalline silicon/microcrystalline silicon layer is formed by mixing hetero-nanocrystalline silicon and hetero-microcrystalline silicon; the width of the nanocrystalline silicon/microcrystalline silicon layer is 1-5 mu m; the N + doped nanocrystalline silicon/microcrystalline silicon layer is formed by mixing N + doped nanocrystalline silicon and N + doped microcrystalline silicon;
the square resistance of the P + doped nanocrystalline silicon/microcrystalline silicon layer is 30 omega/□ -80 omega/□; the thickness of the P + doped nanocrystalline silicon/microcrystalline silicon layer is 20 nm-150 nm; the square resistance of the N + doped nanocrystalline silicon/microcrystalline silicon layer is 70 omega/□ -120 omega/□; the thickness of the N + doped nanocrystalline silicon/microcrystalline silicon layer is 20 nm-150 nm;
the crystalline silicon substrate is N-type monocrystalline silicon or P-type monocrystalline silicon; the resistivity of the crystalline silicon substrate is 1 omega/□ -10 omega/□;
the front passivation layer is a silicon oxide film; the thickness of the front passivation layer is 5 0nm-100 nm;
the front antireflection passivation layer consists of two layers of SiN with different refractive indexes x The films are superposed; in the front antireflection passivation layer, the bottom layer is SiN with the refractive index of 2.1-2.2 x A film having a thickness of 30nm and a top layer of SiN having a refractive index of 1.6 to 1.6 x A film having a thickness of 45nm to 55nm;
the tunneling oxide layer is a silicon oxide film; the thickness of the tunneling oxide layer is 0.5 nm-2 nm;
the back antireflection passivation layer is SiN x A film; the thickness of the back antireflection passivation layer is 80 nm-90 nm;
the metal negative electrode is an Ag electrode or a Cu electrode;
the metal positive electrode is an Ag electrode or a Cu electrode.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115732597A (en) * | 2022-12-01 | 2023-03-03 | 江苏杰太光电技术有限公司 | Preparation method of TOPCon battery selective emitter and passivation contact structure |
| CN116936684A (en) * | 2023-09-14 | 2023-10-24 | 金阳(泉州)新能源科技有限公司 | Method for simultaneously growing polycrystalline silicon with different thicknesses on front and back surfaces of battery and back contact battery |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115732597A (en) * | 2022-12-01 | 2023-03-03 | 江苏杰太光电技术有限公司 | Preparation method of TOPCon battery selective emitter and passivation contact structure |
| CN115732597B (en) * | 2022-12-01 | 2024-03-22 | 江苏杰太光电技术有限公司 | Preparation method of TOPCON battery selective emitter and passivation contact structure |
| CN116936684A (en) * | 2023-09-14 | 2023-10-24 | 金阳(泉州)新能源科技有限公司 | Method for simultaneously growing polycrystalline silicon with different thicknesses on front and back surfaces of battery and back contact battery |
| CN116936684B (en) * | 2023-09-14 | 2023-12-15 | 金阳(泉州)新能源科技有限公司 | Method for simultaneously growing polycrystalline silicon with different thicknesses on front and back surfaces of battery and back contact battery |
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