CN111669906B

CN111669906B - Method for manufacturing multilayer circuit board

Info

Publication number: CN111669906B
Application number: CN202010458788.6A
Authority: CN
Inventors: 王红月; 刘涌; 黄伟; 陈晓峰; 谢明; 樊仁君
Original assignee: Shanghai Meadville Electronic Co ltd
Current assignee: Shanghai Meadville Electronic Co ltd
Priority date: 2020-05-27
Filing date: 2020-05-27
Publication date: 2022-06-24
Anticipated expiration: 2040-05-27
Also published as: CN111669906A

Abstract

The invention discloses a method for manufacturing a multilayer circuit board, which comprises the following steps of dividing a target multilayer circuit board into a plurality of sub-boards, manufacturing each sub-board respectively, and then conducting and interconnecting any two sub-boards, wherein the method for conducting and interconnecting the two sub-boards comprises the following steps: arranging a first bonding layer on a graphic layer of one daughter board, and arranging a second bonding layer on the first bonding layer; manufacturing a through hole on the daughter board, wherein the through hole longitudinally penetrates through the second bonding layer and the first bonding layer until reaching a conducting pattern on the pattern layer; filling conductive paste in the via hole; and conducting and combining the daughter board obtained in the step three with another daughter board. The invention solves the problem of warping of the multilayer circuit board with an asymmetric structure. Also, multilayer circuit boards having a thickness or thickness/diameter ratio exceeding the capacity of the device can be manufactured by the method of the present invention. The invention reduces the manufacturing difficulty of electroplating the plate with high plate thickness and high thickness-diameter ratio, simplifies the flow and shortens the manufacturing period of the product.

Description

Method for manufacturing multilayer circuit board

Technical Field

The invention relates to a manufacturing method of a multilayer circuit board.

Background

With the development of miniaturization, densification and multi-functionalization of electronic products, printed circuit boards are also developed to have high frequency, high speed and signal transmission integrity, and thus the total number of substrate layers is increasing. Thus, the arbitrary layer interconnection technology is rapidly developed due to its higher connection density. However, when a multilayer circuit board is manufactured by using the conventional manufacturing method, when the longitudinal interconnection stacking structure of the multilayer board is an asymmetric structure, the warpage problem of the finished board occurs, and the improvement is difficult. In addition, the production equipment is limited by the thickness of the plate or the plating thickness-diameter ratio, and the equipment is difficult to meet the requirements of manufacturing the multilayer plate, such as the situations of difficult pressing and production of the multilayer plate. The invention provides a method for longitudinally interconnecting multilayer circuit boards, which can overcome the two problems.

Disclosure of Invention

The present invention provides a method for manufacturing a multilayer circuit board to solve the above-mentioned technical problems.

In order to achieve the above purpose, the invention is realized by the following technical scheme:

a manufacturing method of a multilayer circuit board comprises the steps of dividing a target multilayer circuit board into a plurality of sub-boards, manufacturing each sub-board respectively, and then conducting and interconnecting any two sub-boards, wherein the conducting and interconnecting method of the two sub-boards comprises the following steps:

step one, arranging a first bonding layer on a graphic layer of a daughter board, and arranging a second bonding layer on the first bonding layer;

step two, a through hole is formed in the daughter board, and the through hole longitudinally penetrates through the second bonding layer and the first bonding layer until reaching a through pattern on the pattern layer;

filling conductive paste in the via hole;

and step four, conducting and combining the daughter board obtained in the step three with another daughter board.

According to one embodiment of the invention, the sub-boards include symmetrical multi-layer circuit sub-boards, multi-layer circuit sub-boards with board thickness and/or thickness-to-diameter ratio exceeding the capacity of the device.

According to one embodiment of the invention, the first bonding layer comprises a first bonding sheet, the first bonding sheet is in a semi-cured state, the first bonding sheet is connected with the pattern layer of the daughter board in a heating laminating mode, a copper foil protective layer covers the first bonding sheet during laminating, the copper foil protective layer is removed after laminating, and the first bonding sheet is in a completely cured state after laminating.

According to an embodiment of the invention, the second adhesive layer includes a second adhesive sheet, the second adhesive sheet in the first step to the third step is in a semi-cured state, and the second adhesive sheet is in a completely cured state after the daughter board and the daughter board are combined in the fourth step.

According to an embodiment of the present invention, in the first step, a release layer is disposed on the second adhesive layer; and removing the isolation layer in step three.

According to an embodiment of the present invention, the second adhesive layer and/or the isolation layer are disposed in a vacuum hot pressing manner, the second adhesive layer and the isolation layer are disposed separately, and the vacuum hot pressing parameters of the second adhesive layer and the isolation layer are the same or different, and range is: the pressure is 0.4MPa to 0.6MPa, the pressing time is 240s to 300s, and the temperature is 100 ℃ to 130 ℃, so that the second bonding sheet is in a semi-solidification state.

According to one embodiment of the present invention, the step three conductive paste filling method comprises the steps of first filling the conductive paste, second cyclically repeating the baking of the conductive paste to densify the conductive paste and replenish the conductive paste; thirdly, the conductive paste is pre-cured.

According to one embodiment of the present invention, the isolation layer is a polymer film, including a polyester film and/or a polyimide film.

According to one embodiment of the invention, the material of said first and second adhesion patch comprises one or more of: phenolic resins, epoxy resins, polyester resins, bismaleimides, triazine resins, polyphenylene oxides, polytetrafluoroethylene, hydrocarbons, polyimides, and/or fiberglass cloth.

According to an embodiment of the present invention, the via hole is formed in the second step using CO₂And in the laser method, after the via hole is burnt out, the via hole is processed by using a plasma and/or a sulfuric acid and hydrogen peroxide mixed solution, and carbide at the bottom of the via hole is removed.

According to an embodiment of the invention, in the third step, the conductive paste is filled by using a printing mode of scraping by using a scraper, and in the method for filling the conductive paste, the conductive paste is filled in the first step and is printed by using a colloid scraper, wherein the hardness of the colloid scraper is shore hardness 60-80 degrees; the second step of the method of filling the conductive paste is to replenish the conductive paste using a steel squeegee.

According to one embodiment of the invention, in the second step of the method for filling the conductive paste in the third step, the conductive paste is baked to be compact, wherein the baking temperature is 50-70 ℃, and the baking time is 10-20 minutes; and in the third step of the method for filling the conductive paste, the conductive paste is pre-cured and baked, wherein the baking temperature is 80-100 ℃, and the baking time is 50-70 minutes.

According to one embodiment of the invention, the material of the conductive paste is a composite material comprising conductive powder, resin adhesive, solvent and additive, wherein the material of the conductive powder is conductive metal, including silver powder and/or copper powder with micron-sized or nano-sized particle diameter; the resin adhesive is made of high-molecular polymer resin, including epoxy, phenolic, acrylic and/or hydrocarbon; the additives include coupling agents, leveling agents and/or dispersants.

According to one embodiment of the present invention, the four-daughter board and the daughter board are combined with each other by using a lamination method.

The invention aims to solve the problem of warping of a multilayer circuit board with an asymmetric structure, the multilayer circuit board with a target asymmetric structure is firstly divided into a plurality of sub-boards, each sub-board is of a symmetric structure, and then the mutually asymmetric sub-boards are communicated to form the multilayer circuit board with the target asymmetric structure, so that the problem of warping of the multilayer circuit board with the asymmetric structure is solved.

Also, multilayer circuit boards having a thickness or thickness/diameter ratio exceeding the capacity of the device can be manufactured by the method of the present invention. The invention reduces the manufacturing difficulty of electroplating the plate with high plate thickness and high thickness-diameter ratio, simplifies the flow and shortens the manufacturing period of the product.

The bonding layer adopts a double-layer design, because the first bonding sheet is completely cured when the bonding layer is manufactured in the via hole, the hole pattern at the bottom of the manufactured via hole is stable, and thus, resin cannot flow and penetrate in the processes of filling the conductive paste and subsequent pressing, and the reliability of connection between the conductive paste and a hole bottom plate is ensured; and the semi-cured state of the second bonding layer can be used for bonding other sub-boards. The baking of the filled conductive paste is to remove residual bubbles and solvent volatilization in the filling of the conductive paste in the through hole, so that the filling of the conductive paste is more compact; the conductive paste is baked after being filled, so that the conductive paste is pre-cured, the relative stability of the volume size of the conductive paste in the subsequent lamination process is ensured, the longitudinal conduction of an asymmetric structure layer substrate, an ultra-thick size layer substrate or a layer substrate with a high thickness-diameter ratio can be realized, and the processability is improved. The isolating layer is used for providing a printing pattern of the conductive paste, so that the conductive paste is filled in a required position; and the isolating layer is arranged, so that residual redundant conductive paste can be removed conveniently. The second bonding sheet keeps flat, so that unevenness of a part for subsequently punching the through hole can be prevented, and the unevenness of the punched part can deform when the second bonding sheet is subsequently cured, so that the deformation of the conductive paste is caused. The second adhesive sheet is kept flat to prevent such deformation from occurring.

Drawings

Fig. 1 is a schematic structural view of a first sub-board in embodiment 1;

fig. 2 is a schematic structural view of a second sub-board in embodiment 1;

FIG. 3 is a schematic view of a first sub-board laminating a first bonding sheet and a copper foil protective layer in example 1;

fig. 4 is a schematic structural view of a first sub-board and a first bonding sheet in embodiment 1;

fig. 5 is a schematic view of a first sub-board laminating a first adhesive sheet, a second adhesive sheet and an isolation layer in example 1;

FIG. 6 is a schematic view of via holes formed in example 1;

FIG. 7 is a schematic view of a via hole filled with a conductive paste in example 1;

fig. 8 is a schematic view illustrating the conductive interconnection between the second sub-board and the first sub-board in embodiment 1;

FIG. 9 is a schematic view of a target multilayer circuit board of example 1;

FIG. 10 is a schematic view of a target multilayer circuit board of embodiment 2;

fig. 11 is a schematic view of a target multilayer circuit board of embodiment 3.

Detailed Description

The invention is described in detail below with reference to the attached drawing figures:

example 1

As shown in fig. 1 to 9, the present embodiment illustrates a method for manufacturing a multilayer circuit board, which can be used to manufacture a multilayer circuit board with an asymmetric structure according to the present invention. Firstly, a target multilayer circuit board is divided into two sub-boards, the two sub-boards are mutually in an asymmetric structure, for example, as shown in fig. 1, a first sub-board 1 is in an arbitrary layer interconnection structure, and as shown in fig. 2, a second sub-board 2 is in a through hole interconnection structure. The first sub-board 1 and the second sub-board 2 are respectively of a symmetrical structure, and the first sub-board 1 and the second sub-board 2 are respectively manufactured according to a conventional method. The first sub-board 1 makes an a-plane graphics layer 3. The second sub-board 2 is fabricated with a C-plane graphics layer 5. The manufacturing method of the multilayer circuit board comprises the conducting interconnection of a first sub-board 1 and a second sub-board 2, and the conducting interconnection method of the first sub-board 1 and the second sub-board 2 comprises the following steps:

step 1, sequentially arranging a first adhesive layer and a second adhesive layer on the A-surface graph layer 3 of the first sub-board 1:

the first bonding layer comprises a first bonding sheet 7, the second bonding layer comprises a second bonding sheet 8, the first bonding sheet 7 is pressed on the A-surface graph layer 3 of the first sub-board 1, and the first bonding sheet 7 is a prepreg. As shown in fig. 3, the first bonding sheet 7 is provided by covering a copper foil protection layer 9 on the first bonding sheet 7, and then laminating the first bonding sheet 7 and the copper foil protection layer 9 on the a-side pattern layer 3 of the first sub-board 1 by heat lamination. The sequence of the layers formed after lamination is as follows from inside to outside: the A-side graphic layer 3, the first bonding sheet 7 and the copper foil protective layer 9. As shown in fig. 4, the copper foil protective layer 9 is removed by etching after lamination. After lamination, the first adhesive sheet 7 becomes a completely cured state, so that the first adhesive sheet 7 is tightly bonded to the a-side graphic layer 3.

As shown in fig. 5, vacuum hot pressing is then used to attach the second adhesive sheet 8 to the first adhesive sheet 7, the isolation layer 10 to the second adhesive sheet 8, and the second adhesive sheet 8 and the isolation layer 10 are attached separately to maintain the flatness of the two layers. The second bonding sheet 8 is a prepreg, and the isolation layer 10 is a sticky polymer film. The parameters for applying the second adhesive sheet 8 and the release layer 10 are all within this range: the pressure is 0.4MPa to 0.6MPa, the pressurizing time is 240s to 300s, and the temperature is 100 ℃ to 130 ℃. So as to ensure that the second bonding sheet 8 is still in a semi-cured state after being attached. In this embodiment, the pressure of the hot pressing of the second bonding sheet 8 and the isolation layer 10 is 0.6MPa, the temperature is 130 ℃, and the pressing time is 300 s.

The material of the first bonding sheet 7 and the second bonding sheet 8 comprises one or more of the following materials: phenolic resins, epoxy resins, polyester resins, bismaleimides, triazine resins, polyphenylene oxides, polytetrafluoroethylene, hydrocarbons, polyimides, and/or fiberglass cloth. The isolation layer 10 is made of polyethylene, polyester or polyimide.

Step 2, as shown in fig. 6, forming via holes 11 in the product obtained in step 1: the via hole 11 sequentially and longitudinally penetrates through the isolation layer 10, the second bonding sheet 8 and the first bonding sheet 7 until reaching the via pattern on the A-side pattern layer 3, and if the total thickness of the second bonding sheet 8 and the first bonding sheet 7 is large, the diameter of the via hole 11 is large, otherwise, the diameter is small. CO is used for forming the via hole 11₂According to the laser method, after the through hole 11 is burnt, the through hole 11 is processed by using a plasma or a sulfuric acid and hydrogen peroxide mixed solution, so that carbide at the bottom of the through hole 11 is removed, and the bottom of the through hole is ensured to be clean.

Step 3, filling the conducting hole 11 obtained in the step 2 with a conductive paste 12; the method for filling the conductive paste 12 is a printing mode of scraper scraping, the colloid scraper printing is used in the step, the material is polyurethane rubber, fluorinated rubber or organic silicon rubber, the hardness is 60 degrees to 80 degrees in shore hardness, 60 degrees is selected in the embodiment, and the colloid scraper printing aims to facilitate the filling of the conductive paste 12 into the guide through hole 11 through the deformation of the scraper. The conductive paste 12 is made of a composite material including conductive powder, a resin adhesive, a solvent and an additive, wherein the conductive powder is made of conductive metal powder having a particle size of micron order or nanometer order, and includes: silver powder and/or copper powder; the resin adhesive is made of high molecular resin, including epoxy, phenolic, acrylic and/or hydrocarbon; the additives include coupling agents, leveling agents and/or dispersants. The printing method of the doctor blade is to set the conductive paste 12 on the isolation layer 10, and to scrape the conductive paste 12 on the isolation layer 10 by using the doctor blade, so that the conductive paste 12 is attached to and filled in the via hole 11 through the opening part of the via hole 11 on the isolation layer 10, thereby completing the filling of the via hole 11. The printing process of the scraper scraping can refer to the process of screen printing, and is a conventional technology.

And 4, because air bubbles remain in the through holes after the printing in the step 3, baking the product obtained in the step 3 to enable the air bubbles to overflow, and enabling the paste solvent of the conductive paste 12 to volatilize through baking to enable the filling to be more compact. The baking temperature is 50 ℃; the baking time was 20 minutes. After baking, the surface of the conductive paste 12 is concave due to the discharge of bubbles and volatile solvents.

Step 5, supplementing conductive paste 12, filling the conductive paste 12 in the concave part formed in the step 4, and filling the concave part; the method for filling the conductive paste 12 in the lower concave part is a printing mode of scraping by a scraper, and a steel scraper is used for printing, the material is stainless steel, at the moment, the deformation action of the scraper is not needed, and the conductive paste filled in the via hole can be prevented from being excessively scraped out to cause insufficient filling; and (5) baking again in the step (4), and if bubbles or volatile solvents still exist and the pits are formed again, repeating the step (5); repeating the

steps

4 and 5 until the surface of the conductive paste 12 is no longer recessed, i.e. the depth of the surface recess is less than or equal to 15 μm, and continuing the following steps.

And 6, as shown in fig. 7, manually tearing off the isolation layer 10 of the product obtained in the step 5 to remove the residual conductive paste 12 on the surface of the isolation layer 10 in the printing process, and then baking the product to pre-cure the conductive paste 12 so as to ensure the volume stability of the conductive paste 12 in the subsequent pressing process. The baking temperature is 80 ℃; the baking time was 70 minutes.

And 7, as shown in fig. 8, combining the product obtained in the step 6, namely the first sub-board 1 and the second sub-board 2 to be interconnected with each other: the C-surface pattern layer 5 of the second sub-board 2 is opposite to the second bonding sheet 8 of the first sub-board 1, and the conducting pattern of the C-surface pattern layer 5 corresponds to the position of the conductive paste 12 on the first sub-board 1. The first sub-board 1 and the second sub-board 2 are fixed in advance in a hot melting and rivet combination mode, and then the first sub-board 1 and the second sub-board 2 are combined by lamination, so that the longitudinal conduction and interconnection of the first sub-board 1 and the second sub-board 2 are realized.

As shown in fig. 9, the B-plane graphics layer 4 of the first sub-board 1 is completed, and the D-plane graphics layer 6 of the second sub-board 2 is completed, so as to obtain the target multilayer circuit board. In the steps 1 to 6, the second bonding sheet 8 is in a semi-cured state, and in the step 7, the second bonding sheet 8 is in a completely cured state after the first sub-board 1 and the second sub-board 2 are laminated. And, since the prepreg is used before lamination, the second bonding sheet 8 is fused and filled in the pattern gap of the second sub-board 2 during lamination.

Example 2

As shown in fig. 10, the method for manufacturing a multilayer circuit board according to the present embodiment, which is the same as the method for manufacturing a multilayer circuit board with an asymmetric structure, can be manufactured by using the method of the present invention, and unlike embodiment 1, the present embodiment takes two sub-boards with different thicknesses and different layer numbers as an example. Firstly, a target multilayer circuit board is divided into two sub-boards, namely a third sub-board 13 and a fourth sub-board 14, wherein the third sub-board 13 is a 10-layer board with an arbitrary layer interconnection structure and is 2mm thick, and the fourth sub-board 14 is a 6-layer board with a through blind hole interconnection structure and is 0.5mm thick. The third sub-board 13 is provided with an E-plane pattern layer 15 and the fourth sub-board 14 is provided with an F-plane pattern layer 16. The third sub-board 13 and the fourth sub-board 14 are respectively fabricated using conventional techniques. The conductive interconnection method of the third sub-board 13 and the fourth sub-board 14 includes the steps of:

step 1, referring to embodiment 1, a first adhesive sheet 7, a second adhesive sheet 8 and an isolation layer 10 are sequentially arranged on an E-surface pattern layer 15 of a third sub-board 13: and the E-surface pattern layer 15 of the third sub-board 13 is pressed and solidified with the first bonding sheet 7. Then use vacuum hot pressing to laminate second tie coat 8 at first bonding sheet 7, laminate isolation layer 10 at first bonding sheet 7 respectively, the parameter of vacuum hot pressing is: the pressure is 0.4MPa, the temperature is 100 ℃, and the pressurizing time is 240s, so as to ensure that the attached second bonding sheet 8 is still in a semi-curing state.

Step 2, manufacturing a via hole 11 on the third sub-board 13 obtained in step 1 by using the method described in embodiment 1;

step 3, filling conductive pastes 12 into the via holes 11 obtained in the step 2 respectively; the method for filling the conductive paste 12 is a printing method of doctor blade scraping, and a colloid doctor blade printing method is used, and the hardness is 70 degrees on shore.

Step 4, baking the third sub-board 13 obtained in the step 3; the baking temperature is 70 ℃; the baking time was 10 minutes. Baking causes the surface of the filled conductive paste 12 to be depressed due to the discharge of bubbles and volatile solvents.

Step 5, filling conductive paste 12 in the concave parts of the third sub-board 13 formed in the step 4 respectively, and filling the concave parts; the method of filling the conductive paste 12 in the undercut is a printing method of squeegee, and a steel squeegee printing is used; and (5) baking again in the step (4), and if bubbles or volatile solvents still exist and the pits are formed again, repeating the step (5); repeating the

steps

And 6, manually tearing off the isolation layer 10 of the third sub-board 13 obtained in the step 5, and baking the third sub-board 13 to pre-cure the conductive paste 12 so as to ensure the volume stability of the conductive paste 12 in the subsequent pressing process. The baking temperature is 100 ℃; the baking time was 50 minutes.

And 7, mutually combining the third sub-board 13 and the fourth sub-board 14 obtained in the step 6: the F-surface pattern layer 16 of the fourth sub-board 14 is opposite to the second bonding sheet 8 of the third sub-board 13, and the conducting pattern of the F-surface pattern layer 16 corresponds to the position of the conductive paste 12 on the third sub-board 13. The third sub-board 13 and the fourth sub-board 14 are fixed in advance by means of hot melting and rivet combination, and then the third sub-board 13 and the fourth sub-board 14 are combined by lamination, so that longitudinal conduction interconnection of the third sub-board 13 and the fourth sub-board 14 is achieved.

Then, the G-plane pattern layer 17 of the third sub-board 13 and the H-plane pattern layer 18 of the fourth sub-board 14 are completed, and the target multilayer circuit board is obtained. The second bonding sheet 8 in steps 1 to 6 is a prepreg, and the second bonding sheet 8 is in a completely cured state after the third sub-board 13 and the fourth sub-board 14 are laminated in step 7.

Example 3

As shown in fig. 11, this embodiment takes as an example a target multilayer circuit board having a thickness of 6mm, which exceeds the device capability. The target multilayer circuit board is thus divided into sub-boards of 2mm thickness that can be manufactured by three devices, namely a fifth sub-board 19, a sixth sub-board 20 and a seventh sub-board 21. The fifth sub-board 19, the sixth sub-board 20 and the seventh sub-board 21 are respectively manufactured by a conventional method. Then, the fifth sub-board 19, the sixth sub-board 20 and the seventh sub-board 21 are conductively interconnected, and the method for conductively interconnecting the fifth sub-board 19, the sixth sub-board 20 and the seventh sub-board 21 includes the steps of:

step 1, referring to embodiment 1, a first adhesive sheet 7, a second adhesive sheet 8 and an isolation layer 10 are sequentially arranged on an L-plane pattern layer 22 of a fifth sub-board 19; the first adhesive sheet 7, the second adhesive sheet 8 and the isolation layer 10 are sequentially arranged on the M-surface pattern layer 23 of the sixth sub-board 20:

the first bonding sheet 7 is pressed on the L-side pattern layer 22 of the fifth sub-board 19, and the first bonding sheet 7 is pressed on the M-side pattern layer 23 of the sixth sub-board 20. Then, the second adhesive sheet 8 and the isolation layer 10 are respectively bonded to the fifth sub-board 19 and the sixth sub-board 20 as in embodiment 1. The second bonding sheet 8 and the isolation layer 10 are pressed together by vacuum hot pressing respectively, and the parameters are as follows: the pressure is 0.5MPa, the temperature is 120 ℃, and the pressurizing time is 270s, so that the second bonding sheet 8 after being attached is still in a semi-curing state.

Step 2, respectively manufacturing via holes 11 in the fifth sub-board 19 and the sixth sub-board 20 obtained in the step 1 by using the method described in the embodiment 1;

step 3, filling conductive paste 12 into the via holes 11 of the fifth sub-board 19 and the sixth sub-board 20 obtained in step 2; the method for filling the conductive paste 12 is a printing method of doctor blade scraping, and a colloid doctor blade printing method is used, and the hardness is 80 degrees shore.

Step 4, baking the fifth sub-board 19 and the sixth sub-board 20 obtained in the step 3; the baking temperature is 65 ℃; the baking time was 15 minutes. The baking causes the surface of the filled conductive paste 12 to be depressed due to the discharge of bubbles and volatile solvents.

Step 5, filling conductive paste 12 in the concave parts of the fifth sub-board 19 and the sixth sub-board 20 formed in the step 4 respectively, and filling the concave parts evenly; the method of filling the conductive paste 12 in the undercut is a printing method of squeegee, and a steel squeegee printing is used; and (5) baking again in the step (4), and if bubbles or volatile solvents still exist and the pits are formed again, repeating the step (5); and repeating the step 4 and the step 5 until the surface of the conductive paste 12 is not sunken, namely the depth of the surface depression is less than or equal to 15 mu m, and continuing the following steps.

And step 6, manually tearing off the isolation layer 10 of the fifth sub-board 19 and the sixth sub-board 20 obtained in the step 5, and baking the fifth sub-board 19 and the sixth sub-board 20 to pre-cure the conductive paste 12 so as to ensure the volume stability of the conductive paste 12 in the subsequent pressing process. The baking temperature is 90 ℃; the baking time was 60 minutes.

And 7, mutually combining the fifth sub-board 19, the sixth sub-board 20 and the seventh sub-board 21 obtained in the step 6: the Q-surface pattern layer 24 of the sixth sub-board 20 is opposite to the second bonding sheet 8 of the fifth sub-board 19, the conducting pattern of the Q-surface pattern layer 24 corresponds to the position of the conductive paste 12 on the fifth sub-board 19, the J-surface pattern layer 25 of the seventh sub-board 21 is opposite to the second bonding sheet 8 of the sixth sub-board 20, and the conducting pattern of the J-surface pattern layer 25 corresponds to the position of the conductive paste 12 on the sixth sub-board 20. The fifth sub-board 19, the sixth sub-board 20 and the seventh sub-board 21 are fixed in advance by means of hot melting and rivet combination, and then the fifth sub-board 19, the sixth sub-board 20 and the seventh sub-board 21 are combined by lamination, so that longitudinal conduction and interconnection of the fifth sub-board 19, the sixth sub-board 20 and the seventh sub-board 21 are achieved, and the multilayer circuit board is obtained.

In this embodiment, the fifth sub-board 19 and the sixth sub-board 20 may be manufactured separately, and then the fifth sub-board 19, the sixth sub-board 20, and the seventh sub-board 21 are electrically connected to each other. The seventh sub-board 21 may be conductively interconnected on the basis of the conductive interconnection of the fifth sub-board 19 and the sixth sub-board 20.

Then, the manufacturing of the N-plane pattern layer 26 of the fifth sub-board 19 and the manufacturing of the P-plane pattern layer 27 of the seventh sub-board 21 are completed, and the target multilayer circuit board is obtained. The second bonding sheet 8 in the steps 1 to 6 is a prepreg, and the second bonding sheet 8 becomes a completely cured state after lamination in the step 7.

The bonding layer adopts a double-layer design, because the first bonding sheet 7 is completely cured when the bonding layer is manufactured in the via hole 11, the hole pattern at the bottom of the manufactured via hole 11 is stable, thus, resin cannot flow and penetrate in the processes of filling the conductive paste 12 and subsequent pressing, and the reliability of connection between the conductive paste 12 and the hole bottom is ensured; and the semi-cured state of the second bonding layer can be used for bonding other sub-boards. The filling mode of combining at least two times of printing and baking of the conductive paste 12 realizes complete filling and pre-curing of the paste, ensures that the volume size of the conductive paste 12 is relatively stable in the subsequent laminating process, can realize longitudinal conduction of an asymmetric structure layer substrate, an ultra-thick size layer substrate or a layer substrate with a high thickness-diameter ratio, and improves the processability. The invention reduces the manufacturing difficulty of electroplating the plate with high thickness-diameter ratio, simplifies the flow and shortens the manufacturing period of the product. The isolating layer is used for providing a printing pattern of the conductive paste, so that the conductive paste is filled in a required position; and the isolating layer is arranged, so that residual redundant conductive paste can be removed conveniently. The second adhesive sheet 8 is kept flat, so that unevenness of a portion to be subsequently punched with the via hole 11, which may be deformed when the second adhesive sheet 8 is subsequently cured, to cause deformation of the conductive paste 12, can be prevented. The second adhesive sheet 8 is kept flat to prevent such deformation from occurring.

The embodiments of the present invention are merely illustrative, and not restrictive, of the scope of the claims, and other substantially equivalent alternatives may occur to those skilled in the art and are within the scope of the present invention.

Claims

1. A manufacturing method of a multilayer circuit board is characterized in that a target multilayer circuit board is divided into a plurality of sub-boards, the sub-boards are manufactured respectively, then any two sub-boards are communicated and interconnected, and the communicating and interconnecting method of the two sub-boards comprises the following steps:

step two, a through hole is manufactured on the daughter board, and the through hole longitudinally penetrates through the second bonding layer and the first bonding layer until reaching a through pattern on the pattern layer;

filling conductive paste in the via hole;

step four, the daughter board obtained in the step three is mutually conducted and combined with another daughter board;

the first bonding layer comprises a first bonding sheet in a semi-cured state, the first bonding sheet is connected with the pattern layer of the daughter board in a heating laminating mode, a copper foil protective layer covers the first bonding sheet during laminating, the copper foil protective layer is removed after laminating, and the first bonding sheet becomes in a completely cured state after laminating; the second bonding layer comprises a second bonding sheet, the second bonding sheet in the first step to the third step is in a semi-cured state, and the second bonding sheet is in a completely cured state after the four secondary boards and the secondary boards are combined; in the first step, an isolation layer is arranged on the second bonding layer; removing the isolation layer in the third step; the second bonding sheet keeps a flat state;

the third step of filling the conductive paste comprises the steps of filling the conductive paste, circularly and repeatedly baking the conductive paste to densify the conductive paste and replenishing the conductive paste; thirdly, the conductive paste is pre-cured.

2. The method of claim 1, wherein the sub-boards include symmetrical multi-layer sub-boards, and multi-layer sub-boards having a thickness and/or thickness/diameter ratio exceeding the capacity of the device.

3. The method for manufacturing a multilayer circuit board according to claim 1, wherein the second adhesive layer and/or the isolation layer are arranged in a vacuum hot pressing manner, the second adhesive layer and the isolation layer are respectively arranged, and the vacuum hot pressing parameters of the second adhesive layer and the isolation layer are the same or different, and the ranges are as follows: the temperature is 100 ℃ to 130 ℃, the pressure is 0.4MPa to 0.6MPa, and the pressurizing time is 240s to 300 s.

4. A method of fabricating a multilayer circuit board according to claim 1, wherein the spacer is a polymer film comprising a polyester film and/or a polyimide film.

5. A method for manufacturing a multilayer circuit board according to claim 1, wherein the material of the first and second bonding sheets comprises one or more of: phenolic resins, epoxy resins, polyester resins, bismaleimides, triazine resins, polyphenylene oxides, polytetrafluoroethylene, hydrocarbons, polyimides, and/or fiberglass cloth.

6. The method for manufacturing a multilayer circuit board according to claim 1, wherein a CO2 laser method is used for manufacturing the via hole in the second step, and after the via hole is burned out, the via hole is treated by using a plasma and/or a hydrogen peroxide sulfate mixed solution to remove carbide at the bottom of the via hole.

7. The method for manufacturing a multilayer circuit board according to claim 1, wherein in the third step, the conductive paste is filled by a printing method of scraping with a scraper, and in the method for filling the conductive paste, the conductive paste is filled in the first step by printing with a colloid scraper, and the hardness of the colloid scraper is shore hardness 60 ° to 80 °; the second step of the method of filling the conductive paste is to replenish the conductive paste using a steel squeegee.

8. The method for manufacturing a multilayer circuit board according to claim 1, wherein in the second step of the method for filling the conductive paste in the third step, the conductive paste is baked at a baking temperature of 50 ℃ to 70 ℃ for 10 minutes to 20 minutes to densify the conductive paste;

and in the third step of the method for filling the conductive paste, the conductive paste is pre-cured and baked, wherein the baking temperature is 80-100 ℃, and the baking time is 50-70 minutes.

9. The method of claim 1, 7 or 8, wherein the conductive paste is a composite material comprising conductive powder, resin binder, solvent and additive, wherein the conductive powder is a conductive metal comprising silver powder and/or copper powder having a particle size of micron or nanometer; the resin adhesive is made of high molecular polymer resin, including epoxy, phenolic, acrylic and/or hydrocarbon; the additives include coupling agents, leveling agents and/or dispersants.

10. The method of claim 1, wherein the four daughter boards are laminated to each other.