5G base station power amplifier
Technical Field
The invention relates to the technical field of fifth-generation mobile communication equipment, in particular to a 5G base station power amplifier.
Background
The fifth generation mobile communication (5G) adopts a wideband digital modulation technology, the modulated wave is a non-constant envelope signal, and the peak-to-average ratio is high, which means that the base station transmitter should adopt a power amplifier with high linearity. In order to meet the linearity index in large dynamic, the power amplifier adopts an AB type with large back-off, and the power adding efficiency is low.
In order to improve the spectrum utilization rate of the system and meet different application scenes such as high speed, large bandwidth, low time delay and the like, a mobile base station of a fifth generation mobile communication (5G) system adopts an active array antenna based on large-scale multiple input multiple output and beam forming. In this configuration, the power amplifier is required to be configured for one antenna array unit or for a plurality of antenna array units, which means that the active antenna array antenna is configured with a plurality of power amplifiers of thousands or even thousands. Therefore, the power amplifier for the fifth generation mobile communication (5G) must meet the heat dissipation requirement of the base station, and the power additional efficiency requirement of the antenna to the power amplifier is high.
In order to meet the requirements of high efficiency and high linearity, a fifth generation mobile communication (5G) system adopts a technical circuit combining a high-efficiency power amplifier and a linearization technology, adopts a digital predistortion technology on linearity, and realizes high efficiency by a power amplifier. The existing technology for improving the efficiency of the power amplifier comprises the technologies of a small-back class AB power amplifier, a Cherex, envelope elimination restoration, dynamic envelope tracking and the like. The small-rollback AB type power amplifier is easy to realize and convenient to produce, but has limited capability of improving efficiency, and is insufficient to meet the requirements; the Cherex technology requires accurate conversion of signal amplitude and phase in a wide frequency band, and has great technical difficulty; the technologies such as envelope elimination restoration, dynamic envelope tracking and the like need a power converter with broadband and high response speed, and the device technology cannot meet the requirements.
Although the digital predistortion technology can effectively improve the linearity of the fifth generation mobile communication (5G) and reduce the requirement on the linearity of the power amplifier, the complicated digital predistortion technology has larger expenditure on hardware, improves the complexity of the system technology and the cost of base station equipment, so that the digital predistortion technology searches for the optimal configuration in the linearity and the power additional efficiency of the power amplifier, and is one of the important problems of the power amplifier of the fifth generation mobile communication (5G) base station.
Disclosure of Invention
In order to solve the drawbacks of the prior art, an object of the present invention is to provide a fifth generation mobile communication (5G) base station power amplifier.
In order to solve the technical problems of the invention, the adopted technical scheme is as follows: the 5G base station power amplifier mainly comprises an SMA input port, a microstrip type power divider, a power divider isolation resistor, a second path quarter-wave transmission line, a first path preamplifier tube, a second path preamplifier tube, a first path main amplifier tube, a second path main amplifier tube, a first path quarter-wave transmission line, a power synthesizer isolation resistor, a power synthesizer and an SMA output port; the signal is input by an SMA input port and is divided into two paths of signals through a microstrip type power divider, and the two paths of signals are mutually isolated through a power divider isolation resistor; the first channel signal is amplified by a first channel pre-amplifier tube, input to a first channel main amplifier tube, and then input to a power synthesizer by a first channel quarter-wavelength transmission line; the second path signal is input to the second path preamplifier tube through the second path quarter-wavelength transmission line and is input to the power synthesizer through the second path main amplifier tube; the signals are synthesized into a signal through a power synthesizer and a power synthesizer isolation resistor, and are output through an SMA output port.
The 5G base station power amplifier comprises a first passage preamplifier tube, a first passage main amplifier tube, a second passage preamplifier tube and a second passage main amplifier tube which are packaged by a power amplifier tube packaging chip; the first path signal is input to a first radio frequency input port of the power amplifier tube packaging chip, and the second path signal is input to a second radio frequency input port of the power amplifier tube packaging chip through a second path quarter-wavelength transmission line; the power amplifier tube packaging chip amplifies two-channel signals, the two-channel signals are output through a first radio frequency output port and a second radio frequency output port of the power amplifier tube packaging chip respectively, the first-channel signals are output to the power combiner through a first-channel quarter-wavelength transmission line, the second-channel signals are directly output to the power combiner 11, and finally the second-channel signals are output through an SMA output port.
In the 5G base station power amplifier, in a first passage, a first passage pre-amplifier tube gate voltage VG1 is input through a bonding pad and is transmitted through a first passage pre-amplifier tube gate voltage VG1 feeder line, one end of a first capacitor of the first passage pre-amplifier tube gate is connected with the first passage pre-amplifier tube gate voltage VG1 feeder line, and the other end of the first capacitor of the first passage pre-amplifier tube gate voltage VG is grounded through a via hole; one end of the second capacitor of the grid electrode of the first passage pre-amplifier tube is connected with a grid voltage VG1 feeder line of the first passage pre-amplifier tube, and the other end of the second capacitor of the grid electrode of the first passage pre-amplifier tube is grounded through a via hole; one end of a third capacitor of the grid electrode of the first passage pre-amplifier tube is connected with a grid voltage VG1 feeder line of the first passage pre-amplifier tube, and the other end of the third capacitor is grounded through a via hole; the first-pass pre-amplifier tube gate voltage VG1 is applied to the gate of the first-pass pre-amplifier tube by the first-pass pre-amplifier tube gate voltage VG1 feeder, the first-pass pre-amplifier tube gate first capacitor, the first-pass pre-amplifier tube gate second capacitor, and the first-pass pre-amplifier tube gate third capacitor;
in the first passage, the drain electrode voltage VD1 of the first passage pre-amplifier tube is input through a bonding pad and is transmitted through a drain electrode voltage VD1 feeder line of the first passage pre-amplifier tube, one end of a first capacitor of the drain electrode of the first passage pre-amplifier tube is connected with the drain electrode voltage VD1 feeder line of the first passage pre-amplifier tube, and the other end of the first capacitor crosses the gate electrode voltage VG1 feeder line of the first passage pre-amplifier tube and is grounded through a through hole; one end of the second capacitor of the drain electrode of the first passage pre-amplifier tube is connected with a drain voltage VD1 feeder line of the first passage pre-amplifier tube, and the other end of the second capacitor is grounded through a via hole; one end of a third capacitor of the drain electrode of the first passage preamplifier tube is connected with a drain voltage VD1 feeder line of the first passage preamplifier tube, and the other end of the third capacitor is grounded through a via hole; the first pass preamplifier tube drain electrode voltage VD1 is applied to the drain of the first pass preamplifier tube by the first pass preamplifier tube drain voltage VD1 feed line, the first pass preamplifier tube drain first capacitance, the first pass preamplifier tube drain second capacitance, and the first pass preamplifier tube drain third capacitance.
In the 5G base station power amplifier, the grid voltage VG2 and the drain voltage VD2 of the first path main amplifier tube, the grid voltage VG3 and the drain voltage VD3 of the second path pre-amplifier tube, the grid voltage VG4 and the drain voltage VD4 of the second path main amplifier tube respectively act on the grid and the drain of the first path main amplifier tube, the grid and the drain of the second path pre-amplifier tube and the grid and the drain of the second path main amplifier tube by adopting the same layout wiring mode of a feeder line and a bias capacitor as the first path pre-amplifier tube.
Compared with the prior art, the invention has the beneficial effects that:
the input end of the 5G base station power amplifier adopts a power divider to divide an input signal into two paths, the output end adopts a power synthesizer to synthesize the two paths of signal paths into one path of signal output, and the power divider at the input end and the combiner at the output end both adopt resistance isolation devices. The input end of the preamplifier tube of the second path of signal path is connected with a quarter-wavelength transmission line, the output end of the main amplifier tube of the first path of signal path is connected with the quarter-wavelength transmission line, and the two paths of signals adopt a stepped impedance transformation device to achieve the optimal matching of impedance. The first path of signal path adopts a two-stage serial power amplifier tube structure, wherein the pre-amplifier tube adopts a class A amplifier structure, and the main amplifier tube adopts a class AB amplifier; the second signal path adopts a two-stage series power amplifier tube structure, wherein the pre-amplifier tube adopts a class A amplifier structure, and the main amplifier tube adopts a class C amplifier. The power amplifier transistors in the two paths are field effect transistors and are packaged with integrated circuits. In order to meet the performance requirement of the power amplifier, the invention is provided with the optimal bias voltage and peripheral circuits, and has the characteristics of high gain, high linearity, high power additional efficiency and the like.
Drawings
The 5G base station power amplifier of the present invention is further described in detail below with reference to the examples and figures.
Fig. 1 is a signal transmission schematic diagram of a 5G base station power amplifier.
Fig. 2 is a schematic circuit diagram of a 5G base station power amplifier.
In the figure: 1-SMA input port; 2-microstrip type power divider; 3-isolating resistors of the power divider; 4-second path quarter wavelength transmission lines; 5-a first pass preamplifier tube; 6-a second pass preamplifier tube; 7-a first path main amplifier tube; 8-second path main amplifier tube; 9-a first pass quarter wavelength transmission line; 10-a power combiner isolation resistor; 11-a power combiner; 12-SMA output port.
13-power amplifier tube package chip; 14-a first radio frequency input port; 15-a second radio frequency input port; 16-a first radio frequency output port; 17-a second radio frequency output port.
18-a first pass preamplifier tube gate voltage VG1; 19-a first pass preamplifier tube gate voltage VG1 feed; 20-a first pass preamplifier tube gate first capacitance; 21-a first pass preamplifier tube gate second capacitance; 22-a first pass pre-amplifier tube gate third capacitance.
23-a first pass preamplifier tube drain electrode voltage VD1; 24-a first pass preamplifier tube drain voltage VD1 feed; 25-a first pass preamplifier tube drain first capacitance; 26-a first pass preamplifier tube drain second capacitance; 27-a first pass preamplifier tube drain third capacitance.
Detailed Description
Referring to fig. 1, the 5G base station power amplifier mainly includes an SMA input port 1, a microstrip power divider 2, a power divider isolation resistor 3, a second path quarter-wave transmission line 4, a first path preamplifier tube 5, a second path preamplifier tube 6, a first path main amplifier tube 7, a second path main amplifier tube 8, a first path quarter-wave transmission line 9, a power combiner isolation resistor 10, a power combiner 11, and an SMA output port 12.
The signal is input by an SMA input port 1 and is divided into two paths of signals through a microstrip type power divider 2, and the two paths of signals are mutually isolated through a power divider isolation resistor 3; the first channel signal is amplified by the first channel pre-amplifier tube 5, input to the first channel main amplifier tube 7, and then input to the power synthesizer 11 by the first channel quarter-wavelength transmission line 9; the second path signal is input to the second path preamplifier pipe 6 through the second path quarter wave transmission line 4 and is input to the power combiner 11 through the second path main amplifier pipe 8; the signals are synthesized into a signal through a power synthesizer 11 and a power synthesizer isolation resistor 10, and are output through an SMA output port 12.
As shown in fig. 2, the first path preamplifier tube, the first path main amplifier tube, the second path preamplifier tube, and the second path main amplifier tube are packaged by the power amplifier tube package chip 13. The first path signal is input to the first radio frequency input port 14 of the power amplifier tube package chip 13 and the second path signal is input to the second radio frequency input port 15 of the power amplifier tube package chip 13 via the second path quarter wave transmission line 4. The power amplifier tube packaging chip 13 amplifies the two-channel signals, and then outputs the two-channel signals through a first radio frequency output port 16 and a second radio frequency output port 17 of the power amplifier tube packaging chip 13 respectively, wherein the first-channel signal is output to the power combiner 11 through a first-channel quarter-wavelength transmission line 9, and the second-channel signal is directly output to the power combiner 11 and finally output through an SMA output port 12.
Referring to fig. 2, a first pass pre-amplifier tube gate voltage VG118 is input through a pad and is transmitted through a first pass pre-amplifier tube gate voltage VG1 feeder 19, one end of a first pass pre-amplifier tube gate first capacitor 20 (C11) is connected to the first pass pre-amplifier tube gate voltage VG1 feeder 19, and the other end is grounded through a via; one end of the first-path pre-amplifier tube gate electrode second capacitor 21 (C12) is connected with the first-path pre-amplifier tube gate electrode voltage VG1 feeder line 19, and the other end is grounded through a via hole; the first pass pre-amplifier tube gate third capacitor 22 (C13) has one end connected to the first pass pre-amplifier tube gate voltage VG1 feed line 19 and the other end connected to ground through the via. VG1 acts on the gate of the first pass preamplifier tube 5 through the feed lines and C11, C12, C13.
The drain electrode voltage VD123 of the first-path pre-amplifier tube is input through a bonding pad and transmitted through a drain electrode voltage VD1 feeder 24 of the first-path pre-amplifier tube, one end of a drain electrode first capacitor 25 (C14) of the first-path pre-amplifier tube is connected with the drain electrode voltage VD1 feeder 24 of the first-path pre-amplifier tube, and the other end of the first capacitor crosses a gate electrode voltage VG1 feeder 19 of the first-path pre-amplifier tube and is grounded through a via; one end of the first-path pre-amplifier tube drain electrode second capacitor 26 (C15) is connected with the first-path pre-amplifier tube drain electrode voltage VD1 feeder line 24, and the other end is grounded through a via hole; the first pass pre-amplifier tube drain third capacitor 27 (C16) has one end connected to the first pass pre-amplifier tube drain voltage VD1 feed 24 and the other end grounded through the via. VD1 acts on the drain of the first path preamplifier tube 5 through feed lines and C14, C15, C16.
The gate voltage VG2 and the drain voltage VD2 of the first path main amplifier tube, the gate voltage VG3 and the drain voltage VD3 of the second path preamplifier tube, the gate voltage VG4 and the drain voltage VD4 of the second path main amplifier tube are respectively applied to the gate and the drain of the first path main amplifier tube, the gate and the drain of the second path preamplifier tube, and the gate and the drain of the second path main amplifier tube by adopting the same layout wiring manner of the feeder line and the bias capacitor as the first path preamplifier tube.
The foregoing is merely illustrative and explanatory of the principles of the invention, as various modifications and additions may be made to the specific embodiments described, or similar thereto, by those skilled in the art, without departing from the principles of the invention or beyond the scope of the appended claims.