CN201846313U - Millimeter wave monolithic integrated power amplifier - Google Patents
Millimeter wave monolithic integrated power amplifier Download PDFInfo
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- CN201846313U CN201846313U CN2010206084332U CN201020608433U CN201846313U CN 201846313 U CN201846313 U CN 201846313U CN 2010206084332 U CN2010206084332 U CN 2010206084332U CN 201020608433 U CN201020608433 U CN 201020608433U CN 201846313 U CN201846313 U CN 201846313U
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Abstract
The utility model discloses millimeter wave monolithic integrated power amplifier, belongs to the technical field of electronics and is used for resolving the problems of large size and incapability of meeting demands of modern radar and communication system in terms of output power and gain of amplifiers in the prior art. Two identical amplifying branches are connected between two Lange couplers, radio frequency outputs of the amplifying branches can realize two-stage power amplification through a two-stage power dividing circuit and a two-stage PHEMT ( pseudomorphic high electron mobility transistor) field effect tube, and then realize output through a two-stage power synthesized circuit. The millimeter wave monolithic integrated power amplifier uses a monolithic integrated technology to reduce size of the amplifier; the two-stage amplifying circuit comprises eight power amplifying units and outputs power signals of the eight power amplifying units to in a coupling mode, thereby increasing output power of the power amplifier greatly; and the amplifier adopts a balance structure formed by the two Lange couplers to increase stability of the power amplifier, improve performance of stand-by wave radio and increase output power.
Description
Technical field
The utility model belongs to electronic technology field, and particularly a kind of millimeter-wave monolithic integrated power amplifier (PA) can be applicable to systems such as radar, communication.
Background technology
In system fields such as millimetre-wave radar, communications, millimeter wave receiver generally all is the noise problem that overcomes the back level in prime with the power amplifier received signal in order to detect small-signal.Power amplifier is positioned at transmitter, directly be connected with aerial signal, so its noise characteristic will influence the noise characteristic of whole system greatly.Simultaneously, the signal strength signal intensity that antenna receives generally all a little less than, amplifier also requires certain noise factor requirement when the output of satisfying power requires.
The power amplifier of widespread usage mostly is hybrid circuit and modular circuit at present, main implementation is to form by single transistor and peripheral match circuit, and this class low power amplifier major defect has: volume is big, power output is little, gain is little, consistency is bad etc.
As shown in Figure 2, it is a kind of improved integrated power amplifier, its with two route single transistors and peripheral circuit form circuit be coupled by two bright lattice couplers, this amplifier is being improved aspect power output, gain, the consistency, but has still that volume is big, power output and gain do not reach modern radar and communication system requires a shortcoming.
Along with developing rapidly of the microwave and millimeter wave communication technology, people are also more and more higher to the requirement of communication equipment.Microwave monolithic integrated circuit (MMIC) is active device, passive device and microwave transmission line, interconnection line etc. all to be produced on a slice semiconductor chip and the integrated circuit that constitutes with semiconductor technology.Because little, in light weight, the advantages such as reliability is high, good stability of volume of microwave monolithic integrated circuit (MMIC) make it replace Wave guide system and hybrid integrated circuit gradually in the microwave communication field.
The utility model content
Goal of the invention of the present utility model is: at the problem of above-mentioned existence, provide a kind of based on pHEMT field effect transistor technology, the set merit is divided technology, the balanced structure that adopts two bright lattice couplers to constitute, when having guaranteed that high conformity and volume are little, improve the purpose of power amplifier output power greatly.
The technical solution adopted in the utility model is such:
A kind of millimeter-wave monolithic integrated power amplifier, comprise the bright lattice coupler of input, the bright lattice coupler of output, be connected in the straight-through output of the bright lattice coupler of input and export bright lattice coupler straight-through input first amplify branch road, be connected in the coupling output of the bright lattice coupler of input and export bright lattice coupler couple input second amplify branch road; The whole amplifier circuit is integrated on the monolithic semiconductor substrate;
The described first amplification branch road and second amplifies branch road and is identical two-stage amplification circuit structure; Described first order amplifying circuit carries out first order processing and amplifying to the radiofrequency signal of importing bright lattice coupler input; The radiofrequency signal of input is divided into two paths of signals after by first order coupling capacitance and the little band merit of T type parallel circuit: one tunnel grid that is input to pHEMT field effect transistor FET1 through grid coupling and the biasing circuit of pHEMT field effect transistor FET1, the grid that another road is input to pHEMT field effect transistor FET2 through grid coupling and the biasing circuit of pHEMT field effect transistor FET2; The source ground of pHEMT field effect transistor FET1 and FET2; The drain electrode of pHEMT field effect transistor FET1 and FET2 is exported first order amplifying signal by separately drain electrode coupling and biasing circuit respectively.
In the first order amplifying circuit: the grid of described pHEMT field effect transistor FET1 and FET2 coupling and biasing circuit are T type structural circuit: gate bias voltage connects the vertical end of T type microstrip transmission line by its shunt capacitance ground connection the time by microstrip transmission line and biasing resistor, the horizontal right-hand member of T type microstrip transmission line connects the grid of pHEMT field effect transistor, and the horizontal left end of T type microstrip transmission line connects the output of the little band merit of T type parallel circuit; The drain electrode of described pHEMT field effect transistor FET1 and FET2 is T type structural circuit: drain bias voltage connects the vertical end of T type microstrip transmission line by its shunt capacitance ground connection the time by microstrip transmission line and biasing resistor, the horizontal left end of T type microstrip transmission line connects the drain electrode of pHEMT field effect transistor, the horizontal right-hand member output first order amplifying signal of T type microstrip transmission line.
Described second level amplifying circuit carries out second level processing and amplifying and the synthetic output of power to first order amplifying signal; Two-way first order amplifying signal is respectively by being divided into four road signals behind two second level coupling capacitances and the little band merit of the T type parallel circuit; First via signal is input to the grid of pHEMT field effect transistor FE3 through the grid of pHEMT field effect transistor FET3 coupling and biasing circuit, the second road signal is input to the grid of pHEMT field effect transistor FET44 through the grid of pHEMT field effect transistor FET4 coupling and biasing circuit, the Third Road signal is input to the grid of pHEMT field effect transistor FET5 through the grid of pHEMT field effect transistor FET5 coupling and biasing circuit, the grid that the four road signal is input to pHEMT field effect transistor FET6 through grid coupling and the biasing circuit of pHEMT field effect transistor FET6; The source ground of pHEMT field effect transistor FET3, FET4, FET5 and FET6; Four tunnel second level amplifying signals are exported in the drain electrode of pHEMT field effect transistor FET3, FET4, FET5 and FET6; The two-way second level amplifying signal of the drain electrode output of pHEMT field effect transistor FET3 and FET4 unites two into one through an one-level power synthesis circuit, and the two-way second level amplifying signal of the drain electrode output of pHEMT field effect transistor FET5 and FET6 unites two into one through another one-level power synthesis circuit; The two paths of signals of the output circuit output of two one-level power synthesis circuits unites two into one after export bright lattice coupler output through a secondary power combiner circuit.
Second level amplifying circuit: the grid of described pHEMT field effect transistor FET3, FET4, FET5 and FET6 coupling and biasing circuit are T type structural circuit: gate bias voltage connects the vertical end of T type microstrip transmission line by its shunt capacitance ground connection the time by microstrip transmission line and biasing resistor, the horizontal right-hand member of T type microstrip transmission line connects the grid of pHEMT field effect transistor, and the horizontal left end of T type microstrip transmission line connects the output of the little band merit of T type parallel circuit; The drain electrode of described pHEMT field effect transistor FET3, FET4, FET5 and FET6 is T type structural circuit: drain bias voltage connects the vertical end of T type microstrip transmission line by its shunt capacitance ground connection the time by microstrip transmission line and biasing resistor, the horizontal left end of T type microstrip transmission line connects the drain electrode of pHEMT field effect transistor, the horizontal right-hand member output second level amplifying signal of T type microstrip transmission line.
In the utility model, the device of pHEMT field effect transistor select or technological design on, select long shorter, the device that carrier mobility is high of grid for use, and the grid width of choose reasonable device and interdigital number, direct current biasing point.
In sum, owing to adopted technique scheme, the beneficial effects of the utility model are:
1, adopts the two-stage amplifying circuit, adopt merit to divide synthetic technology to make second level circuit comprise 8 power amplification units altogether,, increased the power output and the bandwidth of power amplifier greatly at last with the power signal coupling output of 8 power amplification units.
2, the balanced structure that adopts two bright lattice couplers to constitute, improved amplifier stability, improve the standing-wave ratio performance and improved power output;
3, high efficiency has been taken into account in choose reasonable semiconductor technology and tube core working point when realizing high-output power.
Description of drawings
Fig. 1 is the schematic diagram of the utility model millimeter-wave monolithic integrated power amplifier.
Fig. 2 is the schematic diagram of prior art power amplifier.
Embodiment
Below in conjunction with accompanying drawing, the utility model is done detailed explanation.
In order to make the purpose of this utility model, technical scheme and advantage clearer,, the utility model is further elaborated below in conjunction with drawings and Examples.Should be appreciated that specific embodiment described herein only in order to explanation the utility model, and be not used in qualification the utility model.
As shown in Figure 1, be the schematic diagram of the utility model millimeter-wave monolithic integrated power amplifier.A kind of millimeter-wave monolithic integrated power amplifier, comprise the bright lattice coupler of input, the bright lattice coupler of output, be connected in the straight-through output of the bright lattice coupler of input and export bright lattice coupler straight-through input first amplify branch road, be connected in the coupling output of the bright lattice coupler of input and export bright lattice coupler couple input second amplify branch road; The whole amplifier circuit is integrated on the monolithic semiconductor substrate.
The described first amplification branch road and second amplifies branch road and is identical two-stage amplification circuit structure; Described first order amplifying circuit carries out first order processing and amplifying to the radiofrequency signal of importing bright lattice coupler input; The radiofrequency signal of input is divided into two paths of signals after by first order coupling capacitance and the little band merit of T type parallel circuit: one tunnel grid that is input to pHEMT field effect transistor FET1 through grid coupling and the biasing circuit of pHEMT field effect transistor FET1, the grid that another road is input to pHEMT field effect transistor FET2 through grid coupling and the biasing circuit of pHEMT field effect transistor FET2; The source ground of pHEMT field effect transistor FET1 and FET2; The drain electrode of pHEMT field effect transistor FET1 and FET2 is exported first order amplifying signal by separately drain electrode coupling and biasing circuit respectively.
In the first order amplifying circuit:
The grid of described pHEMT field effect transistor FET1 and FET2 coupling and biasing circuit are T type structural circuit: gate bias voltage connects the vertical end of T type microstrip transmission line by its shunt capacitance ground connection the time by microstrip transmission line and biasing resistor, the horizontal right-hand member of T type microstrip transmission line connects the grid of pHEMT field effect transistor, and the horizontal left end of T type microstrip transmission line connects the output of the little band merit of T type parallel circuit; The drain electrode of described pHEMT field effect transistor FET1 and FET2 is T type structural circuit: drain bias voltage connects the vertical end of T type microstrip transmission line by its shunt capacitance ground connection the time by microstrip transmission line and biasing resistor, the horizontal left end of T type microstrip transmission line connects the drain electrode of pHEMT field effect transistor, the horizontal right-hand member output first order amplifying signal of T type microstrip transmission line.
Described second level amplifying circuit carries out second level processing and amplifying and the synthetic output of power to first order amplifying signal; Two-way first order amplifying signal is respectively by being divided into four road signals behind two second level coupling capacitances and the little band merit of the T type parallel circuit; First via signal is input to the grid of pHEMT field effect transistor FE3 through the grid of pHEMT field effect transistor FET3 coupling and biasing circuit, the second road signal is input to the grid of pHEMT field effect transistor FET44 through the grid of pHEMT field effect transistor FET4 coupling and biasing circuit, the Third Road signal is input to the grid of pHEMT field effect transistor FET5 through the grid of pHEMT field effect transistor FET5 coupling and biasing circuit, the grid that the four road signal is input to pHEMT field effect transistor FET6 through grid coupling and the biasing circuit of pHEMT field effect transistor FET6; The source ground of pHEMT field effect transistor FET3, FET4, FET5 and FET6; Four tunnel second level amplifying signals are exported in the drain electrode of pHEMT field effect transistor FET3, FET4, FET5 and FET6; The two-way second level amplifying signal of the drain electrode output of pHEMT field effect transistor FET3 and FET4 unites two into one through an one-level power synthesis circuit, and the two-way second level amplifying signal of the drain electrode output of pHEMT field effect transistor FET5 and FET6 unites two into one through another one-level power synthesis circuit; The two paths of signals of the output circuit output of two one-level power synthesis circuits unites two into one after export bright lattice coupler output through a secondary power combiner circuit.
Second level amplifying circuit:
The grid of described pHEMT field effect transistor FET3, FET4, FET5 and FET6 coupling and biasing circuit are T type structural circuit: gate bias voltage connects the vertical end of T type microstrip transmission line by its shunt capacitance ground connection the time by microstrip transmission line and biasing resistor, the horizontal right-hand member of T type microstrip transmission line connects the grid of pHEMT field effect transistor, and the horizontal left end of T type microstrip transmission line connects the output of the little band merit of T type parallel circuit; The drain electrode of described pHEMT field effect transistor FET3, FET4, FET5 and FET6 is T type structural circuit: drain bias voltage connects the vertical end of T type microstrip transmission line by its shunt capacitance ground connection the time by microstrip transmission line and biasing resistor, the horizontal left end of T type microstrip transmission line connects the drain electrode of pHEMT field effect transistor, the horizontal right-hand member output second level amplifying signal of T type microstrip transmission line.
The above only is preferred embodiment of the present utility model; not in order to restriction the utility model; all any modifications of within spirit of the present utility model and principle, being done, be equal to and replace and improvement etc., all should be included within the protection range of the present utility model.
Claims (1)
1. millimeter-wave monolithic integrated power amplifier, comprise the bright lattice coupler of input, the bright lattice coupler of output, be connected in the straight-through output of the bright lattice coupler of input and export bright lattice coupler straight-through input first amplify branch road, be connected in the coupling output of the bright lattice coupler of input and export bright lattice coupler couple input second amplify branch road; The whole amplifier circuit is integrated on the monolithic semiconductor substrate; It is characterized in that,
The described first amplification branch road and second amplifies branch road and is identical two-stage amplification circuit structure; Described first order amplifying circuit carries out first order processing and amplifying to the radiofrequency signal of importing bright lattice coupler input; The radiofrequency signal of input is divided into two paths of signals after by first order coupling capacitance and the little band merit of T type parallel circuit: one tunnel grid that is input to pHEMT field effect transistor FET1 through grid coupling and the biasing circuit of pHEMT field effect transistor FET1, the grid that another road is input to pHEMT field effect transistor FET2 through grid coupling and the biasing circuit of pHEMT field effect transistor FET2; The source ground of pHEMT field effect transistor FET1 and FET2; The drain electrode of pHEMT field effect transistor FET1 and FET2 is exported first order amplifying signal by separately drain electrode coupling and biasing circuit respectively;
In the first order amplifying circuit:
The grid of described pHEMT field effect transistor FET1 and FET2 coupling and biasing circuit are T type structural circuit: gate bias voltage connects the vertical end of T type microstrip transmission line by its shunt capacitance ground connection the time by microstrip transmission line and biasing resistor, the horizontal right-hand member of T type microstrip transmission line connects the grid of pHEMT field effect transistor, and the horizontal left end of T type microstrip transmission line connects the output of the little band merit of T type parallel circuit; The drain electrode of described pHEMT field effect transistor FET1 and FET2 is T type structural circuit: drain bias voltage connects the vertical end of T type microstrip transmission line by its shunt capacitance ground connection the time by microstrip transmission line and biasing resistor, the horizontal left end of T type microstrip transmission line connects the drain electrode of pHEMT field effect transistor, the horizontal right-hand member output first order amplifying signal of T type microstrip transmission line;
Described second level amplifying circuit carries out second level processing and amplifying and the synthetic output of power to first order amplifying signal; Two-way first order amplifying signal is respectively by being divided into four road signals behind two second level coupling capacitances and the little band merit of the T type parallel circuit; First via signal is input to the grid of pHEMT field effect transistor FE3 through the grid of pHEMT field effect transistor FET3 coupling and biasing circuit, the second road signal is input to the grid of pHEMT field effect transistor FET44 through the grid of pHEMT field effect transistor FET4 coupling and biasing circuit, the Third Road signal is input to the grid of pHEMT field effect transistor FET5 through the grid of pHEMT field effect transistor FET5 coupling and biasing circuit, the grid that the four road signal is input to pHEMT field effect transistor FET6 through grid coupling and the biasing circuit of pHEMT field effect transistor FET6; The source ground of pHEMT field effect transistor FET3, FET4, FET5 and FET6; Four tunnel second level amplifying signals are exported in the drain electrode of pHEMT field effect transistor FET3, FET4, FET5 and FET6; The two-way second level amplifying signal of the drain electrode output of pHEMT field effect transistor FET3 and FET4 unites two into one through an one-level power synthesis circuit, and the two-way second level amplifying signal of the drain electrode output of pHEMT field effect transistor FET5 and FET6 unites two into one through another one-level power synthesis circuit; The two paths of signals of the output circuit output of two one-level power synthesis circuits unites two into one through a secondary power combiner circuit after export bright lattice coupler output;
Second level amplifying circuit:
The grid of described pHEMT field effect transistor FET3, FET4, FET5 and FET6 coupling and biasing circuit are T type structural circuit: gate bias voltage connects the vertical end of T type microstrip transmission line by its shunt capacitance ground connection the time by microstrip transmission line and biasing resistor, the horizontal right-hand member of T type microstrip transmission line connects the grid of pHEMT field effect transistor, and the horizontal left end of T type microstrip transmission line connects the output of the little band merit of T type parallel circuit; The drain electrode of described pHEMT field effect transistor FET3, FET4, FET5 and FET6 is T type structural circuit: drain bias voltage connects the vertical end of T type microstrip transmission line by its shunt capacitance ground connection the time by microstrip transmission line and biasing resistor, the horizontal left end of T type microstrip transmission line connects the drain electrode of pHEMT field effect transistor, the horizontal right-hand member output second level amplifying signal of T type microstrip transmission line.
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| CN2010206084332U CN201846313U (en) | 2010-11-16 | 2010-11-16 | Millimeter wave monolithic integrated power amplifier |
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Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103199802A (en) * | 2013-04-03 | 2013-07-10 | 成都雷电微力科技有限公司 | Single-chip low-noise amplifier |
| CN103812458A (en) * | 2014-01-27 | 2014-05-21 | 合肥师范学院 | X-wave band single-chip power amplifier |
| CN104901639A (en) * | 2014-03-06 | 2015-09-09 | 苏州工业园区新国大研究院 | Microwave and millimeter wave monolithic integration power amplifier |
| CN106533372A (en) * | 2016-11-18 | 2017-03-22 | 中国电子科技集团公司第四十研究所 | Piecewise external matching type miniature power amplifier |
| CN108377136A (en) * | 2017-12-27 | 2018-08-07 | 中国科学院微电子研究所 | Millimeter wave power amplifier circuit |
| CN109560780A (en) * | 2019-01-31 | 2019-04-02 | 合肥立芯通信技术有限公司 | A kind of 5G base station power amplifier |
| CN110277965A (en) * | 2018-03-15 | 2019-09-24 | 中科院微电子研究所昆山分所 | A kind of millimeter-wave power amplifiers |
| CN114978068A (en) * | 2022-07-27 | 2022-08-30 | 电子科技大学 | Ultra-wideband dual-mode high-efficiency power amplifier monolithic microwave integrated circuit |
| CN116260406A (en) * | 2023-05-16 | 2023-06-13 | 四川中久防务科技有限公司 | Parallel power amplifying synthesizer |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103199802B (en) * | 2013-04-03 | 2015-06-03 | 成都雷电微力科技有限公司 | Single-chip low-noise amplifier |
| CN103199802A (en) * | 2013-04-03 | 2013-07-10 | 成都雷电微力科技有限公司 | Single-chip low-noise amplifier |
| CN103812458A (en) * | 2014-01-27 | 2014-05-21 | 合肥师范学院 | X-wave band single-chip power amplifier |
| CN104901639A (en) * | 2014-03-06 | 2015-09-09 | 苏州工业园区新国大研究院 | Microwave and millimeter wave monolithic integration power amplifier |
| CN104901639B (en) * | 2014-03-06 | 2019-04-30 | 苏州工业园区新国大研究院 | Microwave and millimeter wave wave band monolithic integrated power amplifier |
| CN106533372A (en) * | 2016-11-18 | 2017-03-22 | 中国电子科技集团公司第四十研究所 | Piecewise external matching type miniature power amplifier |
| CN108377136A (en) * | 2017-12-27 | 2018-08-07 | 中国科学院微电子研究所 | Millimeter wave power amplifier circuit |
| CN110277965B (en) * | 2018-03-15 | 2023-02-28 | 昆山微电子技术研究院 | Millimeter wave power amplifier |
| CN110277965A (en) * | 2018-03-15 | 2019-09-24 | 中科院微电子研究所昆山分所 | A kind of millimeter-wave power amplifiers |
| CN109560780A (en) * | 2019-01-31 | 2019-04-02 | 合肥立芯通信技术有限公司 | A kind of 5G base station power amplifier |
| CN109560780B (en) * | 2019-01-31 | 2023-09-19 | 合肥盛芯世纪信息科技有限公司 | 5G base station power amplifier |
| CN114978068B (en) * | 2022-07-27 | 2022-11-08 | 电子科技大学 | Ultra-wideband dual-mode high-efficiency power amplifier monolithic microwave integrated circuit |
| CN114978068A (en) * | 2022-07-27 | 2022-08-30 | 电子科技大学 | Ultra-wideband dual-mode high-efficiency power amplifier monolithic microwave integrated circuit |
| CN116260406A (en) * | 2023-05-16 | 2023-06-13 | 四川中久防务科技有限公司 | Parallel power amplifying synthesizer |
| CN116260406B (en) * | 2023-05-16 | 2023-08-04 | 四川中久防务科技有限公司 | Parallel power amplifying synthesizer |
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