CN108682392A - 像素电路及其驱动方法、显示面板、制作方法和显示装置 - Google Patents

像素电路及其驱动方法、显示面板、制作方法和显示装置 Download PDF

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CN108682392A
CN108682392A CN201810489559.3A CN201810489559A CN108682392A CN 108682392 A CN108682392 A CN 108682392A CN 201810489559 A CN201810489559 A CN 201810489559A CN 108682392 A CN108682392 A CN 108682392A
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driving transistor
pole
gated
pixel circuit
control
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冯宇
刘利宾
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BOE Technology Group Co Ltd
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BOE Technology Group Co Ltd
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Priority to CN201810489559.3A priority Critical patent/CN108682392A/zh
Publication of CN108682392A publication Critical patent/CN108682392A/zh
Priority to US16/642,447 priority patent/US20200258452A1/en
Priority to PCT/CN2019/078645 priority patent/WO2019223410A1/zh
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Abstract

本发明提供一种像素电路及其驱动方法、显示面板、制作方法和显示装置。像素电路包括发光元件、数据写入单元、存储单元和驱动晶体管，所述驱动晶体管为双栅晶体管；所述数据写入单元在栅线的控制下，控制导通或断开数据线与驱动晶体管的顶栅之间的连接；存储单元用于控制驱动晶体管的顶栅的电位；所述驱动晶体管的底栅与第一电压输入端连接；所述驱动晶体管的第一极与电源电压输入端连接，所述驱动晶体管的第二极与所述发光元件的第一极连接；所述发光元件的第二极与第二电压输入端连接。本发明能补偿透明显示区域与正常显示区域的亮度差异。

Description

像素电路及其驱动方法、显示面板、制作方法和显示装置
技术领域
本发明涉及显示技术领域，尤其涉及一种像素电路及其驱动方法、显示面板、制作方法和显示装置。
背景技术
现有的显示面板上可以为局部透明显示的显示面板，也即该显示面板上可以设置有透明显示区域和正常显示区域(所述正常显示区域也即非透明显示区域)。为了提高透明显示区域的透过率，设于透明显示区域中的像素电路不具备阈值补偿功能，且由于两区域的数据电压范围不同，从而导致透明显示区域的亮度和正常显示区域的亮度之间存在差异(透明显示区域的亮度较小)，需要在IC(Integrated Circuit，集成电路)端进行复杂的数据补偿，对IC功能要求较高。
发明内容
本发明的主要目的在于提供一种像素电路及其驱动方法、显示面板、制作方法和显示装置，解决现有技术中显示面板的透明显示区域和正常显示区域亮度存在差异的问题。
为了达到上述目的，本发明提供了一种像素电路，包括发光元件，所述像素电路还包括数据写入单元、存储单元和驱动晶体管，其中，
所述驱动晶体管为双栅晶体管；所述双栅晶体管包括顶栅、底栅、第一极和第二极；
所述数据写入单元分别与栅线、数据线、所述驱动晶体管的顶栅连接，用于在所述栅线的控制下，控制导通或断开所述数据线与所述驱动晶体管的顶栅之间的连接；
所述存储单元与所述驱动晶体管的顶栅连接，用于控制所述驱动晶体管的顶栅的电位；
所述驱动晶体管的底栅与第一电压输入端连接；所述驱动晶体管的第一极与电源电压输入端连接，所述驱动晶体管的第二极与所述发光元件的第一极连接；所述第一电压输入端用于输入第一电压；
所述发光元件的第二极与第二电压输入端连接。
实施时，所述驱动晶体管为p型晶体管，所述第一电压为正电压；或者，所述驱动晶体管为n型晶体管，所述第一电压为负电压。
实施时，所述数据写入单元包括：数据写入晶体管，栅极与所述栅线连接，第一极与所述数据线连接，第二极与所述驱动晶体管的顶栅连接；
所述存储单元包括存储电容；所述存储电容的第一端与所述驱动晶体管的顶栅连接，所述存储电容的第二端与所述驱动晶体管的第二极连接。
实施时，本发明所述的像素电路还包括发光控制单元；
所述发光控制单元分别与发光控制端、所述驱动晶体管的第二极和所述发光元件的第一极连接，用于在所述发光控制端的控制下，导通或断开所述驱动晶体管的第二极与所述发光元件的第一极之间的连接。
实施时，所述发光控制单元包括：发光控制晶体管，栅极与所述发光控制端连接，第一极与所述驱动晶体管的第二极连接，第二极与所述发光元件的第一极连接。
本发明还提供了一种像素电路的驱动方法，应用于上述的像素电路，所述像素电路的驱动方法包括：在每一显示周期，
在驱动阶段，第一电压输入端输入第一电压至所述驱动晶体管的底栅；数据写入单元在第一栅线的控制下，控制将数据线输出的数据电压写入驱动晶体管的顶栅，存储单元控制所述驱动晶体管的顶栅的电位，从而控制所述驱动晶体管导通，以驱动发光元件发光。
实施时，所述像素电路还包括发光控制单元，所述驱动阶段包括依次设置的数据写入时间段和发光时间段，所述像素电路的驱动方法包括：在所述驱动阶段，
在数据写入时间段，第一电压输入端输入第一电压至所述驱动晶体管的底栅；数据线输出数据电压，数据写入单元在栅线的控制下控制将所述数据电压写入驱动晶体管的顶栅，存储单元控制维持所述驱动晶体管的顶栅的电位；发光控制单元在发光控制线的控制下断开所述驱动晶体管的第二极与发光元件的第一极之间的连接；
在发光时间段，第一电压输入端输入第一电压至所述驱动晶体管的底栅；数据写入单元在栅线的控制下断开数据线与所述驱动晶体管的顶栅之间的连接，发光控制单元在发光控制线的控制下导通所述驱动晶体管的第二极与发光元件的第一极之间的连接；所述存储单元控制所述驱动晶体管的顶栅的电位，从而控制所述驱动晶体管导通以驱动所述发光元件发光。
本发明还提供了一种显示面板，包括透明显示区域，所述显示面板的透明显示区域设置有上述的像素电路。
本发明还提供了一种显示面板的制作方法，用于制作上述的显示面板，所述显示面板的制作方法包括：
在所述显示面板的透明显示区域依次制作所述驱动晶体管的底栅、有源层、顶栅和源极、漏极，所述底栅采用不透明导电材料制成，所述有源层在所述底栅所在平面上的正投影落入所述底栅内。
本发明还提供了一种显示装置，包括上述的显示面板。
与现有技术相比，本发明所述的像素电路及其驱动方法、显示面板、制作方法和显示装置采用双栅晶体管(所述双栅晶体管包括顶栅和底栅)作为驱动晶体管，并控制所述底栅与第一电压输入端连接，以降低驱动晶体管的阈值电压，从而可以提升驱动晶体管导通时的驱动电流，提升发光元件的发光亮度，能够补偿透明显示区域与正常显示区域的亮度差异。
附图说明
图1是本发明实施例所述的像素电路的结构图；
图2是本发明另一实施例所述的像素电路的结构图；
图3是本发明所述的像素电路的一具体实施例的电路图；
图4是本发明所述的像素电路的该具体实施例的工作时序图；
图5是本发明实施例所述的显示面板的区域划分示意图；
图6是设置于正常显示区域52中的具有阈值补偿功能的像素电路的电路图；
图7是本发明实施例所述的显示面板包括的设置于透明显示区域的像素电路中的驱动晶体管的结构示意图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
本发明所有实施例中采用的晶体管均可以为薄膜晶体管或场效应管或其他特性相同的器件。在本发明实施例中，为区分晶体管除栅极之外的两极，将其中一极称为第一极，另一极称为第二极。在实际操作时，所述第一极可以为漏极，所述第二极可以为源极；或者，所述第一极可以为源极，所述第二极可以为漏极。
本发明实施例所述的像素电路，包括发光元件，所述像素电路还包括数据写入单元、存储单元和驱动晶体管，其中，
所述驱动晶体管为双栅晶体管；所述双栅晶体管包括顶栅、底栅、第一极和第二极；
所述数据写入单元分别与栅线、数据线、所述驱动晶体管的顶栅连接，用于在所述栅线的控制下，控制导通或断开所述数据线与所述驱动晶体管的顶栅之间的连接；
所述存储单元与所述驱动晶体管的顶栅连接，用于控制所述驱动晶体管的顶栅的电位；
所述驱动晶体管的底栅与第一电压输入端连接；所述驱动晶体管的第一极与电源电压输入端连接，所述驱动晶体管的第二极与所述发光元件的第一极连接；
所述发光元件的第二极与第二电压输入端连接。
本发明实施例所述的像素电路采用双栅晶体管(所述双栅晶体管包括顶栅和底栅)作为驱动晶体管，并控制所述底栅与第一电压输入端连接，以降低驱动晶体管的阈值电压，从而可以提升驱动晶体管导通时的驱动电流，提升发光元件的发光亮度，能够补偿透明显示区域与正常显示区域的亮度差异。
在局部透明显示装置中，为了提高透明显示区域的透过率，设置于透明显示区域中的像素电路不具有阈值电压补偿能力，导致正常显示区域(也即不透明显示区域)的亮度比透明显示区域的亮度高，因此本发明实施例所述的像素电路应用于透明显示区域，采用双栅晶体管作为驱动晶体管，以补偿透明显示区域与正常显示区域的亮度差异。
在具体实施时，所述第一电压输入端用于输入第一电压，以降低所述驱动晶体管的阈值电压，从而使得驱动晶体管的开启程度加大，进而提升驱动晶体管的驱动电流。
根据一种具体实施方式，所述驱动晶体管为p型晶体管，所述第一电压为正电压，以降低所述驱动晶体管的阈值电压。
根据另一种具体实施方式，所述驱动晶体管为n型晶体管，所述第一电压为负电压，以降低所述驱动晶体管的阈值电压。
如图1所示，本发明实施例所述的像素电路包括发光元件EL，所述像素电路还包括数据写入单元11、存储单元12和驱动晶体管DTFT，其中，
所述驱动晶体管DTFT为双栅晶体管；
所述数据写入单元11分别与栅线Gate、数据线Data、所述驱动晶体管DTFT的顶栅连接，用于在所述栅线Gate的控制下，控制导通或断开所述数据线Data与所述驱动晶体管DTFT的顶栅之间的连接；
所述存储单元12与所述驱动晶体管DTFT的顶栅连接，用于控制所述驱动晶体管DTFT的顶栅的电位；
所述驱动晶体管DTFT的底栅与第一电压输入端连接；所述驱动晶体管DTFT的源极与电源电压输入端连接，所述驱动晶体管的漏极与所述发光元件的第一极连接；所述第一电压输入端用于输入第一电压V1，所述电源电压输入端用于输入电源电压VDD；
所述发光元件EL的第二极与第二电压输入端连接；所述第二电压输入端用于输入第二电压V2。
本发明如图1所示的像素电路的实施例应用于显示面板的透明显示区域。
在具体实施时，所述发光元件EL可以为有机发光二极管，所述发光元件EL的第一极可以为阳极，所述发光元件EL的第二极可以为阴极，所述第二电压V2可以为低电压，但不以此为限。
在图1所示的实施例中，DTFT为p型晶体管，此时所述第一电压V1可以为电压值较高的恒定正电压，以降低所述驱动晶体管的阈值电压。
在实际操作时，DTFT也可以为n型晶体管，此时V1可以为电压值较低的恒定负电压，以降低所述驱动晶体管的阈值电压。
正常显示区域中的像素电路包括的驱动晶体管不包含底栅，在驱动阶段包括的发光时间段，当正常显示区域中的所述驱动晶体管的顶栅与透明显示区域中的像素电路包括的驱动晶体管的顶栅输入相同电压时，通过透明显示区域附加的底栅接入第一电压可以使透明区域的驱动晶体管的导通电流更大。
本发明如图1所示的实施例采用双栅晶体管(该双栅晶体管包括顶栅和底栅)作为驱动晶体管DTFT，所述驱动晶体管DTFT的底栅与第一电压输入端连接，以降低所述驱动晶体管DTFT的阈值电压，提升驱动晶体管DTFT导通时的驱动电流，提升发光元件EL的发光亮度，能够补偿透明显示区域与正常显示区域的亮度差异。
具体的，所述数据写入单元可以包括：数据写入晶体管，栅极与所述栅线连接，第一极与所述数据线连接，第二极与所述驱动晶体管的顶栅连接。
优选的，如图2所示，本发明实施例所述的像素电路还可以包括发光控制单元13；
所述发光控制单元13分别与发光控制端EM、所述驱动晶体管DTFT的漏极和所述发光元件EL的第一极连接，用于在所述发光控制端EM的控制下，导通或断开所述驱动晶体管DTFT的漏极与所述发光元件EL的第一极之间的连接。
本发明如图2所示的像素电路的实施例增设了发光控制单元13，在驱动阶段包括的数据写入时间段所述发光控制单元13在EM的控制下，断开DTFT的漏极与EL的第一极之间的连接；在驱动阶段包括的发光时间段，所述发光控制单元13在所述发光控制端EM的控制下，导通DTFT的漏极与EL的第一极之间的连接，以使得DTFT能够驱动EL发光；
在具体实施时，所述发光控制单元13可以包括：发光控制晶体管，栅极与所述发光控制端EM连接，第一极与所述驱动晶体管DTFT的第二极连接，第二极与所述发光元件EL的第一极连接。
具体的，所述存储单元包括可以存储电容；
所述存储电容的第一端与所述驱动晶体管的顶栅连接，所述存储电容的第二端与所述驱动晶体管的第二极连接。
下面通过一具体实施例来说明本发明所述的像素电路。
如图3所示，本发明所述的像素电路的一具体实施例包括发光元件、数据写入单元11、存储单元12、发光控制单元13和驱动晶体管DTFT，其中，
所述发光元件为有机发光二极管OLED；
所述驱动晶体管DTFT为双栅晶体管；
所述驱动晶体管DTFT的底栅与高电压输入端连接；所述驱动晶体管DTFT的源极与电源电压输入端连接；所述高电压输入端用于输入高电压VGH，所述电源电压输入端用于输入电源电压VDD；
所述有机发光二极管OLED的阴极与低电压输入端连接；所述低电压输入端用于输入低电压VSS；
所述数据写入单元11包括：数据写入晶体管T1，栅极与栅线Gate连接，源极与数据线Data连接，漏极与所述驱动晶体管DTFT的顶栅连接；
所述存储单元12包括；存储电容C1；所述存储电容C1的第一端与所述驱动晶体管DTFT的顶栅连接，所述存储电容C1的第二端与所述驱动晶体管DTFT的漏极连接；
所述发光控制单元13包括发光控制晶体管T2；
T2的栅极与发光控制端EM连接，T2的源极所述驱动晶体管DTFT的漏极连接，T2的漏极与所述有机发光二极管OLED的阳极连接。
在图3所示的具体实施例中，T1和T2都为p型晶体管，但不以此为限。
在图3所示的像素电路的具体实施例中，DTFT为p型晶体管，但不以此为限。
在图3所示的像素电路的具体实施例中，DTFT的底栅接入高电压VGH，以降低DTFT的阈值电压。
本发明如图3所示的像素电路的具体实施例在工作时，如图4所示，驱动周期包括依次设置的数据写入时间段S1和发光时间段S2；
在所述数据写入时间段S1，EM输出高电平，Gate输出低电平，DTFT的底栅接入VGH，Data输出数据电压Vdata，T1开启，以将Vdata写入DTFT的顶栅，C1控制维持DTFT的顶栅的电位，T2关断，以断开DTFT的漏极与OLED的阳极之间的连接；
在所述发光阶段S2，EM输出低电平，Gate输出高电平，DTFT的底栅接入VGH，T1关断，C1控制维持DTFT的顶栅的电位，以控制DTFT导通，T2开启，以导通DTFT的漏极与OLED的阳极之间的连接，DTFT驱动OLED发光；在图3所示的像素电路的具体实施例中，DTFT是双栅晶体管，DTFT的底栅接入高电压VGH，以降低DTFT的阈值电压，使得DTFT的开启程度更大，提升DTFT在发光阶段的驱动电流，从而能够提升OLED的发光亮度。
本发明实施例所述的像素电路的驱动方法，应用于上述的像素电路，所述像素电路的驱动方法包括：在每一显示周期，
在驱动阶段，第一电压输入端输入第一电压至所述驱动晶体管的底栅；数据写入单元在第一栅线的控制下，控制将数据线输出的数据电压写入驱动晶体管的顶栅，存储单元控制所述驱动晶体管的顶栅的电位，从而控制所述驱动晶体管导通，以驱动发光元件发光。
本发明实施例所述的像素电路的驱动方法采用双栅晶体管(所述双栅晶体管包括顶栅和底栅)作为驱动晶体管，并控制所述底栅与第一电压输入端连接，以降低驱动晶体管的阈值电压，从而可以提升驱动晶体管导通时的驱动电流，提升发光元件的发光亮度，能够补偿透明显示区域与正常显示区域的亮度差异。
具体的，所述像素电路还包括发光控制单元，所述驱动阶段包括依次设置的数据写入时间段和发光时间段，所述像素电路的驱动方法包括：在所述驱动阶段，
在数据写入时间段，第一电压输入端输入第一电压至所述驱动晶体管的底栅；数据线输出数据电压，数据写入单元在栅线的控制下控制将所述数据电压写入驱动晶体管的顶栅，存储单元控制维持所述驱动晶体管的顶栅的电位；发光控制单元在发光控制线的控制下断开所述驱动晶体管的第二极与发光元件的第一极之间的连接；
在发光时间段，第一电压输入端输入第一电压至所述驱动晶体管的底栅；数据写入单元在栅线的控制下断开数据线与所述驱动晶体管的顶栅之间的连接，发光控制单元在发光控制线的控制下导通所述驱动晶体管的第二极与发光元件的第一极之间的连接；所述存储单元控制所述驱动晶体管的顶栅的电位，从而控制所述驱动晶体管导通以驱动所述发光元件发光。
本发明实施例所述的显示面板，包括透明显示区域，所述显示面板的透明显示区域设置有上述的像素电路。
在具体实施时，如图5所示，本发明实施例所述的显示面板50可以包括透明显示区域51和正常显示区域52，其中，所述正常显示区域即为非透明显示区域；
本发明实施例所述的像素电路设置于所述透明显示区域51中，所述正常显示区域52中设置有现有的具有阈值补偿功能的像素电路。
例如，如图6所示，设置于正常显示区域52中的具有阈值补偿功能的像素电路可以包括第一晶体管P1、第二晶体管P2、第三晶体管P3(在图6中，P3为驱动晶体管)、第四晶体管P4、第五晶体管P5、第六晶体管P6、第七晶体管P7、存储电容C1和有机发光二极管OLED，EM为发光控制端，Vref为参考电压，VDD为电源电压，VSS为低电压，Vinit为初始电压，Vdata为数据电压，Re为重置控制端。
比较图6和图3可知，设置于正常显示区域52中的图6所示的像素电路采用的晶体管的个数多，具有阈值补偿功能。图6所示的像素电路在工作时，在发光阶段流过OLED的电流Ioled＝K(Vdata-VDD-Vth)2；其中，K为P3的电流系数，Vth为P3的阈值电压。而本发明实施例所述的显示面板为了保证透明显示区域51中的透过率，不能在设于透明显示区域51中的像素电路设置用于阈值电压补偿的晶体管，则本发明实施例通过将设置于透明显示区域51中的像素电路包括的驱动晶体管设置为双栅晶体管，并控制所述驱动晶体管的底栅接入第一电压以降低所述驱动晶体管阈值电压，而提升发光元件的发光亮度，从而补偿透明显示区域51和正常显示区域52的亮度差异。
本发明实施例所述的显示面板的制作方法，用于制作上述的显示面板，所述显示面板的制作方法包括：
在所述显示面板的透明显示区域依次制作所述驱动晶体管的底栅、有源层、顶栅和源极、漏极，所述底栅采用不透明导电材料制成，所述有源层在所述底栅所在平面上的正投影落入所述底栅内。
图7示出的设置于透明显示区域的像素电路包括的驱动晶体管。
如图7所示，标号为70的为显示基板，标号为LS的为光遮挡层、标号为Poly的为有源层，标号为Gate的为栅金属层，标号为SD的为源漏金属层，标号为71的为绝缘层；其中，光遮挡层LS作为底栅，栅金属层Gate作为顶栅，所述光遮挡层LS由不透明导电材料制成，光遮挡层LS可以保护透明显示区域的晶体管的沟道免受下方器件的影响。
在实际操作时，光遮挡层LS受独立电压控制，
本发明实施例所述的显示装置包括上述的显示面板。
本发明实施例所提供的显示装置可以为手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
以上所述是本发明的优选实施方式，应当指出，对于本技术领域的普通技术人员来说，在不脱离本发明所述原理的前提下，还可以作出若干改进和润饰，这些改进和润饰也应视为本发明的保护范围。

Claims (10)

1.一种像素电路，包括发光元件，其特征在于，所述像素电路还包括数据写入单元、存储单元和驱动晶体管，其中，
所述驱动晶体管为双栅晶体管；所述双栅晶体管包括顶栅、底栅、第一极和第二极；
所述数据写入单元分别与栅线、数据线、所述驱动晶体管的顶栅连接，用于在所述栅线的控制下，控制导通或断开所述数据线与所述驱动晶体管的顶栅之间的连接；
所述存储单元与所述驱动晶体管的顶栅连接，用于控制所述驱动晶体管的顶栅的电位；
所述驱动晶体管的底栅与第一电压输入端连接；所述驱动晶体管的第一极与电源电压输入端连接，所述驱动晶体管的第二极与所述发光元件的第一极连接；所述第一电压输入端用于输入第一电压；
所述发光元件的第二极与第二电压输入端连接。
2.如权利要求1所述的像素电路，其特征在于，所述驱动晶体管为p型晶体管，所述第一电压为正电压；或者，所述驱动晶体管为n型晶体管，所述第一电压为负电压。
3.如权利要求1所述的像素电路，其特征在于，所述数据写入单元包括：数据写入晶体管，栅极与所述栅线连接，第一极与所述数据线连接，第二极与所述驱动晶体管的顶栅连接；
所述存储单元包括存储电容；所述存储电容的第一端与所述驱动晶体管的顶栅连接，所述存储电容的第二端与所述驱动晶体管的第二极连接。
4.如权利要求1至3中任一权利要求所述的像素电路，其特征在于，还包括发光控制单元；
所述发光控制单元分别与发光控制端、所述驱动晶体管的第二极和所述发光元件的第一极连接，用于在所述发光控制端的控制下，导通或断开所述驱动晶体管的第二极与所述发光元件的第一极之间的连接。
5.如权利要求4所述的像素电路，其特征在于，所述发光控制单元包括：发光控制晶体管，栅极与所述发光控制端连接，第一极与所述驱动晶体管的第二极连接，第二极与所述发光元件的第一极连接。
6.一种像素电路的驱动方法，应用于如权利要求1至5中任一权利要求所述的像素电路，其特征在于，所述像素电路的驱动方法包括：在每一显示周期，
在驱动阶段，第一电压输入端输入第一电压至所述驱动晶体管的底栅；数据写入单元在第一栅线的控制下，控制将数据线输出的数据电压写入驱动晶体管的顶栅，存储单元控制所述驱动晶体管的顶栅的电位，从而控制所述驱动晶体管导通，以驱动发光元件发光。
7.如权利要求6所述的像素电路的驱动方法，其特征在于，所述像素电路还包括发光控制单元，所述驱动阶段包括依次设置的数据写入时间段和发光时间段，所述像素电路的驱动方法包括：在所述驱动阶段，
在数据写入时间段，第一电压输入端输入第一电压至所述驱动晶体管的底栅；数据线输出数据电压，数据写入单元在栅线的控制下控制将所述数据电压写入驱动晶体管的顶栅，存储单元控制维持所述驱动晶体管的顶栅的电位；发光控制单元在发光控制线的控制下断开所述驱动晶体管的第二极与发光元件的第一极之间的连接；
在发光时间段，第一电压输入端输入第一电压至所述驱动晶体管的底栅；数据写入单元在栅线的控制下断开数据线与所述驱动晶体管的顶栅之间的连接，发光控制单元在发光控制线的控制下导通所述驱动晶体管的第二极与发光元件的第一极之间的连接；所述存储单元控制所述驱动晶体管的顶栅的电位，从而控制所述驱动晶体管导通以驱动所述发光元件发光。
8.一种显示面板，包括透明显示区域，其特征在于，所述显示面板的透明显示区域设置有如权利要求1至5中任一权利要求所述的像素电路。
9.一种显示面板的制作方法，用于制作如权利要求8所述的显示面板，其特征在于，所述显示面板的制作方法包括：
在所述显示面板的透明显示区域依次制作所述驱动晶体管的底栅、有源层、顶栅和源极、漏极，所述底栅采用不透明导电材料制成，所述有源层在所述底栅所在平面上的正投影落入所述底栅内。
10.一种显示装置，其特征在于，包括如权利要求8所述的显示面板。
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