CN107393477B - 顶发射amoled像素电路及其驱动方法 - Google Patents

顶发射amoled像素电路及其驱动方法 Download PDF

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CN107393477B
CN107393477B CN201710736699.1A CN201710736699A CN107393477B CN 107393477 B CN107393477 B CN 107393477B CN 201710736699 A CN201710736699 A CN 201710736699A CN 107393477 B CN107393477 B CN 107393477B
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node
pixel circuit
film transistor
voltage
scan
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CN107393477A (zh
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韩佰祥
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Priority to US15/579,948 priority patent/US10891898B2/en
Priority to PCT/CN2017/111007 priority patent/WO2019037285A1/zh
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Abstract

本发明涉及一种顶发射AMOLED像素电路及其驱动方法。该顶发射AMOLED像素电路包括：第一薄膜晶体管(T1)，连接第一节点(G)，第二节点(S)和第三节点(D)；第二薄膜晶体管(T2)，连接扫描信号(Scan)，第一节点(G)和数据信号(Data1)；第三薄膜晶体管(T3)，连接扫描信号(Scan)，第二节点(S)和参考电压(Ref)；第四薄膜晶体管(T4)，连接扫描信号(Scan)，第三节点(D)和电源高电压(Data2)；第一电容(Cst)连接第一节点(G)和第二节点(S)；第二电容(C)连接第三节点(D)和参考电压(Ref)；OLED连接第二节点(S)和电源低电压(VSS)；该电源高电压(Data2)与电源低电压(VSS)之间的差值保持不变。本发明还提供了相应的驱动方法。本发明可以有效缓解透明阴极阻抗增大引起的IR压降。

Description

顶发射AMOLED像素电路及其驱动方法
技术领域
本发明涉及显示技术领域，尤其涉及一种顶发射AMOLED像素电路及其驱动方法。
背景技术
作为新一代显示技术，有机发光二极管(OLED)显示面板具有低功耗、高色域、高亮度、高分辨率、宽视角、高响应速度等优点，因此备受市场的青睐。
OLED显示装置按照驱动方式可以分为无源矩阵型OLED(Passive MatrixOLED，PMOLED)和有源矩阵型OLED(Active Matrix OLED，AMOLED)两大类。其中，AMOLED具有呈阵列式排布的像素，属于主动显示类型，发光效能高，通常用作高清晰度的大尺寸显示装置。OLED按照光出射方向的不同，可以分为两种结构：一种是底发射型，另一种是顶发射型。顶发射型OLED所发出的光是从器件的顶部出射，能有效的提高开口率。
大尺寸高解析度AMOLED面板的开发是未来的发展方向，随着解析度的增加，会极大的压缩底发射AMOLED的开口区，故急需开发顶发射架构，而目前大尺寸顶发射AMOLED面板的透明阴极阻抗非常大，引起严重的IR压降(Drop)问题。
参见图1，其为传统AMOLED的3T1C像素电路示意图，主要包括3个薄膜晶体管T1～T3，一个电容Cst，该像素电路驱动过程主要由信号Scan的时序控制，薄膜晶体管T1为驱动TFT，用于驱动OLED，控制通过OLED的电流。
该传统AMOLED的3T1C像素电路工作过程如下：当Scan给高电位时，T2，T3打开，节点G写入数据信号Data，节点S写入参考电压Ref(＜OLED开启电压)，Vgs＝Data－Ref，此时OLED不发光；当Scan给低电位时，T2，T3关闭，节点S被电源高电压VDD充电至VAnode，节点G被耦合(Couple)至Data+VAnode－Ref，此时Vgs＝Data－Ref，OLED开始发光。T1作为驱动TFT，需工作在饱和区，即需要满足Vgs－Vth＜VDD－VAnode，其中Vth为T1的阈值电压。对于大尺寸顶发射AMOLED面板，如电源低电压VSS受限于透明阴极高阻抗影响，出现较大的IR压降，则VSS上升导致VAnode上升，T1工作在线性区，现有像素电路失效。
发明内容
因此，本发明的目的在于提供一种顶发射AMOLED像素电路，解决电源低电压VSS电压抬升引起的电路失效问题。
本发明的另一目的在于提供一种顶发射AMOLED像素电路的驱动方法，解决电源低电压VSS电压抬升引起的电路失效问题。
为实现上述目的，本发明提供了一种顶发射AMOLED像素电路，包括：
第一薄膜晶体管，其栅极连接第一节点，源极和漏极分别连接第二节点和第三节点；
第二薄膜晶体管，其栅极连接扫描信号，源极和漏极分别连接第一节点和数据信号；
第三薄膜晶体管，其栅极连接扫描信号，源极和漏极分别连接第二节点和参考电压；
第四薄膜晶体管，其栅极连接扫描信号，源极和漏极分别连接第三节点和电源高电压；
第一电容，其两端分别连接第一节点和第二节点；
第二电容，其两端分别连接第三节点和参考电压；
OLED，其阳极连接第二节点，阴极连接电源低电压；
其中，该电源高电压根据电源低电压确定，该电源高电压与电源低电压之间的差值保持不变，该参考电压小于OLED的开启电压。
其中，该扫描信号的时序配置为包括补偿阶段，以及发光阶段。
其中，在补偿阶段，该扫描信号为高电位。
其中，在发光阶段，该扫描信号为低电位。
其中，该参考电压保持不变。
其中，所述第一薄膜晶体管，第二薄膜晶体管，第三薄膜晶体管，以及第四薄膜晶体管为低温多晶硅薄膜晶体管或氧化物半导体薄膜晶体管。
本发明还提供了一种上述顶发射AMOLED像素电路的驱动方法，包括：该扫描信号的时序配置为包括补偿阶段，以及发光阶段。
其中，在补偿阶段，该扫描信号为高电位。
其中，在发光阶段，该扫描信号为低电位。
其中，该参考电压保持不变。
综上，本发明的顶发射AMOLED像素电路及其驱动方法可以有效缓解透明阴极阻抗增大引起的IR压降，有效的解决了VSS电压抬升引起的电路失效，且保持了VDD和VSS的压差，未增加额外的功耗，适用于大尺寸顶发射AMOLED面板。
附图说明
下面结合附图，通过对本发明的具体实施方式详细描述，将使本发明的技术方案及其他有益效果显而易见。
附图中，
图1为传统AMOLED的3T1C像素电路示意图；
图2为本发明顶发射AMOLED像素电路一较佳实施例的电路示意图；
图3为本发明顶发射AMOLED像素电路一较佳实施例的信号时序示意图；
图4为传统顶发射3T1C像素电路VSS电压分布(假设)示意图。
具体实施方式
参见图2及图3，图2为本发明顶发射AMOLED像素电路一较佳实施例的电路示意图，图3为该较佳实施例的信号时序示意图，该较佳实施例为4T2C像素电路，主要包括薄膜晶体管T1～T4，电容Cst和C，其中T1为驱动TFT：T1栅极连接节点G，源极和漏极分别连接节点S和D；T2栅极连接扫描信号Scan，源极和漏极分别连接节点G和数据信号Data1；T3栅极连接扫描信号Scan，源极和漏极分别连接节点S和参考电压Ref；T4栅极连接扫描信号Scan，源极和漏极分别连接节点D和电源高电压(Data2；电容Cst两端分别连接节点G和S；电容C两端分别连接节点D和参考电压Ref；OLED阳极连接节点S，阴极连接电源低电压(VSS)；在此较佳实施例中，电源高电压Data2根据电源低电压VSS确定，电源高电压Data2与电源低电压VSS之间的差值保持不变，参考电压Ref小于OLED的开启电压并且保持不变。
工作时，扫描信号Scan的时序配置为包括补偿阶段或者称为编程(Programing)阶段，以及发光(Emitting)阶段，在补偿阶段，该扫描信号Scan为高电位，在发光阶段，该扫描信号Scan为低电位。
Scan给高电位，T2，T3，T4打开，节点D写入电源高电压Data2，具体命名为VDD(为VSS的函数)，也就是VDD与VSS的关系可以表示为VDD＝f(VSS)，存储在电容C中；节点G写入数据信号Data1，节点S写入参考电压Ref(＜OLED开启电压)，Vgs＝Data1－Ref，此时OLED不发光。
Scan给低电位，T2，T3，T4关闭，由于电容C上存储VDD电压，可以作为电压源，通过在设计时预先将电容C的电容值合理取值，可以保证在一帧的时间内由电容C为OLED供电，故节点S被电容C上存储的VDD电压充电至VAnode，VAnode为OLED阳极电位，节点G被耦合(Couple)至Data1+VAnode－Ref，此时Vgs＝Data1－Ref，OLED开始发光。
由于本电路适用于大尺寸顶发射架构AMOLED面板，透明阴极阻抗非常高，VSS存在严重的IR压降，且越靠近面板中心越严重，所以将VDD设置为VSS的函数，根据VSS确定VDD的值，故驱动TFT T1可以满足Vgs－Vth＜VDD(＝f(VSS))－VAnode，此时T1工作在饱和区，面板可以正常驱动，VDD与VSS之间的函数关系f可以如图4所揭示，预先进行确定。
参见图4，其为传统顶发射3T1C像素电路VSS电压分布(假设)示意图。假设VDD初始电压20V，VSS初始电压0V，如透明阴极引起的VSS IR压降电压分布如图4中括号外字体所示，越靠近面板中心越大，则相应的VDD电压取值可以如括号内字体所示，使得各区域的VDD－VSS电压一致，从而未增加驱动功耗，且很好的解决了透明阴极阻抗高带来的IR压降。
本发明还相应提供了上述像素驱动电路的驱动方法，核心为引入独立控制的VDD电压，该电压和VSS的电压分布为对应关系；引入独立控制的VDD电压有效的解决了VSS电压抬升引起的电路失效，且通过保持VDD和VSS的压差，未增加额外的功耗；本发明的顶发射AMOLED像素电路及其驱动方法包含但不局限于低温多晶硅制程，氧化物半导体制程，任何可能的制程涉及的类似像素涉及方法均属于本发明保护范畴；本发明提出的4T2C像素电路TFT尺寸，电容值以及时序图允许一定的可变灵活度，任何在此基础上的变化均属于本发明的保护范畴。
综上，本发明的顶发射AMOLED像素电路及其驱动方法可以有效缓解透明阴极阻抗增大引起的IR压降，有效的解决了VSS电压抬升引起的电路失效，且保持了VDD和VSS的压差，未增加额外的功耗，适用于大尺寸顶发射AMOLED面板。
以上所述，对于本领域的普通技术人员来说，可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形，而所有这些改变和变形都应属于本发明后附的权利要求的保护范围。

Claims (10)

1.一种顶发射AMOLED像素电路，其特征在于，包括：
第一薄膜晶体管(T1)，其栅极连接第一节点(G)，源极和漏极分别连接第二节点(S)和第三节点(D)；
第二薄膜晶体管(T2)，其栅极连接扫描信号(Scan)，源极和漏极分别连接第一节点(G)和数据信号(Data1)；
第三薄膜晶体管(T3)，其栅极连接扫描信号(Scan)，源极和漏极分别连接第二节点(S)和参考电压(Ref)；
第四薄膜晶体管(T4)，其栅极连接扫描信号(Scan)，源极和漏极分别连接第三节点(D)和电源高电压(Data2)；
第一电容(Cst)，其两端分别连接第一节点(G)和第二节点(S)；
第二电容(C)，其两端分别连接第三节点(D)和参考电压(Ref)；
OLED，其阳极连接第二节点(S)，阴极连接电源低电压(VSS)；
其中，该电源高电压(Data2)根据电源低电压(VSS)确定，该电源高电压(Data2)与电源低电压(VSS)之间的差值保持不变，该参考电压(Ref)小于OLED的开启电压。
2.如权利要求1所述的顶发射AMOLED像素电路，其特征在于，该扫描信号(Scan)的时序配置为包括补偿阶段，以及发光阶段。
3.如权利要求2所述的顶发射AMOLED像素电路，其特征在于，在补偿阶段，该扫描信号(Scan)为高电位。
4.如权利要求2所述的顶发射AMOLED像素电路，其特征在于，在发光阶段，该扫描信号(Scan)为低电位。
5.如权利要求1所述的顶发射AMOLED像素电路，其特征在于，该参考电压(Ref)保持不变。
6.如权利要求1所述的顶发射AMOLED像素电路，其特征在于，所述第一薄膜晶体管(T1)，第二薄膜晶体管(T2)，第三薄膜晶体管(T3)，以及第四薄膜晶体管(T4)为低温多晶硅薄膜晶体管或氧化物半导体薄膜晶体管。
7.一种如权利要求1所述的顶发射AMOLED像素电路的驱动方法，其特征在于，包括：该扫描信号(Scan)的时序配置为包括补偿阶段，以及发光阶段。
8.如权利要求7所述的顶发射AMOLED像素电路的驱动方法，其特征在于，在补偿阶段，该扫描信号(Scan)为高电位。
9.如权利要求7所述的顶发射AMOLED像素电路的驱动方法，其特征在于，在发光阶段，该扫描信号(Scan)为低电位。
10.如权利要求7所述的顶发射AMOLED像素电路的驱动方法，其特征在于，该参考电压(Ref)保持不变。
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