CN105977148A - 绝缘层的制造方法、阵列的制造方法及阵列基板 - Google Patents

绝缘层的制造方法、阵列的制造方法及阵列基板 Download PDF

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CN105977148A
CN105977148A CN201610519435.6A CN201610519435A CN105977148A CN 105977148 A CN105977148 A CN 105977148A CN 201610519435 A CN201610519435 A CN 201610519435A CN 105977148 A CN105977148 A CN 105977148A
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insulating barrier
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范德勇
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Priority to US15/116,497 priority patent/US10147598B2/en
Priority to PCT/CN2016/090652 priority patent/WO2018000484A1/zh
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Abstract

本发明公开了一种绝缘层的制造方法、阵列基板的制造方法及阵列基板，其中绝缘层的制造方法包括步骤：在基板上沉积一绝缘层，对绝缘层进行曝光显影处理，得到具有开口的绝缘层；对具有开口的绝缘层进行光固化处理；对完成光固化处理的具有开口的绝缘层进行高温退火处理。采用本发明的绝缘层制造方法能够减少绝缘层开口发生变形的情况。

Description

绝缘层的制造方法、阵列的制造方法及阵列基板
技术领域
本发明涉及面板制造领域，特别是涉及一种绝缘层的制造方法、阵列基板的制造方法及阵列基板。
背景技术
液晶面板作为主流显示面板已广泛应用到人们日常生活和工作中，液晶面板通常由阵列基板进行电路控制，以实现显示。阵列基板中通常会使用到有机绝缘层，其能够降低金属电极之间的寄生电容，以降低面板的功耗，还可用于使各个膜层更为平坦化，从而改善面板显示的暗态，提高显示的对比度。
有机绝缘层的制造基本算是阵列基板中必不可少的工艺，而现有的制造工艺中，绝缘层上所形成的开口通常会出现的严重的变形，容易导致开口被堵住，绝缘层解析度下降的问题。
发明内容
本发明的目的在于提供一种绝缘层的制造方法、阵列基板的制造方法及阵列基板，以解决现有的制造工艺中绝缘层开口容易出现变形的情况。
为解决上述问题，本发明提出一种绝缘层的制造方法，其特征在于，所述制造方法包括以下步骤：在基板上沉积一绝缘层；对所述绝缘层进行曝光显影处理，得到具有开口的绝缘层；对具有开口的绝缘层进行光固化处理；对完成光固化处理的具有开口的绝缘层进行高温退火处理。
其中，所述对具有开口的绝缘层进行光固化处理的步骤包括：对具有开口的绝缘层进行紫外线固化处理。
其中，所述在基板上沉积一绝缘层的步骤之后包括：将具有绝缘层的基板在真空中放置一段时间。
其中，所述沉积一绝缘层后的步骤包括：对所述绝缘层进行烘烤处理。
其中，所述沉积一绝缘层的步骤包括：使用化学气相沉积得到一绝缘层。
为解决上述问题，本发明还提供一种阵列基板的制造方法，其中，在形成数据线和形成公共电极线的步骤之间包括形成绝缘层的步骤，所述形成绝缘层的步骤包括：沉积一绝缘层；对所述绝缘层进行曝光显影处理，得到具有开口的绝缘层；对具有开口的绝缘层进行光固化处理；对完成光固化处理的具有开口的绝缘层进行高温退火处理。
其中，所述对具有开口的绝缘层进行光固化处理的步骤包括：对具有开口的绝缘层进行紫外线固化处理。
其中，所述沉积一绝缘层的步骤之后包括：将沉积一绝缘层后的阵列基板在真空中放置一段时间。
其中，所述沉积一绝缘层后的步骤包括：对所述绝缘层进行烘烤处理。
为解决上述问题，本发明还提供一种阵列基板，该阵列基板由上述制造方法制得。
本发明绝缘层的制造方法包括步骤：在基板上沉积一绝缘层，对绝缘层进行曝光显影处理，得到具有开口的绝缘层；对具有开口的绝缘层进行光固化处理；对完成光固化处理的具有开口的绝缘层进行高温退火处理。绝缘层在曝光显影得到开口后，对绝缘层进行进一步的光固化处理，使绝缘层发生交联反应，绝缘层的交联程度越高，在高温退火时就越不容易出现流动变形，因此避免了高温退火时出现流动而导致开口堵塞的问题。
附图说明
图1是本发明绝缘层的制造方法一实施方式的流程示意图；
图2是图1所示绝缘层的制造方法一实施方式中绝缘层的结构示意图；
图3是本发明阵列基板的制造方法一实施方式的流程示意图；
图4是图3所示阵列基板的制造方法一实施方式中阵列基板的结构示意图；
图5是本发明阵列基板一实施方式的结构示意图。
具体实施方式
为使本领域的技术人员更好地理解本发明的技术方案，下面结合附图和具体实施方式对发明所提供的一种绝缘层的制造方法、阵列基板的制造方法及阵列基板做进一步详细描述。
参阅图1和图2，图1是本发明绝缘层的制造方法一实施方式的流程示意图，图2是图1所示绝缘层的制造方法一实施方式中绝缘层的结构示意图。
本实施方式绝缘层的制造方法包括以下步骤。
S101：在基板上沉积一绝缘层。
本实施方式绝缘层20的制造是阵列基板制造中的一个工艺，本步骤中基板10不是指阵列基板中单一的某一层，而是指包括玻璃基板、金属层等的广义概念。本步骤中绝缘层20由化学气相沉积形成在基板10上。
化学气相沉积中一般有溶剂的挥发步骤，本实施方式中将沉积了绝缘层20的基板10于真空中放置一段时间，以加快溶剂的挥发。还可进一步的对绝缘层20进行烘烤处理。
S102：对绝缘层进行曝光显影处理，得到具有开口的绝缘层。
利用光罩对绝缘层20进行曝光显影处理，得到具有开口21的绝缘层20。本实施方式中绝缘层20为负型，即采用遮住开口21的光罩实现曝光显影，未被光照到的开口21被刻蚀，而被光照到的其他部分能够发生轻微的交联反应。
S103：对具有开口的绝缘层进行光固化处理。
本步骤S103中采用紫外线对绝缘层20进行光固化处理，即使得具有开口21的绝缘层20进一步的发生交联反应，绝缘层20能够进一步的被固化，而不容易发生变形流动。
S104：对完成光固化处理的具有开口的绝缘层进行高温退火处理。
本步骤S104中的高温退火处理能够使绝缘层20充分交联，并且由于步骤S103中已经对绝缘层20做了一定的固化，因此本步骤S104中的高温对绝缘层20的影响较小，使开口21处的绝缘层材料变形回流变得轻微，从而减少开口21堵塞等问题。
本发明绝缘层的制造方法包括步骤：在基板上沉积一绝缘层，对绝缘层进行曝光显影处理，得到具有开口的绝缘层；对具有开口的绝缘层进行光固化处理；对完成光固化处理的具有开口的绝缘层进行高温退火处理。绝缘层在曝光显影得到开口后，对绝缘层进行进一步的光固化处理，使绝缘层发生交联反应，绝缘层的交联程度越高，在高温退火时就越不容易出现流动变形，因此避免了高温退火时出现流动而导致开口堵塞的问题。
请参阅图3和图4，图3是本发明阵列基板的制造方法一实施方式的流程示意图，图4是图3所示阵列基板的制造方法一实施方式中阵列基板的结构示意图。
本实施方式阵列基板的制造方法包括以下步骤。
S301：在一基板上形成数据线。
S302：在数据线上形成绝缘层。
S303：在绝缘层上形成公共电极线。
本实施方式得到的阵列基板400中绝缘层42形成在数据线41与公共电极线43之间，而数据线41即公共电极线43的形成的先后顺序并不做限定，即本实施方式中步骤S301及S303可以对换，先形成公共电极线43，然后形成绝缘层42，最后形成数据线41，具体采用哪种方式需根据阵列基板的结构确定。
本实施方式中数据线与绝缘层之间还形成有材料为氮化硅(SiNx)的钝化层44。步骤S301形成数据线之前进一步包括步骤：在玻璃基板45上形成栅极层46以及栅极绝缘层47。
其中步骤S302为形成绝缘层42，具体包括步骤：1)沉积一绝缘层，并将沉积一绝缘层后的阵列基板在真空中放置一段时间，且对绝缘层进行烘烤处理；2)对绝缘层进行曝光显影处理，得到具有开口421的绝缘层42；3)对具有开口421的绝缘层42进行紫外线光固化处理；4)对完成光固化处理的具有开口421的绝缘层42进行高温退火处理。本步骤S302与上述实施方式绝缘层的制造方法类似，具体不再赘述。
通过本发明阵列基板的制造方法所得到的阵列基板中绝缘层在曝光显影得到开口后，进行高温退火之前对其实施光固化处理，使其在高温退火时受到高温作用发生变形的程度变小。阵列基板中开口的质量较高，相应的阵列基板的质量也较高。
请参阅图5，图5是本发明阵列基板一实施方式的结构示意图。
本实施方式阵列基板500由上述实施方式阵列基板的制造方法制得。
具体来说，本实施方式阵列基板500包括玻璃基板51，在玻璃基板51上依次形成的栅极层52、栅极绝缘层53、数据线54、钝化层55、绝缘层56以及公共电极57。其中绝缘层56在曝光显影得到开口561后，进一步进行光固化处理，然后进行高温退火。
在其他实施方式中，栅极层52、数据线54以及公共电极57的位置关系可以根据阵列基板500的类型确定，例如在某些阵列基板中，栅极层52与公共电极57同层设置，因此本发明中对于栅极层52、数据线54以及公共电极57的位置关系不做限制。
以上所述仅为本发明的实施方式，并非因此限制本发明的专利范围，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其他相关的技术领域，均同理包括在本发明的专利保护范围内。

Claims (10)

1.一种绝缘层的制造方法，其特征在于，所述制造方法包括以下步骤：
在基板上沉积一绝缘层；
对所述绝缘层进行曝光显影处理，得到具有开口的绝缘层；
对具有开口的绝缘层进行光固化处理；
对完成光固化处理的具有开口的绝缘层进行高温退火处理。
2.根据权利要求1所述的制造方法，其特征在于，所述对具有开口的绝缘层进行光固化处理的步骤包括：
对具有开口的绝缘层进行紫外线固化处理。
3.根据权利要求1所述的制造方法，其特征在于，所述在基板上沉积一绝缘层的步骤之后包括：
将具有绝缘层的基板在真空中放置一段时间。
4.根据权利要求1所述的制造方法，其特征在于，所述沉积一绝缘层后的步骤包括：
对所述绝缘层进行烘烤处理。
5.根据权利要求1所述的制造方法，其特征在于，所述沉积一绝缘层的步骤包括：
使用化学气相沉积得到一绝缘层。
6.一种阵列基板的制造方法，其特征在于，在形成数据线和形成公共电极线的步骤之间包括形成绝缘层的步骤，
所述形成绝缘层的步骤包括：
沉积一绝缘层；
对所述绝缘层进行曝光显影处理，得到具有开口的绝缘层；
对具有开口的绝缘层进行光固化处理；
对完成光固化处理的具有开口的绝缘层进行高温退火处理。
7.根据权利要求6所述的制造方法，其特征在于，所述对具有开口的绝缘层进行光固化处理的步骤包括：
对具有开口的绝缘层进行紫外线固化处理。
8.根据权利要求6所述的制造方法，其特征在于，所述沉积一绝缘层的步骤之后包括：
将沉积一绝缘层后的阵列基板在真空中放置一段时间。
9.根据权利要求6所述的制造方法，其特征在于，所述沉积一绝缘层后的步骤包括：
对所述绝缘层进行烘烤处理。
10.一种阵列基板，其特征在于，所述阵列基板由权利要求6-9中任一项制造方法制得。
CN201610519435.6A 2016-07-01 2016-07-01 绝缘层的制造方法、阵列的制造方法及阵列基板 Pending CN105977148A (zh)

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Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61153287A (ja) * 1984-12-26 1986-07-11 Hitachi Ltd フオトレジスト微細パタ−ンの変形防止方法
JPH0629411A (ja) * 1992-07-08 1994-02-04 Fujitsu Ltd 半導体装置の製造装置及び半導体装置の製造方法
CN1393032A (zh) * 2000-06-12 2003-01-22 精工爱普生株式会社 薄膜半导体装置的制造方法
US20070042574A1 (en) * 2005-08-19 2007-02-22 Elpida Memory, Inc. Method for manufacturing a semiconductor device
US20070159335A1 (en) * 2004-02-06 2007-07-12 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
US20080076266A1 (en) * 2006-09-21 2008-03-27 Asm Japan K.K. Method for forming insulation film having high density
US20120264305A1 (en) * 2011-04-13 2012-10-18 Asm Japan K.K. Footing Reduction Using Etch-Selective Layer
CN102819133A (zh) * 2011-06-09 2012-12-12 上海天马微电子有限公司 半透半反式液晶显示器阵列基板、制造方法及液晶显示屏
US20130026133A1 (en) * 2011-07-27 2013-01-31 International Business Machines Corporation Method to Transfer Lithographic Patterns Into Inorganic Substrates
US20150017869A1 (en) * 2010-08-10 2015-01-15 Samsung Display Co., Ltd. Display substrate, display device including the same, and method of manufacturing the display substrate
US20150053971A1 (en) * 2013-08-23 2015-02-26 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6531730B2 (en) * 1993-08-10 2003-03-11 Micron Technology, Inc. Capacitor compatible with high dielectric constant materials having a low contact resistance layer and the method for forming same
CN104570440B (zh) 2011-06-09 2017-06-16 上海天马微电子有限公司 半透半反式液晶显示器阵列基板的制造方法
US8629040B2 (en) 2011-11-16 2014-01-14 Taiwan Semiconductor Manufacturing Company, Ltd. Methods for epitaxially growing active regions between STI regions
KR102023937B1 (ko) * 2012-12-21 2019-09-23 엘지디스플레이 주식회사 박막트랜지스터 어레이 기판 및 그의 제조방법
CN105552131B (zh) 2016-01-27 2018-12-14 东南大学 基于量子点掺杂栅绝缘层的光调制薄膜晶体管
CN106129062B (zh) 2016-07-01 2018-10-19 深圳市华星光电技术有限公司 绝缘层的制造方法、阵列基板的制造方法及阵列基板

Patent Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61153287A (ja) * 1984-12-26 1986-07-11 Hitachi Ltd フオトレジスト微細パタ−ンの変形防止方法
JPH0629411A (ja) * 1992-07-08 1994-02-04 Fujitsu Ltd 半導体装置の製造装置及び半導体装置の製造方法
CN1393032A (zh) * 2000-06-12 2003-01-22 精工爱普生株式会社 薄膜半导体装置的制造方法
US20070159335A1 (en) * 2004-02-06 2007-07-12 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
US20070042574A1 (en) * 2005-08-19 2007-02-22 Elpida Memory, Inc. Method for manufacturing a semiconductor device
US20080076266A1 (en) * 2006-09-21 2008-03-27 Asm Japan K.K. Method for forming insulation film having high density
US20150017869A1 (en) * 2010-08-10 2015-01-15 Samsung Display Co., Ltd. Display substrate, display device including the same, and method of manufacturing the display substrate
US20120264305A1 (en) * 2011-04-13 2012-10-18 Asm Japan K.K. Footing Reduction Using Etch-Selective Layer
CN102819133A (zh) * 2011-06-09 2012-12-12 上海天马微电子有限公司 半透半反式液晶显示器阵列基板、制造方法及液晶显示屏
US20130026133A1 (en) * 2011-07-27 2013-01-31 International Business Machines Corporation Method to Transfer Lithographic Patterns Into Inorganic Substrates
US20150053971A1 (en) * 2013-08-23 2015-02-26 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device

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