CN102364999A - Manufacturing method of mechanical conduction hole circuit board without holes on surface - Google Patents
Manufacturing method of mechanical conduction hole circuit board without holes on surface Download PDFInfo
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- CN102364999A CN102364999A CN2011101825440A CN201110182544A CN102364999A CN 102364999 A CN102364999 A CN 102364999A CN 2011101825440 A CN2011101825440 A CN 2011101825440A CN 201110182544 A CN201110182544 A CN 201110182544A CN 102364999 A CN102364999 A CN 102364999A
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Abstract
The invention discloses a manufacturing method of a mechanical conduction hole circuit board without holes on a surface. The method comprises the following steps: A. cutting board; B. sticking a photosensitive dry film; C. transferring an inner layer circuit image; D. etching the inner layer circuit image; E. performing an AOI detection to the inner layer circuit; F. browning and stitching; G. drilling a conduction hole; H. coating copper on the conduction hole; I. filling the conduction hole; J. drilling a component hole and a location hole; K. depositing the copper; L. electroplating the whole board; M. sticking the photosensitive dry film on a plate surface of a substrate; N. transferring an inner layer circuit image outer layer circuit image; O. electroplating the outer layer circuit image; P. etching the outer layer circuit image; Q. performing the AOI detection to the outer layer circuit; R. performing green oil and character silkscreen; S. moulding; T. performing middle inspertion; U. performing surface treatment; V. performing final inspection. A purpose of the invention is to provide the manufacturing method of the mechanical conduction hole circuit board without the holes on the surface. The method has the following characteristics that: a making technology is simple and costs are low. By using the method, a touch screen on the circuit board can be effectively protected.
Description
[technical field]
The present invention relates to the circuit board making technical field, the circuit board manufacturing method of the mechanical via of the no hole shape in particularly a kind of surface.
[background technology]
When circuit needed conducting between board layer, meeting was bored a through hole in the position that need conducting usually, and then copper electroplating layer in the through hole, interlayer was needed the circuit communication of conducting.Under some surface smoothnesss to circuit board have certain requirements situation; The circuit board of touch-screen below for example; Touch-screen because the via on the existing circuit board can make the touch-screen unbalance stress and it is caused damage, will cause touch-screen malfunctioning even scrap when touch-control for a long time.
The via of the circuit board that has now on generally all can the stick holding circuit plate, and the complex manufacturing technology of its circuit board need repeatedly bore via, repeatedly pressing to circuit board, and its boring adopts laser drill usually, and cost of manufacture is high.
[summary of the invention]
The objective of the invention is to overcome the deficiency of prior art, provide a kind of manufacture craft is simple, cost is low surface not have the circuit board manufacturing method of the mechanical via of hole shape.
In order to address the above problem, the present invention adopts following technical scheme:
The circuit board manufacturing method of the mechanical via of the no hole shape in a kind of surface is characterized in that comprising the steps:
A, open material, size cuts the wiring board plate on request;
B, subsides photosensitive dry film paste photosensitive dry film in panel surface;
C, internal layer circuit figure transfer are through making public the internal layer circuit graph exposure on the film to the photosensitive dry film that is attached to panel surface to photographic film;
D, the etching of internal layer circuit figure etch the internal layer circuit layer on plate;
E, internal layer circuit AOI detect, and detect the defective of internal layer circuit;
F, brown and pressing, behind plate internal layer surface coarsening, that a plurality of plates are range upon range of and be pressed into substrate;
G, brill via adopt machine drilling to get out via on substrate;
H, via attach copper, enclose conductive copper layer at the via inwall each layer circuit layer on the plate is communicated with through attaching process for copper;
I, filling via in via, fill up resin, and the resin that will expose outside the via polish;
J, brill component hole and location hole get out component hole and location hole on substrate;
K, heavy copper, copper layer on resin, in component hole and the location hole;
L, electric plating of whole board are electroplated thickening with the full plate of circuit board and have been electroplated in the via hole of copper layer, in the component hole hole, in the location hole hole and the copper of copper layer and substrate surface on the resin;
M, substrate surface paste photosensitive dry film, on the above and below of substrate, paste photosensitive dry film;
N, outer circuit figure transfer are through making public the outer circuit graph exposure on the film to the photosensitive dry film that is attached to panel surface to photographic film;
O, outer circuit graphic plating, copper is thick and outer circuit figure copper is thick in the thickening hole;
P, the etching of outer circuit figure, on plate, etch with via in conductive copper layer be connected and will fill in the outer circuit that the resin of via hides;
Q, outer circuit AOI detect, and internal layer circuit is carried out AOI detect, and detect the defective of outer circuit;
R, silk-screen green oil and literal, silk-screen green oil on circuit board, and character silk printing;
S, moulding, gong go out the finished product profile;
T, middle inspection are carried out AOI test, the defective of testing circuit to circuit board;
U, surface treatment are handled the formation oxidation-resistant film to circuit board surface;
V, inspection eventually, the performance of test product plate and detection production board outward appearance make finished product.
The circuit board manufacturing method of the mechanical via of the no hole shape in aforesaid a kind of surface is characterized in that, step H is described to be attached process for copper and comprise:
H1, logical inner hole deposition copper are realized the through hole conducting;
H2, whole plate are electroplated, and reach the copper of plate face in the thickening via;
H3, substrate surface paste dry film, stick dry film on the upper and lower surface of substrate, and the dry film of location is removed;
H4, plating via, only electro-coppering in via;
H5, move back dry film, the dry film on the substrate is returned.
Beneficial effect of the present invention has: through resin that the conducting hole sizer is full, on resin, enclose copper again, and the outer circuit that obtains hides the via pass, and circuit board surface is comparatively smooth like this, can effectively protect touch-screen; Via adopts machine drilling to reduce production costs; One step press, it is simple once to get out the via manufacture craft.
[description of drawings]
Fig. 1 is a flow chart of the present invention;
Fig. 2 is the flow chart of step H of the present invention.
[embodiment]
Below in conjunction with accompanying drawing and embodiment the present invention is described in further detail:
Like Fig. 1, shown in Figure 2, the manufacture method of the mechanical via of the no hole shape circuit board in a kind of surface is characterized in that comprising the steps:
A, open material, size cuts the wiring board plate on request;
B, subsides photosensitive dry film paste photosensitive dry film in panel surface, and photosensitive dry film meeting polymerization reaction take place under the irradiation of certain light beam (being generally ultraviolet ray) forms a kind of stable material and is attached to the plate face;
C, internal layer circuit figure transfer; Utilize the film (film) exposure technique with the internal layer circuit graph exposure on the photographic film to the photosensitive dry film that is attached to panel surface, the part of hollowed-out translucent is an internal layer circuit on the photographic film, the partially polymerized sclerosis of the dry film of exposure area; Rinse out through the specific weakly alkaline solution flushing liquid medicine that develops without exposed portion; Internal layer circuit is covered by the dry film after making public like this, and other copper layer on the substrate exposes, and obtains the internal layer circuit figure;
Etching liquid medicine flushing plate is used in D, internal layer circuit figure etching, will remove without the copper layer exposed part of dry film protection; Internal layer circuit copper layer by the protection of the dry film after the exposure stays; Etch the internal layer circuit layer, utilize stripping soup NaOH again, the dry film of light stiffening is separated with plate fully; Pickling neutralization washing more then lets internal layer circuit copper layer expose fully and obtains internal layer circuit;
E, internal layer circuit detect, and internal layer circuit is carried out AOI detect, and AOI is a kind of automated optical detection equipment, can detect the defectives such as open circuit, short circuit of internal layer circuit;
F, brown and pressing increase the roughness on plate internal layer surface to plate internal layer brown, and a plurality of plates are range upon range of and be pressed into substrate;
G, brill via need the position of interlayer conduction to adopt machine drilling to get out via on substrate;
H, via attach copper, enclose conductive copper layer at the via inwall each layer circuit layer on the plate is communicated with through attaching process for copper, and it is following to attach the process for copper specific practice:
H1, logical inner hole deposition copper, on the via hole wall, the very thin chemical copper of method deposition last layer with chemistry realizes the through hole conducting, simultaneously with the substrate as the back electro-coppering;
H2, whole plate are electroplated, and reach the copper of plate face in the thickening via, prevent the heavy copper oxidation in the via;
H3, substrate surface paste dry film, stick dry film on the upper and lower surface of substrate, and the dry film of location is removed;
H4, electroplate via, only electro-coppering in via, substrate surface has dry film to stop to be electroplated;
H5, move back dry film, the dry film of substrate rinses out with weakly alkaline solution flushing liquid medicine.
I, filling via in via, fill up resin, and the resin that will expose outside the via polish;
J, bore component hole and location hole, on substrate, get out component hole and location hole, component hole is the hole of plug-in mounting circuit element, the hole of using when location hole is circuit board location or installation etc.;
K, heavy copper, heavy copper is the position lamination copper layer that on substrate, does not have copper, promptly on resin, copper layer in component hole and the location hole, the copper layer on the resin is communicated with via;
L, electric plating of whole board; The whole plate of circuit board is electroplated thickening have been electroplated in the via hole of copper layer, in the component hole hole, in the location hole hole and the copper layer on the resin and the copper of substrate surface; The copper layer that so original circuit board surface has removed when boring via; Copper layer by on the resin covers again, obtains that pass is hidden outer circuit and does laying for follow-up;
M, substrate surface paste photosensitive dry film, on the above and below of substrate, paste photosensitive dry film;
N, outer circuit figure transfer, similar in the making of internal layer circuit, utilize the film (film) exposure technique with the outer circuit graph exposure on the photographic film to the photosensitive dry film that is attached to panel surface, and remove unexposed dry film, obtain outer circuit;
O, outer circuit graphic plating are thick and outer circuit figure copper is thick through electroplating in the thickening hole copper;
P, the etching of outer circuit figure, on plate, etch with via in conductive copper layer be connected and will fill in the outer circuit that the resin of via hides, and the dry film on the plate returned obtain outer circuit;
Q, outer circuit AOI detect, and internal layer circuit is carried out AOI detect, and detect the defectives such as open circuit, short circuit of internal layer circuit;
R, silk-screen green oil and literal; Do not needing the green oil of printing in the localities of soldering of electronic components; Green oil is that anti-solder ink is can effectively prevent soldering of electronic components the time; Scolding tin is bonded at non-welding zone, and solder-mask printing printing ink some conductting layers on also can protective circuit plate erosion of not making moist simultaneously increases the aesthetic measure of product simultaneously; On circuit board according to literal such as the character of designing requirement silk-screen electronic component or numerals;
Burr on the circuit board etc. is removed in S, moulding, and gong goes out the finished product profile;
T, middle inspection are carried out AOI test, defectives such as the short circuit of testing circuit, open circuit to circuit board;
U, surface treatment are handled the formation oxidation-resistant film to circuit board surface;
V, inspection eventually, the performance of test product plate and detection production board outward appearance make finished product.
Claims (2)
1. the circuit board manufacturing method of the mechanical via of the no hole shape in surface is characterized in that comprising the steps:
A, open material, size cuts the wiring board plate on request;
B, subsides photosensitive dry film paste photosensitive dry film in panel surface;
C, internal layer circuit figure transfer are through making public the internal layer circuit graph exposure on the film to the photosensitive dry film that is attached to panel surface to photographic film;
D, the etching of internal layer circuit figure etch the internal layer circuit layer on plate;
E, internal layer circuit AOI detect, and detect the defective of internal layer circuit;
F, brown and pressing, behind plate internal layer surface coarsening, that a plurality of plates are range upon range of and be pressed into substrate;
G, brill via adopt machine drilling to get out via on substrate;
H, via attach copper, enclose conductive copper layer at the via inwall each layer circuit layer on the plate is communicated with through attaching process for copper;
I, filling via in via, fill up resin, and the resin that will expose outside the via polish;
J, brill component hole and location hole get out component hole and location hole on substrate;
K, heavy copper, copper layer on resin, in component hole and the location hole;
L, electric plating of whole board are electroplated thickening with the full plate of circuit board and have been electroplated in the via hole of copper layer, in the component hole hole, in the location hole hole and the copper of copper layer and substrate surface on the resin;
M, substrate surface paste photosensitive dry film, on the above and below of substrate, paste photosensitive dry film;
N, outer circuit figure transfer are through making public the outer circuit graph exposure on the film to the photosensitive dry film that is attached to panel surface to photographic film;
O, outer circuit graphic plating, copper is thick and outer circuit figure copper is thick in the thickening hole;
P, the etching of outer circuit figure, on plate, etch with via in conductive copper layer be connected and will fill in the outer circuit that the resin of via hides;
Q, outer circuit AOI detect, and internal layer circuit is carried out AOI detect, and detect the defective of outer circuit;
R, silk-screen green oil and literal, silk-screen green oil on circuit board, and character silk printing;
S, moulding, gong go out the finished product profile;
T, middle inspection are carried out AOI test, the defective of testing circuit to circuit board;
U, surface treatment are handled the formation oxidation-resistant film to circuit board surface;
V, inspection eventually, the performance of test product plate and detection production board outward appearance make finished product.
2. the circuit board manufacturing method of the mechanical via of the no hole shape in a kind of surface according to claim 1 is characterized in that, step H is described to be attached process for copper and comprise:
H1, logical inner hole deposition copper are realized the through hole conducting;
H2, whole plate are electroplated, and reach the copper of plate face in the thickening via;
H3, substrate surface paste dry film, stick dry film on the upper and lower surface of substrate, and the dry film of location is removed;
H4, plating via, only electro-coppering in via;
H5, move back dry film, the dry film on the substrate is returned.
Priority Applications (1)
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CN2011101825440A CN102364999A (en) | 2011-06-30 | 2011-06-30 | Manufacturing method of mechanical conduction hole circuit board without holes on surface |
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CN2011101825440A CN102364999A (en) | 2011-06-30 | 2011-06-30 | Manufacturing method of mechanical conduction hole circuit board without holes on surface |
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Cited By (14)
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CN102612268A (en) * | 2012-03-09 | 2012-07-25 | 常熟金像电子有限公司 | Production method of printed circuit board with oversized layout size |
CN102781172A (en) * | 2012-07-24 | 2012-11-14 | 广东达进电子科技有限公司 | Production method for mirror-surface aluminum base board |
CN103648236A (en) * | 2013-12-31 | 2014-03-19 | 深圳市深联电路有限公司 | Method for improving PCB (Printed Circuit Board) metal binding local windowing |
CN103730375A (en) * | 2014-01-14 | 2014-04-16 | 无锡江南计算技术研究所 | OSP surface treatment package substrate forming milling method |
CN105792530A (en) * | 2016-04-25 | 2016-07-20 | 苏州市王氏电路板有限公司 | PCB processing technology |
CN106061139A (en) * | 2016-06-17 | 2016-10-26 | 奥士康精密电路(惠州)有限公司 | Layer-to-layer registration control method for inner layers of HDI (High Density Interconnector) board |
CN106714461A (en) * | 2017-02-15 | 2017-05-24 | 昆山大洋电路板有限公司 | High-insulativity, high-voltage and tracking-resistant precise circuit board and preparation method thereof |
CN104080278B (en) * | 2014-06-24 | 2017-06-06 | 柏承科技(昆山)股份有限公司 | The production technology of wiring board conductive polymer fenestra technique and its collocation graphic plating |
CN109451652A (en) * | 2018-10-25 | 2019-03-08 | 东莞泰山电子有限公司 | The test method of back-shaped route PCB line anomalies |
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CN113260163A (en) * | 2021-05-07 | 2021-08-13 | 深圳市迅捷兴科技股份有限公司 | Method for manufacturing circuit board fine line |
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Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101146407A (en) * | 2006-09-15 | 2008-03-19 | 李东明 | Graph transfer shaping technology for carrier board circuit of printed circuit board |
CN101951736A (en) * | 2010-09-17 | 2011-01-19 | 深圳市集锦线路板科技有限公司 | Process for producing circuit board metallized semi-holes |
-
2011
- 2011-06-30 CN CN2011101825440A patent/CN102364999A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101146407A (en) * | 2006-09-15 | 2008-03-19 | 李东明 | Graph transfer shaping technology for carrier board circuit of printed circuit board |
CN101951736A (en) * | 2010-09-17 | 2011-01-19 | 深圳市集锦线路板科技有限公司 | Process for producing circuit board metallized semi-holes |
Cited By (18)
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CN102612268A (en) * | 2012-03-09 | 2012-07-25 | 常熟金像电子有限公司 | Production method of printed circuit board with oversized layout size |
CN102781172A (en) * | 2012-07-24 | 2012-11-14 | 广东达进电子科技有限公司 | Production method for mirror-surface aluminum base board |
CN103648236A (en) * | 2013-12-31 | 2014-03-19 | 深圳市深联电路有限公司 | Method for improving PCB (Printed Circuit Board) metal binding local windowing |
CN103648236B (en) * | 2013-12-31 | 2016-09-21 | 深圳市深联电路有限公司 | The method windowed in a kind of PCB of improvement metal hemming edge local |
CN103730375A (en) * | 2014-01-14 | 2014-04-16 | 无锡江南计算技术研究所 | OSP surface treatment package substrate forming milling method |
CN103730375B (en) * | 2014-01-14 | 2016-08-17 | 无锡江南计算技术研究所 | OSP surface processes base plate for packaging molding milling method |
CN104080278B (en) * | 2014-06-24 | 2017-06-06 | 柏承科技(昆山)股份有限公司 | The production technology of wiring board conductive polymer fenestra technique and its collocation graphic plating |
CN105792530B (en) * | 2016-04-25 | 2019-01-29 | 苏州市王氏电路板有限公司 | A kind of processing technology of pcb board |
CN105792530A (en) * | 2016-04-25 | 2016-07-20 | 苏州市王氏电路板有限公司 | PCB processing technology |
CN106061139A (en) * | 2016-06-17 | 2016-10-26 | 奥士康精密电路(惠州)有限公司 | Layer-to-layer registration control method for inner layers of HDI (High Density Interconnector) board |
CN106714461A (en) * | 2017-02-15 | 2017-05-24 | 昆山大洋电路板有限公司 | High-insulativity, high-voltage and tracking-resistant precise circuit board and preparation method thereof |
CN109548284A (en) * | 2018-10-16 | 2019-03-29 | 欣强电子(清远)有限公司 | A kind of optical module pcb forming method |
CN109548284B (en) * | 2018-10-16 | 2020-07-31 | 欣强电子(清远)有限公司 | Optical module pcb forming method |
CN109451652A (en) * | 2018-10-25 | 2019-03-08 | 东莞泰山电子有限公司 | The test method of back-shaped route PCB line anomalies |
CN111212528A (en) * | 2020-02-17 | 2020-05-29 | 文柏新 | Method for manufacturing multilayer printed circuit board |
CN112509933A (en) * | 2021-02-04 | 2021-03-16 | 广东科翔电子科技股份有限公司 | Process method for fully embedding components on IC carrier plate |
CN113260163A (en) * | 2021-05-07 | 2021-08-13 | 深圳市迅捷兴科技股份有限公司 | Method for manufacturing circuit board fine line |
CN115966514A (en) * | 2023-03-17 | 2023-04-14 | 深圳明阳电路科技股份有限公司 | Preparation method of semiconductor carrier plate |
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Application publication date: 20120229 |