CN101990361A - 印刷电路板及电子应用 - Google Patents
印刷电路板及电子应用 Download PDFInfo
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Abstract
本发明公开了一种印刷电路板和电子产品。根据本发明的实施例,印刷电路板包括第一板和第二板,第一板上安装有电子元件,第二板位于第一板的上侧上并覆盖第一板的上表面的至少一部分,并且,将EBG结构***第二板中,以屏蔽从第一板向上辐射的噪声。因此,印刷电路板易于吸收各种频率,易于被应用而没有任何天线效应,并可在制造中节省成本。
Description
相关申请的交叉参考
本申请要求于2009年7月29日向韩国知识产权局提交的韩国专利申请第10-2009-0069666号的权益,其全部内容通过引证结合于此。
技术领域
本发明涉及一种印刷电路板和电子产品。
背景技术
由于电子产品的工作频率变得更高,所以电磁干扰(EMI)被认为是一种持续噪声问题。特别地,电子产品的工作频率已经达到几十MHz,甚至几GHz,使得EMI问题变得更严重。因此,迫切需要找到该问题的解决方案。在出现在电路板(board)上的EMI问题中,尤其是出现在板边缘处的噪声问题的解决方案尚未得到充分研究,这使得难以完全阻止电路板中的噪声。
EMI噪声指的是:当在一个电子电路、电子元件或电子部件中产生的电磁(EM)波传递至另一个电子电路、电子元件或电子部件时,引起由干扰导致的噪声问题的噪声。EMI噪声可以粗略地分为两种类型,即辐射噪声(图1中的参考标号10和30)和传导噪声(conduction noise)(图1中的参考标号20)。
通常,可以通过用屏蔽罩(shield can)(图2的40)覆盖板的上部或者通过附接EMI场吸收涂层(EMI field absorber)(图3的42)吸收EMI噪声,来屏蔽从电子产品的板辐射的EMI噪声。然而,在使用屏蔽罩40的情况下,由于由天线效应而产生新的辐射噪声10’,所以难以屏蔽所有朝着板外部辐射的EMI噪声,并且存在EMI场吸收涂层42可吸收的频率范围的限制,使得迫切需要找到一种有效的屏蔽方法。
屏蔽罩40在其自身附接上存在一些问题。此外,不仅屏蔽罩的厚度受到限制,而且屏蔽也增加了轻质电子装置的重量。而且,在EMI场吸收涂层42的情况下,难以开发出能够屏蔽各种频率的EMI噪声的材料,并且可能需要更长时间来开发此材料,从而增加了生产成本。
因此,迫切需要找到一种解决方案,能够易于吸收各种频率、易于应用而没有任何天线效应,并且能节省制造成本。
发明内容
本发明提供一种印刷电路板和电子产品,能够易于吸收各种频率,易于应用而没有任何天线效应,并且节省制造成本。
本发明的一个方面提供了一种印刷电路板,包括:第一板,其上安装有电子元件;以及第二板,位于第一板的上侧上并覆盖第一板的上表面的至少一部分,并且其中,将EBG结构***第二板中,以屏蔽从第一板向上辐射的噪声。
第二板可以通过粘合剂粘接至第一板的上表面,并且可以被连接至覆盖第一板的上表面的至少一部分的屏蔽罩。这里,屏蔽罩可连接至第一板的地(ground),以及第二板的EBG结构可以被接地至屏蔽罩。而且,可在屏蔽罩中形成开孔(open hole),并且第二板可以以覆盖开孔的方式连接至屏蔽罩的一部分。这里,开孔可在电子元件的上表面中形成。
电子元件可安装在第一板的表面上,并且,第二板可堆叠在第一板的上表面上,同时,与电子元件的位置相对应的部分被打开。
第二板可包括:第一导体和第二导体,分别设置在不同表面上;第三导体,设置在与第二导体的表面不同的表面上;以及穿引通孔单元,用于通过其上设置有第二导体的表面将第一导体连接至第三导体,并且其中,穿引通孔单元与第二导体电隔离。
第二板可包括:一对第四导体,分离地设置在同一表面上;第五导体,设置在与第四导体的表面不同的表面上;第六导体,设置在第四导体与第五导体之间的表面上;以及穿引通孔单元,用于通过第五导体将一对第四导体彼此连接,并且其中,穿引通孔单元与第六导体电隔离。
第二板也可以具有与第一板的形状相对应的弯曲形状。
本发明的另一方面提供了一种电子产品,包括:外壳;第一板,位于外壳内部;以及第二板,其中***有EBG结构,并且其中,第二板连接至面向第一板的外壳的内部,以屏蔽从第一板辐射的噪声。
第二板可包括:第一导体和第二导体,分别设置在不同表面上;第三导体,设置在与第二导体的表面不同的表面上;以及的穿引通孔单元,用于通过第二导体设置于其上的表面将第一导体连接至第三导体,并且其中,穿引通孔单元与第二导体电隔离。
第二板可包括:一对第四导体,分离地设置在同一表面上;第五导体,设置在与第四导体的表面不同的表面上;第六导体,设置在第四导体与第五导体之间的表面上;以及穿引通孔单元,用于通过第五导体将一对第四导体彼此连接,并且其中,穿引通孔单元与第六导体电隔离。
第二板也可具有与第一板的形状相对应的弯曲形状。
本发明的其它方面和优点的一部分将在以下描述中阐述,一部分从描述中将是显而易见的,或可通过本发明的实践来获知。
附图说明
图1至图3是示出了根据相关技术的印刷电路板的剖视图。
图4至图7是示出了根据本发明的一些实施例的印刷电路板的剖视图。
图8是示出了根据本发明的实施例的印刷电路板的第二板的平面图。
图9是示出了根据本发明的实施例的电子产品的剖视图。
图1 0至图1 4示出了根据本发明的一些实施例的***到印刷电路板中的EBG结构。
具体实施方式
由于本发明考虑到了各种改变和多种实施例,所以将在图中示出并在书面描述中详细描述特定的实施例。然而,这不意指将本发明限制于具体的实践模式,应当理解的是,在不背离本发明的精神和技术范围的前提下,所有改变、等价物和替代物都包含在本发明中。在本发明的描述中,当认为相关技术的某些详细说明可能会不必要地使本发明的本质不明显时,则省去这些详细说明。
以下将参照附图更详细地描述根据本发明的某些实施例的印刷电路板和电子产品。无论是在哪个附图中,那些相同或相应的元件均由相同的参考标记表示,从而省略了多余的描述。
根据本发明的实施例的印刷电路板提供这样一种结构:其中,可以通过覆盖安装有电子元件110的板的上表面(使用其间***有EBG结构的另一个板来覆盖),屏蔽从电子元件110或从用于驱动安装在板上的电子元件110的驱动电路辐射出的EMI噪声。为此,根据本发明的实施例的印刷电路板包括:第一板100,其上安装有电子元件110;以及第二板200,位于第一板100的上表面上并覆盖第一板100的上表面的至少一部分,并且,以能够屏蔽从第一板100向上辐射的噪声的方式将EBG结构(参照图10至图14的参考标记280a、280b、280c和280d)***第二板中。
第二板200是与其上安装有电子元件110的第一板100不同的单独的板,并可通过在其中***EBG结构280a、280b、280c和280d来屏蔽噪声。这里,EBG结构可由形成于板内的金属层、通孔和图案(pattern)组成。
因而,由于根据本实施例的印刷电路板通过仅增加第二板200,而不使用昂贵的吸收涂层(图3的42)来屏蔽从第一板100向上辐射的噪声,所以其可以提供期望的或甚至更好的噪声屏蔽效果,且具有比使用吸收涂层的情况更低的成本。而且,由于不会出现天线效应,故根据本实施例的印刷电路板可以提供比仅使用屏蔽罩(图2的40)的传统技术好得多的噪声屏蔽效果。
***第二板200的EBG结构的各种可能的实施例将在后文中描述。
可使用粘合剂290将第二板200连接至第一板100的上表面。更具体地,如果电子元件110安装在第一板100的表面上,如图4所示,则可通过粘合剂290将第二板200连接至电子元件110的上表面。可在未涂覆粘合剂290的相反表面上形成阻焊剂(solderresist)270,从而可以保护用于形成EBG结构的各种图案。
同时,如图5所示,在屏蔽罩300覆盖第一板100的上表面的情况下,第二板200可通过连接至屏蔽罩300而覆盖第一板100的上表面。
而且,在屏蔽罩300通过焊料(未示出)连接至第一板100的地的情况下,可通过使第二板200的EBG结构接地至屏蔽罩300而将EBG结构连接至第一板100的地(未示出)。使用此构造,地可以被更为广泛地获取,从而改善了噪声屏蔽效果。
为此,如图6所示,在第二板200的EBG结构的一部分(即,金属层或图案)被设置为粘接至屏蔽罩300之后,可通过使用固定工具(例如,胶带205)将第二板200固定至屏蔽罩300。在图6中,胶带205覆盖第二板200的整个上表面,但是应当显而易见的是,其也可以仅覆盖第二板200的一部分,这取决于设计要求。
虽然第二板200可连接至屏蔽罩300的整个下表面或上表面,但是,第二板200仅连接至屏蔽罩300的某一部分也是可行的。在这种情况下,如图6所示,可在屏蔽罩300中形成开孔310,并且可以连接第二板200以覆盖开孔310。因而,通过将第二板200选择性地设置在某一部分上,可选择性地屏蔽用户所期望的部分中的噪声,并且,可避免第二板200的过量使用,从而可以期望成本的节约。
考虑到噪声通常从电子元件向上辐射,开孔可以形成在屏蔽罩的与电子元件的上侧对应的一部分中。然而,应当显而易见的是,本发明不限于此实施例,因而根据设计要求,可修改开孔的位置、数量和形状。
同时,如果问题是从电子元件110周围的驱动电路辐射的噪声,而不是从安装在第一板100上的电子元件110的上表面辐射的噪声,那么第二板200可具有对应于电子元件110的位置打开的部分,然后将第二板堆叠在第一板100的上表面上。这样,如图7所示,第二板200可介于每两个电子元件110之间,因而,可防止印刷电路板的整体厚度不必要地变得过厚。
同时,如果第一板100具有除矩形以外的形状,那么第二板200也可具有其周界弯曲的形状,以对应于第一板100的形状。例如,如图8所示,第二板200的一部分可以具有与第一板100的外部形状对应的半圆形,或三角形等,这取决于具体情况。
可将根据本发明的前述实施例的印刷电路板应用于诸如移动电话和其它移动装置的各种电子产品。在这种情况下,上述第二板200可连接至电子产品1000的外壳400的内部,如图9所示。在这种情况下,可以将其间***有EBG结构的第二板200容易地置于电子产品1000的外壳400上,而不需要额外的屏蔽罩。
接下来,将在下面描述***第二板200中的前述EBG结构的各种可能的实施例。
首先,图10示出了穿引通孔(stitching via)型EBG结构。根据本发明的带隙(bandgap)结构280a可包括:第一导体230a-1和第二导体210a,二者设置在不同表面上;第三导体230a-2,设置在与第二导体210a的表面不同的表面上;穿引通孔单元240a,用于通过设置有第二导体210a的表面将第一导体230a-1连接至第三导体230a-2,但是,该穿引通孔单元与第二导体210a是电隔离的。
以下描述的是图10中所示的结构可用作阻止某些频带的信号的电磁带隙结构的原理。介入第二导体210a与第一导体230a-1和第三导体230a-2之间的可以是介电层220a。这在第二导体210a与第一导体230a-1和第三导体230a-2之间以及在相邻的第一导体230a-1和第三导体230a-2之间形成电容元件。通过经由第一通孔241a→连接图案243a→第二通孔242a连接的穿引通孔单元240a,在两个相邻导体230a-1和230a-2之间形成电感元件。这里,电容元件的值可根据各种因素而改变,例如,第二导体210a与第一导体230a-1和第三导体230a-2之间的间隔距离以及两个相邻导体230a-1和230a-2之间的间隔距离、形成介电层220a的介电材料的介电常数以及导体的大小、形状和面积。并且,电感元件的值可根据各种因素而改变,例如,第一通孔241a、第二通孔242a和连接图案243a的形状、长度、深度、宽度和面积。因此,适当地调节并设计各种上述所提及的因素可使图1 0的结构用作电磁带隙结构(即,带阻滤波器),以消除或阻止目标频带的某些噪声或某些信号。通过图11的等效电路,可以容易地理解本文的描述。
将图11的等效电路与图10的电磁带隙结构进行对照,电感元件L1对应于第一通孔241a,而电感元件L2对应于第二通孔242a。电感元件L3对应于连接图案243a。C1是由第一导体230a-1和第三导体230a-2以及任何其它可以位于第一导体230a-1和第三导体230a-2上方的介电层(未示出)和可以位于该介电层(未示出)上方的另一导体(未示出)形成的电容元件。C2和C3是由位于与连接图案243a相同的平面上的第二导体210a以及任何其它可以位于第二导体210a的下方的介电层(未示出)和可以位于该介电层(未示出)下方的另一导体(未示出)形成的电容元件。
根据上述等效电路,图10所示的电磁带隙结构280a可用作阻止某些频带的信号的带阻滤波器。换句话说,如图11的等效电路所示,低频带中的信号(参照图11中的参考标记“x”)和高频带中的信号(参照图11中的参考标记“y”)可通过电磁带隙结构,并且,电磁带隙结构阻止了低频带与高频带之间的某些频带范围内的信号(参照图11中的参考标记“z1”,“z2”和“z3”)。
图12所示的是EBG结构280b的另一实施例,包括:一对第四导体210b,分离地设置在同一表面上;第五导体230b,设置在与第四导体210b的表面不同的表面上;第六导体220b,设置在第四导体210b与第五导体230b之间的表面上;以及穿引通孔单元240b,用于通过第五导体230b将一对第四导体210b彼此连接,但是该穿引通孔单元与第六导体220b是电隔离的。
在图12的EBG结构(是图10的EBG结构280a的修改)中,额外的电容元件不仅形成在第四导体210b和第六导体220b之间,而且也形成在第五导体230b和第六导体220b之间。此外,将第四导体210b连接至第五导体230b的通孔240b可以足够长以获得足够的电感元件的值。因此,可提高阻止某一频带中的信号的效率。
在图1 3中作为本发明的另一实施例示出的是蘑菇型EBG280c。蘑菇型EBG 280c具有这样的结构:多个蘑菇形EBG单元(参照图1 3中的参考标记230c)***用作(例如)电源层和接地层的两个金属层210c和220c之间。为了图示方便,图1 3仅示出了四个EBG单元230c。
参照图13,在蘑菇型EBG 280c中,在第一金属层210c和第二金属层220c之间额外地形成金属板231c,一个金属层用作接地层,而另一个金属层用作电源层,并且,重复地布置利用通孔232c将第一金属层210c连接至金属板230c的蘑菇型结构230c。这里,第一介电层215c***第一金属层210c和金属板231c之间,以及第二介电层225c***金属板231c和第二金属层220c之间。
在这种蘑菇型EBG 280c中,由第二金属层220c、第二介电层225c和金属板231c形成的电容元件和由穿过第一介电层215c将第一金属层210c连接至金属板231c的通孔232c形成的电感元件在第一金属层210c与第二金属层220c之间以L-C串联方式连接,从而使蘑菇型EBG 280c用作一种类型的带阻滤波器。
在图14中作为本发明的另一实施例示出的是共面EBG 280d。在共面EBG中,遍及任何用作电源层或接地层的金属层重复布置多个某一图案的EBG单元(参照图14中的参考标记220d)。为了图示方便,图14也仅示出了四个EBG单元220d。
参照图14,共面EBG 280d具有这样的形状:将任一金属层210d和位于另一平面上的多个金属板221d通过金属板的某一部分(在图14的情况中,是每个金属板的拐角的端部)用金属分支(metalbranch)222d彼此桥接在一起。
这里,具有大尺寸的金属板221d组成低阻抗区域,而具有小尺寸的金属分支组成高阻抗区域。因此,共面EBG 280d变为用作可通过交替重复低阻抗区域和高阻抗区域的结构来阻止某一频带的噪声的带阻滤波器。
这种共面EBG结构280d具有仅用两个层就可以组成电磁带隙结构的优点。
虽然用四个实例280a,280b,280c和280d描述了***第二板200的EBG结构,但是显而易见的是,也可将EBG结构的其它改进形式***第二板200。
虽然已参照具体实施例详细描述了本发明的实质,但是所述实施例仅是为了示意性的目的,而不限制本发明。应该理解,在不背离本发明的范围和实质的前提下,本领域的技术人员可改变或修改所述实施例。
这样,可在所附权利要求中发现除了上述实施例以外的许多实施例。
Claims (14)
1.一种印刷电路板,包括:
第一板,其上安装有电子元件;以及
第二板,位于所述第一板的上侧上,并覆盖所述第一板的上表面的至少一部分,所述第二板中***有EBG结构,以屏蔽从所述第一板向上辐射的噪声。
2.根据权利要求1所述的印刷电路板,其中,所述第二板通过粘合剂粘接至所述第一板的上表面。
3.根据权利要求1所述的印刷电路板,进一步包括:屏蔽罩,覆盖所述第一板的上表面的至少一部分,
其中,所述第二板连接至所述屏蔽罩。
4.根据权利要求3所述的印刷电路板,其中,所述屏蔽罩连接至所述第一板的地,所述第二板的EBG结构被接地至所述屏蔽罩。
5.根据权利要求3所述的印刷电路板,其中,所述屏蔽罩中形成有开孔,所述第二板以覆盖所述开孔的方式连接至所述屏蔽罩的一部分。
6.根据权利要求5所述的印刷电路板,其中,所述开孔形成于所述电子元件的上表面。
7.根据权利要求1所述的印刷电路板,其中:
所述电子元件安装在所述第一板的表面上;以及
所述第二板堆叠在所述第一板的上表面上,同时,与所述电子元件的位置相对应的部分被打开。
8.根据权利要求1所述的印刷电路板,其中,所述第二板包括:第一导体和第二导体,分别设置在不同表面上;
第三导体,设置在与所述第二导体的表面不同的表面上;以及
穿引通孔单元,用于通过其上设置有所述第二导体的表面将所述第一导体连接至所述第三导体,所述穿引通孔单元与所述第二导体电隔离。
9.根据权利要求1所述的印刷电路板,其中,所述第二板包括:
一对第四导体,分离地设置在同一表面上;
第五导体,设置在与所述第四导体的表面不同的表面上;
第六导体,设置在所述第四导体与所述第五导体之间的表面上;以及
穿引通孔单元,用于通过所述第五导体将所述一对第四导体彼此连接,所述穿引通孔单元与所述第六导体电隔离。
10.根据权利要求1所述的印刷电路板,其中,所述第二板具有与所述第一板的形状相对应的弯曲形状。
11.一种电子产品,包括:
外壳;
第一板,设置在所述外壳内;以及
第二板,其中***有EBG结构,
其中,所述第二板连接至面向所述第一板的所述外壳的内部,以屏蔽从所述第一板辐射的噪声。
12.根据权利要求11所述的电子产品,其中,所述第二板包括:
第一导体和第二导体,分别设置在不同表面上;
第三导体,设置在与所述第二导体的表面不同的表面上;以及
穿引通孔单元,用于通过其上设置有所述第二导体的表面将所述第一导体连接至所述第三导体,所述穿引通孔单元与所述第二导体电隔离。
13.根据权利要求11所述的电子产品,其中,所述第二板包括:
一对第四导体,分离地设置在同一表面上;
第五导体,设置在与所述第四导体的表面不同的表面上;
第六导体,设置在所述第四导体与所述第五导体之间的表面上;以及
穿引通孔单元,用于通过所述第五导体将所述一对第四导体彼此连接,所述穿引通孔单元与所述第六导体电隔离。
14.根据权利要求11所述的电子产品,其中,所述第二板具有与所述第一板的形状相对应的弯曲形状。
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102856304A (zh) * | 2011-06-27 | 2013-01-02 | 中国科学院微电子研究所 | 一种半导体芯片封装结构 |
CN105340133A (zh) * | 2013-03-15 | 2016-02-17 | 伟创力有限责任公司 | 用于创建完全微波吸收印刷电路板的方法和装置 |
Families Citing this family (26)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103081576B (zh) * | 2010-09-30 | 2015-11-25 | 日本电气株式会社 | 配线基板和电子设备 |
JP5751079B2 (ja) * | 2011-08-05 | 2015-07-22 | 富士通セミコンダクター株式会社 | 半導体装置及びその製造方法 |
JP5670392B2 (ja) | 2012-07-27 | 2015-02-18 | 株式会社東芝 | 回路基板 |
US9312607B2 (en) * | 2013-02-12 | 2016-04-12 | Raytheon Company | Load spreading interposer |
KR20140103789A (ko) * | 2013-02-19 | 2014-08-27 | 엘지전자 주식회사 | 이동 단말기 |
JP2015023194A (ja) * | 2013-07-19 | 2015-02-02 | 株式会社東芝 | 半導体装置 |
US10070547B2 (en) * | 2014-02-26 | 2018-09-04 | Sparton Corporation | Control of electric field effects in a printed circuit board assembly using embedded nickel-metal composite materials |
JP6336307B2 (ja) | 2014-03-18 | 2018-06-06 | キヤノン株式会社 | 電子回路 |
US10403973B2 (en) * | 2014-04-22 | 2019-09-03 | Intel Corporation | EBG designs for mitigating radio frequency interference |
TWI565400B (zh) * | 2014-07-01 | 2017-01-01 | 華碩電腦股份有限公司 | 電磁帶隙結構與具有電磁帶隙結構的電子裝置 |
US10321553B2 (en) * | 2014-08-04 | 2019-06-11 | Cisco Technology, Inc. | Shield to improve electromagnetic interference (EMI) suppression capability |
JP6273182B2 (ja) | 2014-08-25 | 2018-01-31 | 株式会社東芝 | 電子機器 |
JP5937190B2 (ja) * | 2014-12-12 | 2016-06-22 | 株式会社東芝 | 回路基板 |
JP6394482B2 (ja) * | 2015-04-28 | 2018-09-26 | 京セラドキュメントソリューションズ株式会社 | 電子機器 |
CN107926137B (zh) * | 2015-07-02 | 2020-01-31 | 莱尔德电子材料(深圳)有限公司 | Emi屏蔽件及其相关方法、电子电路、电子装置 |
US9999121B2 (en) | 2016-04-25 | 2018-06-12 | Laird Technologies, Inc. | Board level shields with virtual grounding capability |
US10791622B2 (en) * | 2016-07-27 | 2020-09-29 | National University Corporation Okayama University | Printed wiring board |
KR102528687B1 (ko) * | 2016-09-06 | 2023-05-08 | 한국전자통신연구원 | 전자기 밴드갭 구조물 및 그 제조 방법 |
WO2018186065A1 (ja) * | 2017-04-03 | 2018-10-11 | 株式会社村田製作所 | 高周波モジュール |
KR20190006359A (ko) * | 2017-07-10 | 2019-01-18 | 엘지전자 주식회사 | 전자장치 |
JP6921705B2 (ja) * | 2017-10-13 | 2021-08-18 | 株式会社東芝 | 電子機器 |
KR102442131B1 (ko) | 2018-01-26 | 2022-09-13 | 삼성전자 주식회사 | 안테나 장치 및 안테나 장치를 포함하는 전자 장치 |
US20190297758A1 (en) * | 2018-03-23 | 2019-09-26 | Intel IP Corporation | Electromagnetic shielding cap, an electrical system and a method for forming an electromagnetic shielding cap |
KR102063469B1 (ko) * | 2018-05-04 | 2020-01-09 | 삼성전자주식회사 | 팬-아웃 반도체 패키지 |
US11201119B2 (en) * | 2018-06-06 | 2021-12-14 | At&S Austria Technologie & Systemtechnik Aktiengesellschaft | RF functionality and electromagnetic radiation shielding in a component carrier |
KR102551803B1 (ko) * | 2018-10-19 | 2023-07-06 | 삼성전자주식회사 | 배선을 따라 유전체가 채워질 수 있는 이격 공간을 갖도록 배치된 도전성 부재를 포함하는 전자 장치 |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5886597A (en) * | 1997-03-28 | 1999-03-23 | Virginia Tech Intellectual Properties, Inc. | Circuit structure including RF/wideband resonant vias |
US20030232603A1 (en) * | 2002-06-12 | 2003-12-18 | Makoto Tanaka | Package device for accommodating a radio frequency circuit |
US20060050010A1 (en) * | 2004-09-08 | 2006-03-09 | Jinwoo Choi | Electromagnetic bandgap structure for isolation in mixed-signal systems |
US20060232949A1 (en) * | 2005-04-18 | 2006-10-19 | Hideki Osaka | Main board for backplane buses |
CN101365293A (zh) * | 2007-08-07 | 2009-02-11 | 三星电机株式会社 | 电磁带隙结构及印刷电路板 |
CN101453828A (zh) * | 2007-12-07 | 2009-06-10 | 三星电机株式会社 | 电磁带隙结构与印刷电路板 |
WO2009082003A1 (ja) * | 2007-12-26 | 2009-07-02 | Nec Corporation | 電磁バンドギャップ素子及びそれを用いたアンテナ並びにフィルタ |
Family Cites Families (70)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05152780A (ja) * | 1991-12-02 | 1993-06-18 | Matsushita Electric Ind Co Ltd | 電磁波遮蔽用シールド |
JPH0553269U (ja) * | 1991-12-17 | 1993-07-13 | 日本無線株式会社 | 高周波シールド構造を有する多層配線基板 |
JPH0579995U (ja) * | 1992-04-03 | 1993-10-29 | 日本無線株式会社 | 高周波シールド構造を有する多層配線基板 |
JPH11135977A (ja) | 1997-10-28 | 1999-05-21 | Sony Corp | 電子回路 |
US6377464B1 (en) * | 1999-01-29 | 2002-04-23 | Conexant Systems, Inc. | Multiple chip module with integrated RF capabilities |
US7215007B2 (en) * | 2003-06-09 | 2007-05-08 | Wemtec, Inc. | Circuit and method for suppression of electromagnetic coupling and switching noise in multilayer printed circuit boards |
US20050104678A1 (en) * | 2003-09-11 | 2005-05-19 | Shahrooz Shahparnia | System and method for noise mitigation in high speed printed circuit boards using electromagnetic bandgap structures |
US7030463B1 (en) * | 2003-10-01 | 2006-04-18 | University Of Dayton | Tuneable electromagnetic bandgap structures based on high resistivity silicon substrates |
US20050224912A1 (en) * | 2004-03-17 | 2005-10-13 | Rogers Shawn D | Circuit and method for enhanced low frequency switching noise suppression in multilayer printed circuit boards using a chip capacitor lattice |
US20050205292A1 (en) * | 2004-03-18 | 2005-09-22 | Etenna Corporation. | Circuit and method for broadband switching noise suppression in multilayer printed circuit boards using localized lattice structures |
US7102581B1 (en) * | 2004-07-01 | 2006-09-05 | Rockwell Collins, Inc. | Multiband waveguide reflector antenna feed |
US7136029B2 (en) * | 2004-08-27 | 2006-11-14 | Freescale Semiconductor, Inc. | Frequency selective high impedance surface |
US7253788B2 (en) * | 2004-09-08 | 2007-08-07 | Georgia Tech Research Corp. | Mixed-signal systems with alternating impedance electromagnetic bandgap (AI-EBG) structures for noise suppression/isolation |
EP2426785A2 (en) * | 2004-10-01 | 2012-03-07 | L. Pierre De Rochemont | Ceramic antenna module and methods of manufacture thereof |
TWI296493B (en) | 2005-05-19 | 2008-05-01 | Univ Nat Sun Yat Sen | Embedded power plane for suppressing noise and multi-layer structure using the same |
US7209082B2 (en) * | 2005-06-30 | 2007-04-24 | Intel Corporation | Method and apparatus for a dual band gap wideband interference suppression |
US7408512B1 (en) * | 2005-10-05 | 2008-08-05 | Sandie Corporation | Antenna with distributed strip and integrated electronic components |
US7626216B2 (en) * | 2005-10-21 | 2009-12-01 | Mckinzie Iii William E | Systems and methods for electromagnetic noise suppression using hybrid electromagnetic bandgap structures |
JP4325630B2 (ja) * | 2006-03-14 | 2009-09-02 | ソニー株式会社 | 3次元集積化装置 |
TW200818451A (en) * | 2006-06-02 | 2008-04-16 | Renesas Tech Corp | Semiconductor device |
KR100723531B1 (ko) * | 2006-06-13 | 2007-05-30 | 삼성전자주식회사 | 반도체 패키지 기판 |
TWI312592B (en) * | 2006-06-30 | 2009-07-21 | Ind Tech Res Inst | Antenna structure with antenna radome and method for rising gain thereof |
TW200808136A (en) | 2006-07-26 | 2008-02-01 | Inventec Corp | A layout design for a multilayer printed circuit board |
US8060457B2 (en) * | 2006-09-13 | 2011-11-15 | Georgia Tech Research Corporation | Systems and methods for electromagnetic band gap structure synthesis |
US20080072204A1 (en) * | 2006-09-19 | 2008-03-20 | Inventec Corporation | Layout design of multilayer printed circuit board |
US20080068818A1 (en) * | 2006-09-19 | 2008-03-20 | Jinwoo Choi | Method and apparatus for providing ultra-wide band noise isolation in printed circuit boards |
WO2008054324A1 (en) | 2006-11-01 | 2008-05-08 | Agency For Science, Technology And Research | Double-stacked ebg structure |
US8514147B2 (en) * | 2006-11-22 | 2013-08-20 | Nec Tokin Corporation | EBG structure, antenna device, RFID tag, noise filter, noise absorptive sheet and wiring board with noise absorption function |
US8081138B2 (en) * | 2006-12-01 | 2011-12-20 | Industrial Technology Research Institute | Antenna structure with antenna radome and method for rising gain thereof |
US20080158840A1 (en) * | 2006-12-27 | 2008-07-03 | Inventec Corporation | DC power plane structure |
US7839654B2 (en) * | 2007-02-28 | 2010-11-23 | International Business Machines Corporation | Method for ultimate noise isolation in high-speed digital systems on packages and printed circuit boards (PCBS) |
KR100851075B1 (ko) * | 2007-04-30 | 2008-08-12 | 삼성전기주식회사 | 전자기 밴드갭 구조물 및 인쇄회로기판 |
KR100851076B1 (ko) * | 2007-04-30 | 2008-08-12 | 삼성전기주식회사 | 전자기 밴드갭 구조물 및 인쇄회로기판 |
KR100851065B1 (ko) * | 2007-04-30 | 2008-08-12 | 삼성전기주식회사 | 전자기 밴드갭 구조물 및 인쇄회로기판 |
KR100838244B1 (ko) * | 2007-06-22 | 2008-06-17 | 삼성전기주식회사 | 전자기 밴드갭 구조물 및 인쇄회로기판 |
DE102008041072B4 (de) | 2007-08-07 | 2013-04-18 | Samsung Electro - Mechanics Co., Ltd. | Elektromagnetische Bandabstandsstruktur und Schaltungsplatine |
US8310840B2 (en) * | 2007-08-07 | 2012-11-13 | Samsung Electro-Mechanics Co., Ltd. | Electromagnetic bandgap structure and printed circuit board |
KR100920824B1 (ko) * | 2007-09-14 | 2009-10-08 | 삼성전기주식회사 | 인쇄회로기판 및 전자기 밴드갭 구조물의 제조방법 |
KR100913363B1 (ko) * | 2007-09-18 | 2009-08-20 | 삼성전기주식회사 | 멀티 비아를 포함하는 전자기 밴드갭 구조물 및인쇄회로기판 |
US8159832B2 (en) * | 2007-09-21 | 2012-04-17 | Nokia Corporation | Electromagnetic band gap structures and method for making same |
KR100867150B1 (ko) * | 2007-09-28 | 2008-11-06 | 삼성전기주식회사 | 칩 캐패시터가 내장된 인쇄회로기판 및 칩 캐패시터의 내장방법 |
KR100914440B1 (ko) * | 2007-09-28 | 2009-08-28 | 삼성전기주식회사 | 단차가 형성된 전도층을 갖는 인쇄회로기판 |
KR100879375B1 (ko) * | 2007-09-28 | 2009-01-20 | 삼성전기주식회사 | 캐비티 캐패시터가 내장된 인쇄회로기판 |
TWI375499B (en) * | 2007-11-27 | 2012-10-21 | Asustek Comp Inc | Improvement method for ebg structures and multi-layer board applying the same |
JP2009135154A (ja) * | 2007-11-28 | 2009-06-18 | Sony Corp | 電磁波遮蔽具 |
DE102008045055A1 (de) * | 2007-12-07 | 2009-06-10 | Samsung Electro-Mechanics Co., Ltd., Suwon | Elektromagnetische Bandgap-Struktur und Leiterplatte |
KR20090079428A (ko) * | 2008-01-17 | 2009-07-22 | 삼성전자주식회사 | 파워 플레인 및 접지 플레인 노이즈를 감소시키는 구조를갖는 기판 및 이를 포함하는 전자 시스템 |
US8164006B2 (en) * | 2008-03-19 | 2012-04-24 | Samsung Electro-Mechanics Co., Ltd. | Electromagnetic bandgap structure and printed circuit board |
US7733265B2 (en) * | 2008-04-04 | 2010-06-08 | Toyota Motor Engineering & Manufacturing North America, Inc. | Three dimensional integrated automotive radars and methods of manufacturing the same |
US8022861B2 (en) * | 2008-04-04 | 2011-09-20 | Toyota Motor Engineering & Manufacturing North America, Inc. | Dual-band antenna array and RF front-end for mm-wave imager and radar |
US7830301B2 (en) * | 2008-04-04 | 2010-11-09 | Toyota Motor Engineering & Manufacturing North America, Inc. | Dual-band antenna array and RF front-end for automotive radars |
KR101086856B1 (ko) * | 2008-04-16 | 2011-11-25 | 주식회사 하이닉스반도체 | 반도체 집적 회로 모듈 및 이를 구비하는 pcb 장치 |
US20110012697A1 (en) * | 2008-04-22 | 2011-01-20 | Koichi Takemura | Electro-magnetic band-gap structure, method for manufacturing the same, filter element and printed circuit board having embedded filter element |
US8013258B2 (en) * | 2008-06-11 | 2011-09-06 | Mediatek Inc. | Shielding device |
JP5380919B2 (ja) * | 2008-06-24 | 2014-01-08 | 日本電気株式会社 | 導波路構造およびプリント配線板 |
KR100956689B1 (ko) * | 2008-06-27 | 2010-05-10 | 삼성전기주식회사 | 전자기 밴드갭 구조물 및 인쇄회로기판 |
US20100060527A1 (en) * | 2008-09-10 | 2010-03-11 | International Business Machines Corporation | Electromagnetic band gap tuning using undulating branches |
US8288660B2 (en) * | 2008-10-03 | 2012-10-16 | International Business Machines Corporation | Preserving stopband characteristics of electromagnetic bandgap structures in circuit boards |
KR100999550B1 (ko) * | 2008-10-08 | 2010-12-08 | 삼성전기주식회사 | 전자기 밴드갭 구조물 |
US8344503B2 (en) * | 2008-11-25 | 2013-01-01 | Freescale Semiconductor, Inc. | 3-D circuits with integrated passive devices |
KR100999518B1 (ko) * | 2008-11-26 | 2010-12-08 | 삼성전기주식회사 | 전자기 밴드갭 구조물 및 회로 기판 |
KR101046716B1 (ko) * | 2008-11-28 | 2011-07-06 | 삼성전기주식회사 | 전자기 밴드갭 구조물 및 회로 기판 |
KR101018785B1 (ko) * | 2008-11-28 | 2011-03-03 | 삼성전기주식회사 | 전자기 밴드갭 구조물 및 회로 기판 |
US8467737B2 (en) * | 2008-12-31 | 2013-06-18 | Intel Corporation | Integrated array transmit/receive module |
JP5326649B2 (ja) * | 2009-02-24 | 2013-10-30 | 日本電気株式会社 | アンテナ、アレイアンテナ、プリント基板、及びそれを用いた電子装置 |
KR101038236B1 (ko) * | 2009-09-16 | 2011-06-01 | 삼성전기주식회사 | 전자기 밴드갭 구조를 구비하는 인쇄회로기판 |
KR101021552B1 (ko) * | 2009-09-22 | 2011-03-16 | 삼성전기주식회사 | Emi 노이즈 저감 인쇄회로기판 |
KR101023541B1 (ko) * | 2009-09-22 | 2011-03-21 | 삼성전기주식회사 | Emi 노이즈 저감 인쇄회로기판 |
KR101092590B1 (ko) * | 2009-09-23 | 2011-12-13 | 삼성전기주식회사 | 전자기 밴드갭 구조를 구비하는 인쇄회로기판 |
KR20110134200A (ko) * | 2010-06-08 | 2011-12-14 | 삼성전기주식회사 | 전자기 밴드갭 구조물을 포함하는 emi 노이즈 차폐 기판 |
-
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Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5886597A (en) * | 1997-03-28 | 1999-03-23 | Virginia Tech Intellectual Properties, Inc. | Circuit structure including RF/wideband resonant vias |
US20030232603A1 (en) * | 2002-06-12 | 2003-12-18 | Makoto Tanaka | Package device for accommodating a radio frequency circuit |
JP2004022587A (ja) * | 2002-06-12 | 2004-01-22 | Denso Corp | 筐体 |
US20060050010A1 (en) * | 2004-09-08 | 2006-03-09 | Jinwoo Choi | Electromagnetic bandgap structure for isolation in mixed-signal systems |
US20060232949A1 (en) * | 2005-04-18 | 2006-10-19 | Hideki Osaka | Main board for backplane buses |
CN101365293A (zh) * | 2007-08-07 | 2009-02-11 | 三星电机株式会社 | 电磁带隙结构及印刷电路板 |
CN101453828A (zh) * | 2007-12-07 | 2009-06-10 | 三星电机株式会社 | 电磁带隙结构与印刷电路板 |
WO2009082003A1 (ja) * | 2007-12-26 | 2009-07-02 | Nec Corporation | 電磁バンドギャップ素子及びそれを用いたアンテナ並びにフィルタ |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102856304A (zh) * | 2011-06-27 | 2013-01-02 | 中国科学院微电子研究所 | 一种半导体芯片封装结构 |
CN102856304B (zh) * | 2011-06-27 | 2015-06-24 | 成都锐华光电技术有限责任公司 | 一种半导体芯片封装结构 |
CN105340133A (zh) * | 2013-03-15 | 2016-02-17 | 伟创力有限责任公司 | 用于创建完全微波吸收印刷电路板的方法和装置 |
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US20130229779A1 (en) | 2013-09-05 |
DE102009055342B4 (de) | 2013-11-21 |
JP2012138644A (ja) | 2012-07-19 |
TW201105229A (en) | 2011-02-01 |
US8432706B2 (en) | 2013-04-30 |
TWI395542B (zh) | 2013-05-01 |
US20110026234A1 (en) | 2011-02-03 |
DE102009055342A1 (de) | 2011-02-17 |
JP2011035367A (ja) | 2011-02-17 |
KR101007288B1 (ko) | 2011-01-13 |
US8780584B2 (en) | 2014-07-15 |
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