CN101937318A - 用于存储介质的存储控制装置及其数据访问的控制方法 - Google Patents
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Abstract
本发明提供一种用于存储介质的存储控制装置及其数据访问的控制方法。其中用于第一存储介质的存储控制装置,包括:控制器,用于控制所述第一存储介质的数据访问;以及电压侦测器,耦接于所述控制器,用于监视功率信号并在侦测到所述功率信号的异常时使能一侦测信号以告知所述控制器。通过利用本发明,能够及时侦测到功率信号的异常,避免了功率信号异常对存储子***的数据访问造成的损害。
Description
相关申请的交叉引用
本申请的权利要求要求2009年6月30日递交的美国临时申请案No.61/221,569的优先权,且将此申请作为参考。
技术领域
本发明有关于访问一存储介质,尤其有关于具有一控制器的存储控制装置及其相关方法,其中控制器由监视功率信号所得到的侦测信号来运作。
背景技术
一般来说,存储子***的电源(supply power)由主机提供,主机还向存储子***发出读取和写入请求,以从存储子***中读取数据或者将数据写入存储子***。从外部电源获取的功率信号输入到存储子***的内部功率元件(power element)。因此,功率信号的异常可能会严重损害存储子***的数据存储。
以将非易失性存储器(比如闪存)作为存储介质的一个存储子***为例,出于对性能的考虑,用于将主机的逻辑地址转换为非易失性存储器的物理地址的列表通常暂时保存在存储子***的易失性存储器中,其中列表比如闪存转换层(Flash Translation Layer,FTL)列表,易失性存储器比如动态随机存取存储器。然而,存储子***所用功率信号的异常可能会损害易失性存储器中存储的列表的完整性,导致用户数据的缺失。
以将光盘作为存储介质的另一存储子***为例,存储子***的记录(编码)和读取(译码)质量极大地受到功率稳定性的控制。因此,存储子***(比如光驱)所用功率信号的异常可能会使数据访问性能严重退化。此外,当存储子***运作于写入模式下以在光盘上通过不稳定的写入功率发出激光束时,功率信号的异常可能还会损害光盘。
发明内容
有鉴于此,本发明提供一种用于存储介质的存储控制装置及其数据访问的控制方法。
本发明一个实施例提供一种用于第一存储介质的存储控制装置,包括:控制器,用于控制所述第一存储介质的数据访问;以及电压侦测器,耦接于所述控制器,用于监视功率信号并在侦测到所述功率信号的异常时使能一侦测信号以告知所述控制器。
本发明另一个实施例提供一种用于第一存储介质的存储控制装置,包括:电压侦测器,用于监视功率信号以产生侦测信号;以及控制器,耦接于所述电压侦测器,用于控制所述第一存储介质的数据访问;其中当所述侦测信号表明所述功率信号的电压电平落入第一电压范围内时,所述控制器则进入第一运作状态,当所述侦测信号表明所述功率信号的电压电平落入不同于所述第一电压范围的第二电压范围内时,所述控制器则进入不同于所述第一运作状态的第二运作状态。
本发明另一个实施例提供一种对存储介质的数据访问进行控制的控制器的控制方法,包括:监视功率信号;当所述功率信号的电压电平落入第一电压范围内时,则使所述控制器运作于第一运作状态;以及当所述功率信号的电压电平从所述第一电压范围落入第二电压范围内时,则使所述控制器运作于不同于所述第一运作状态的第二运作状态。
通过利用本发明,能够及时侦测到功率信号的异常,避免了功率信号异常对存储子***的数据访问造成的损害。
如下详述其他实施例和优势。本部分内容并非对发明作限定,本发明范围由权利要求所限定。
附图说明
图1是根据本发明的存储子***的第一实施例的示意图。
图2是图1所示的电压侦测器的一个示范性实施例的电路示意图。
图3是侦测信号与功率信号之间的关系示意图。
图4是包含电压侦测器和控制器的控制器芯片的示意图。
图5是根据本发明的存储子***的第二实施例的示意图。
图6是包含电压侦测器和控制器的控制器芯片的示意图。
图7是根据本发明一存储子***中控制器的通用控制方法流程图。
具体实施方式
在权利要求书及说明书当中使用了某些词汇来指称特定的元件。所属领域中的普通技术人员应可理解,硬件制造商可能会用不同的名词来称呼同一个元件。本发明的权利要求书及说明书并不以名称的差异来作为区分元件的方式,而是以元件在功能上的差异来作为区分的准则。在通篇说明书及后续的请求项当中所提及的“包含”为开放式的用语,故应解释成“包含但不限定于”。以外,“耦接”一词在此包含任何直接及间接的电气连接手段。因此,若文中描述第一装置耦接于第二装置,则代表该第一装置可直接电气连接于该第二装置,或通过其它装置或连接手段间接地电气连接至该第二装置。
本发明通过监视功率信号来侦测其异常,且在侦测到功率信号的异常时告知存储子***的控制器。这样,存储子***的控制器能够通过接收功率异常通知来采取动作。为了更加清楚的理解本发明,如下例举多个示范性实施例对发明进行说明。
图1是根据本发明的存储子***的第一实施例的示意图。示范性存储子***100包括存储控制装置102、第一存储介质104和调节器106,其中存储控制装置102包括控制器108、电压侦测器110和第二存储介质112。举例来说,第一存储介质104可以是非易失性存储介质(例如闪存),第二存储介质112可以是易失性存储介质,其中易失性存储介质例如是动态随机存取存储器(DRAM),控制器108是闪存存储器控制器。调节器106从主机116处接收外部电源Pext,并相应地产生功率信号Pin,以便为存储子***100中包含的其他元件提供动力。控制器108经由主机接口114与主机116通信,且控制器108用于控制第一存储介质104的数据访问(读取/记录)。举例来说,若控制器108自主机116接收一读取请求,作为对读取请求的响应,控制器108则通过从第一存储介质104中读取存储的数据并将读出的数据传送至主机116。此外,若控制器108自主机116接收一写入请求和需要记录的数据,作为对写入请求的响应,控制器108则将接收的数据写入第一存储介质104。
电压侦测器110耦接于控制器108,用于监视存储子***100的功率状态(power status)。在本示范性实施例中,电压侦测器110通过监视调节器106所产生的功率信号Pin(即控制器108接收的功率信号)来识别存储子***100的实时功率状态。若侦测到功率信号Pin的异常,电压侦测器110则输出侦测信号SD至控制器108,若未侦测到功率信号Pin的异常,电压侦测器110则不输出侦测信号SD。
图2是图1所示的电压侦测器110的一个示范性实施例的电路示意图。电压侦测器110包括分压器202、电压产生器204和比较器206。分压器202根据电阻器R1和R2的电阻值对功率信号Pin的电压电平Vin进行分压,并产生一监视电压VM至比较器206。监视电压VM可简单表示如下:电压产生器204用于提供独立供应的(supply-independent)参考电压VREF至比较器206。比较器206比较监视电压VM与参考电压VREF以使侦测信号SD有效/无效(assert/deassert)。举例来说,若发现监视电压VM低于参考电压VREF,则意味着电压电平Vin低于预设阈值VTH(图中未示),比较器206产生逻辑高(logic-high)输出以使能侦测信号SD(使侦测信号SD有效)。然而,若发现监视电压VM高于参考电压VREF,则意味着电压电平Vin高于预设阈值VTH,比较器206产生逻辑低(logic-low)输出以使侦测信号SD无效。这样,侦测信号SD可用于表明功率信号Pin的电压电平Vin是在第一电压范围内(比如VTH<Vin≤VR,其中VR代表功率信号Pin的常规电压电平)还是第二电压范围内(比如0<Vin<VTH)。
在上述的例子中,当发现功率信号Pin的电压电平Vin低于预设阈值VTH时,电压侦测器110则侦测到功率异常的发生。然而,在电压侦测器110的另一设计中,当发现功率信号Pin的电压电平Vin高于预设阈值VTH时才能侦测到功率异常的发生。此仍遵循本发明的精神,属于发明所保护的范畴。
控制器108参考侦测信号SD以将其运作状态转换至正常状态或者功率异常状态。图3是侦测信号SD与功率信号Pin之间的关系示意图。从图中可以看到,在功率信号Pin的电压电平Vin低于预设阈值VTH之前,控制器108运作在正常状态下。当功率信号Pin的电压电平Vin低于预设阈值VTH时,电压侦测器110判定侦测到功率信号Pin的异常并使能侦测信号SD以告知控制器108。因此,通过接收电压侦测器110使能的侦测信号SD,控制器108离开正常状态,进入功率异常状态。在使能侦测信号SD之后,若功率信号Pin的电压电平Vin增加到超过默认阈值VTH,电压侦测器110则判定未侦测到功率信号Pin的异常并相应地使侦测信号SD无效。因此,当控制器108获知侦测信号SD被电压侦测器110无效时,控制器108则离开异常状态,进入功率正常状态。
在本实施例中,为了避免由于功率异常导致存储子***100中存储的数据缺失,控制器108进一步对电压侦测器110使能的侦测信号SD作出响应。举例来说,作为缓冲器的第二存储介质112可由一易失性存储介质实现。因此,***信息和用户数据DATA_U在第二存储介质112中缓冲以实现更好的性能,其中***信息比如用于将主机116的逻辑地址转换为第一存储介质104的物理地址的列表TB,DATA_U比如等待记录到第一存储介质104中的数据或者等待传递至主机116的读出数据。一种情况中,第一存储介质104是一闪存存储器,列表TB是闪存的FTL列表。控制器108的预设动作可包括将第二存储介质112中存储的数据的备份记录到第一存储介质104中及/或拒绝请求,比如主机116发出的用于访问第一存储介质104的读请求或写请求。第二存储介质112中存储的数据的备份可包括列表TB及/或用户数据DATA_U。
此外,若第一存储介质104包括至少具有不同固有访问速度的第一存储区域SR_1和第二存储区域SR_2。第二存储介质112中存储的数据的备份将存储至具有较快访问速度的一个存储区域中(例如第一存储区域SR_1)。举例来说,第一存储介质104可由一闪存存储器实现,该闪存在相同区块中具有第一页群组(page group)和第二页群组,其中第一页群组中包含的每个页的程序时间(program time)短于第二页群组中包含的每个页的程序时间。因此,第二存储介质112中存储的数据的备份将存储在第一页群组中选择的页中。
如图1所示,电压侦测器110和控制器108是存储子***100中的独立元件(individual element)。然而,电压侦测器110可嵌入到控制器108中形成一个单独元件。请参照图4,图4是包含电压侦测器110和控制器108的控制器芯片400的示意图。因此,控制器芯片400具有电压侦测器110和控制器108的功能,且可用于图1所示的存储子***100中。此种存储子***的设计仍遵循本发明的精神,属于本发明保护的范畴。
图5是根据本发明的存储子***的第二实施例的示意图。存储子***500包括存储控制装置502、存储介质504、前述调节器106和访问机构506。其中存储控制装置502包括控制器508和前述电压侦测器110。调节器106从主机116处接收电源Pext,并相应地产生功率信号Pin,以便为存储子***500中包含的其他元件提供动力。控制器508经由主机接口114与主机116通信,且控制器508用于控制第一存储介质104的数据访问。存储子***100和500的主要区别在于控制器508不能直接访问存储介质504。举例来说,需要机械装置来访问存储介质504。因此,控制器508通过存储机构506从存储介质504中读取数据或将数据写入存储介质504。在本示范性实施例中,存储介质104是一光存储介质(比如光盘),访问机构506包括光学读取头(opticalpick-up unit,OPU)510和伺服***512。然而,此仅为说明发明的目的。任何其他已知架构均可用于实现对光存储介质进行访问的访问机构506。此外,光存储领域的技术人员可轻易了解将数据记录到光存储介质上和从光存储介质中读取数据的细节,此处为简洁,对访问机构506不作赘述。
如上所述,电压侦测器110能够用于监视存储子***的功率状态(powerstatus),并告知控制器508存储子***的实时功率状态。在本示范性实施例中,电压侦测器110通过监视调节器106所产生的功率信号Pin(即控制器508接收的功率信号Pin)。相似地,在侦测到功率信号Pin异常时,电压侦测器110会使能侦测信号SD以告知控制器508。电压侦测器110的细节已于上述段落中描述,此处为简洁,不再赘述。
相似于图1所示的控制器108,控制器508从电压侦测器110处接收侦测信号SD,并根据侦测信号SD将其运作状态转换至正常状态或者功率异常状态,如图3所示。在本实施例中,为了提升存储子***500的数据访问性能及/或防止由于功率异常导致的存储介质(如光盘)504的损坏,控制器508进一步对电压侦测器110使能的侦测信号SD作出默认动作。举例来说,控制器508所采取的预设动作包括降低对访问存储介质504的请求的处理速度、暂停存储介质504的当前数据访问及/或拒绝请求,其中降低动作比如降低记录(编码)或读取(译码)速度以减少总体***功率损耗;暂停动作比如假使由于不规则的写入功率导致光盘损坏,则暂停记录处理;拒绝动作比如拒绝主机116发出的用于访问第一存储介质504的读取请求或写入请求。
如图5所示,电压侦测器110和控制器508是存储子***500中的独立元件。然而,电压侦测器110可嵌入到控制器508中形成一个单独元件。请参照图6,图6是包含电压侦测器110和控制器508的控制器芯片600的示意图。因此,控制器芯片600具有电压侦测器110和控制器508的功能,且可用于图5所示的存储子***500中。此种存储子***的设计仍遵循本发明的精神,属于本发明保护的范畴。
请注意,存储介质104可以是磁存储介质,比如硬盘,访问机构506可包含访问磁存储介质所需的元件。此种设计仍遵循本发明的精神,属于本发明保护的范畴。
图7是根据本发明一存储子***中控制器的通用控制方法的流程图。若结果实质上相同,则并不需完全按照图7所示的步骤执行。控制示范性控制器108或508操作的通用控制方法包括如下步骤:
步骤700:开始。
步骤702:控制器进入第一运作状态(比如正常状态)以控制存储介质(比如非易失性存储介质)的数据访问。
步骤704:电压侦测器监视功率信号以侦测其异常,并相应地产生侦测信号,其中,当侦测到功率信号的异常时使能侦测信号,在未侦测到功率信号的异常时使侦测信号无效。
步骤706:控制器接收侦测信号,并检查侦测信号的逻辑电平。若侦测信号有效,则表明发生了功率异常,流程进行至步骤708;若侦测信号无效,则表明未发生功率异常,流程返回至步骤702。
步骤708:控制器进入第二运作状态(比如功率异常状态)以采取预设行动。流程进行至步骤704。
在阅读了如上段落关于示范性存储子***100和500的内容后,习知技艺者可轻易了解图7所示的每个步骤的详细情况,此处为简洁,不再赘述。
虽然本发明已就较佳实施例揭露如上,然其并非用以限定本发明。本发明所属技术领域中普通技术人员,在不脱离本发明的精神和范围内,当可作各种的变更和润饰。因此,本发明的保护范围当视之前的权利要求书所界定为准。
Claims (24)
1.一种用于第一存储介质的存储控制装置,其特征在于,包括:
控制器,用于控制所述第一存储介质的数据访问;以及
电压侦测器,耦接于所述控制器,用于监视功率信号并在侦测到所述功率信号的异常时使能侦测信号以告知所述控制器。
2.如权利要求1所述用于第一存储介质的存储控制装置,其特征在于,所述控制器在被告知所述侦测信号时进一步对所述功率信号的异常采取默认动作。
3.如权利要求2所述用于第一存储介质的存储控制装置,其特征在于,所述存储控制装置更包括:
第二存储介质,耦接于所述控制器,用于存储所述控制器可访问的数据;
其中所述预设动作包括将存储在所述第二存储介质中的所述数据的备份记录到所述第一存储介质中。
4.如权利要求3所述用于第一存储介质的存储控制装置,其特征在于,所述第二存储介质中的所述数据的所述备份包括列表,所述列表用于将主机的逻辑地址转换为所述第一存储介质的物理地址。
5.如权利要求3所述用于第一存储介质的存储控制装置,其特征在于,所述第二存储介质中的所述数据的所述备份包括用户数据。
6.如权利要求3所述用于第一存储介质的存储控制装置,其特征在于,所述第一存储介质包括第一存储区域和第二存储区域,所述第一存储区域的固有访问速度快于所述第二存储区域的固有访问速度;且所述第二存储介质中存储的所述数据的所述备份存储至所述第一存储区域中。
7.如权利要求2所述用于第一存储介质的存储控制装置,其特征在于,所述默认动作包括降低对访问所述第一存储介质的请求的处理速度、暂停所述第一存储介质的当前数据访问及/或拒绝所述主机发出的用于访问所述第一存储介质的请求。
8.如权利要求2所述用于第一存储介质的存储控制装置,其特征在于,所述控制器经由主机接口与主机通信。
9.如权利要求1所述用于第一存储介质的存储控制装置,其特征在于,在使能所述侦测信号之后,若未侦测到所述功率信号的异常,所述电压侦测器进一步使所述侦测信号无效。
10.如权利要求1所述用于第一存储介质的存储控制装置,其特征在于,当监视的功率信号的电压电平低于预设阈值时,所述电压侦测器判定侦测到所述功率信号的异常。
11.如权利要求1所述用于第一存储介质的存储控制装置,其特征在于,所述控制器和所述电压侦测器整合在一个控制器芯片中。
12.如权利要求1所述用于第一存储介质的存储控制装置,其特征在于,所述第一存储介质是非易失性存储介质。
13.如权利要求12所述用于第一存储介质的存储控制装置,其特征在于,所述非易失性存储介质是非易失性存储器或光存储介质。
14.一种用于第一存储介质的存储控制装置,其特征在于,包括:
电压侦测器,用于监视功率信号以产生侦测信号;以及
控制器,耦接于所述电压侦测器,用于控制所述第一存储介质的数据访问;其中当所述侦测信号表明所述功率信号的电压电平落入第一电压范围内时,所述控制器则进入第一运作状态;当所述侦测信号表明所述功率信号的电压电平落入不同于所述第一电压范围的第二电压范围内时,所述控制器则进入不同于所述第一运作状态的第二运作状态。
15.如权利要求14所述用于第一存储介质的存储控制装置,其特征在于,所述存储控制装置更包括:
第二存储介质,耦接于所述控制器,用于存储所述控制器可访问的数据;
其中当所述控制器运作于所述第二运作状态下时,所述控制器则将所述第二存储介质中存储的所述数据的备份记录到所述第一存储介质中。
16.如权利要求15所述用于第一存储介质的存储控制装置,其特征在于,所述第二存储介质中存储的所述数据的所述备份包括列表,所述列表用于将主机的逻辑地址转换为所述第一存储介质的物理地址。
17.如权利要求15所述用于第一存储介质的存储控制装置,其特征在于,所述第二存储介质中存储的所述数据的所述备份包括用户数据。
18.如权利要求15所述用于第一存储介质的存储控制装置,其特征在于,所述第一存储介质包括第一存储区域和第二存储区域,所述第一存储区域的固有访问速度快于所述第二存储区域的固有访问速度;且所述第二存储介质中存储的所述数据的所述备份存储至所述第一存储区域。
19.如权利要求14所述用于第一存储介质的存储控制装置,其特征在于,当所述控制器运作于所述第二运作状态下时,所述控制器降低对访问所述第一存储介质的请求的处理速度、暂停所述第一存储介质的当前数据访问及/或拒绝所述主机发出的用于访问所述第一存储介质的请求。
20.如权利要求14所述用于第一存储介质的存储控制装置,其特征在于,所述控制器经由主机接口与主机通信。
21.如权利要求14所述用于第一存储介质的存储控制装置,其特征在于,所述控制器和所述电压侦测器整合在一个控制器芯片中。
22.如权利要求14所述用于第一存储介质的存储控制装置,其特征在于,所述第一存储介质是非易失性存储介质。
23.如权利要求22所述用于第一存储介质的存储控制装置,其特征在于,所述非易失性存储介质是非易失性存储器或光存储介质。
24.一种数据访问的控制方法,用于控制控制器对存储介质的数据访问,其特征在于,所述数据访问的控制方法包括:
监视功率信号;
当所述功率信号的电压电平落入第一电压范围内时,则使所述控制器运作于第一运作状态;以及
当所述功率信号的电压电平从所述第一电压范围落入第二电压范围内时,则使所述控制器运作于不同于所述第一运作状态的第二运作状态。
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Also Published As
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TW201101026A (en) | 2011-01-01 |
US20100332922A1 (en) | 2010-12-30 |
TWI457937B (zh) | 2014-10-21 |
CN101937710A (zh) | 2011-01-05 |
TWI406126B (zh) | 2013-08-21 |
TWI449052B (zh) | 2014-08-11 |
CN101937724B (zh) | 2013-11-06 |
CN101937724A (zh) | 2011-01-05 |
US20100332951A1 (en) | 2010-12-30 |
US8458566B2 (en) | 2013-06-04 |
TW201101309A (en) | 2011-01-01 |
TW201101320A (en) | 2011-01-01 |
US20100332887A1 (en) | 2010-12-30 |
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