CN101395707B - 部件层叠方法 - Google Patents

部件层叠方法 Download PDF

Info

Publication number
CN101395707B
CN101395707B CN200780007045XA CN200780007045A CN101395707B CN 101395707 B CN101395707 B CN 101395707B CN 200780007045X A CN200780007045X A CN 200780007045XA CN 200780007045 A CN200780007045 A CN 200780007045A CN 101395707 B CN101395707 B CN 101395707B
Authority
CN
China
Prior art keywords
adhesive layer
semiconductor device
circuit board
component
parts
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN200780007045XA
Other languages
English (en)
Other versions
CN101395707A (zh
Inventor
土师宏
大园满
笠井辉明
野野村胜
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Publication of CN101395707A publication Critical patent/CN101395707A/zh
Application granted granted Critical
Publication of CN101395707B publication Critical patent/CN101395707B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75Apparatus for connecting with bump connectors or layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/50Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29005Structure
    • H01L2224/29007Layer connector smaller than the underlying bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/2919Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32135Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/32145Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83191Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83193Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/8385Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83855Hardening the adhesive by curing, i.e. thermosetting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/8385Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83855Hardening the adhesive by curing, i.e. thermosetting
    • H01L2224/83856Pre-cured adhesive, i.e. B-stage adhesive
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/922Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222Sequential connecting processes
    • H01L2224/92242Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92247Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503Stacked arrangements of devices
    • H01L2225/0651Wire or wire-like electrical connections from device to substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503Stacked arrangements of devices
    • H01L2225/06575Auxiliary carrier between devices, the carrier having no electrical connection structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0657Stacked arrangements of devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00013Fully indexed content
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01004Beryllium [Be]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01018Argon [Ar]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01057Lanthanum [La]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06Polymers
    • H01L2924/0665Epoxy resin
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06Polymers
    • H01L2924/078Adhesive characteristics other than chemical
    • H01L2924/07802Adhesive characteristics other than chemical not being an ohmic electrical conductor

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Die Bonding (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Adhesives Or Adhesive Processes (AREA)
  • Wire Bonding (AREA)

Abstract

可以在热压着工艺中改善生产率的部件接合方法、部件层叠方法和部件接合结构。在下表面上形成有热固性粘合层(13c)的半导体部件(13)按照下述方式接合到表面上形成有树脂层的基板(5)。通过等离子体处理预先改性基板(5)的树脂表面(5a)以改善润湿性。接着,用具有加热器的部件保持嘴(12)保持该半导体部件(13),并使粘合层(13c)接触表面改性的树脂层。粘合层(13c)通过加热器被加热并热固化。因此,粘合层(13c)和树脂表面(5a)之间的粘合力改善,且在粘合层(13c)完全固化之前,部件保持嘴(12)可以与半导体部件(13)分离。部件接合所需的时间可以缩短,从而实现热压着工艺中生产率的改善。

Description

部件层叠方法
技术领域
本发明涉及将具有热固性粘合层的半导体部件接合到表面上形成有树脂层的电路板的部件接合方法。此外,本发明还涉及将多个部件层叠在电路板上的部件层叠方法,其中该多个部件的每一个具有形成于其一个表面上的树脂层和形成于其另一表面上的热固性粘合层。 
背景技术
在制造半导体装置的工艺中,从半导体晶片切割下来的每个半导体器件安装在诸如引线框或挠性电路板的电路板上,接合剂插在半导体器件和电路板之间。作为将半导体器件安装在电路板上的工艺,通常采用将半导体器件安装在预先涂布于电路板上的接合剂的方法,不过最近随着半导体器件薄型化,难以直接采用该传统方法。 
具体而言,为了令人满意地将半导体器件接合到电路板,需要将薄膜形状的接合剂插在电路板和半导体器件之间。然而,当挠性的且刚性低的薄膜半导体器件安装在接合剂上时,由于半导体器件本身的刚性而难以压着和展开预先涂布的接合剂。此外,当薄膜半导体器件压着在接合剂上时,接合剂容易在半导体器件的上表面上展开,且因此安装工具容易被污染。因此,正常的部件保持操作受到干扰的问题容易发生。 
因此,近年来,已经采用在半导体器件本身上形成粘合层的方法。在该方法中,由半硬化接合树脂形成的膜状的管芯附着膜(die attach fi1m)预先贴着到半导体器件尚未分离成单片的半导体晶片,且因此粘合层形成于半导体器件本身上(例如,见专利文献1)。采用这种配置,半导体器件通过该树脂层被加固,且因此薄膜半导体器件可以容易地处理。此外,可以消除在将半导体器件安装在电路板上时由接合剂引起的问题。 
专利文献1:特开2001-185563号公报 
发明内容
本发明解决的问题
然而,在上述已知文献中示例性示出的半导体器件安装方法中,需要维持这样的状态,其中半导体器件通过热压着工具压着在电路板上从而在预定时间内热固化该接合树脂。视接合树脂应硬化的程度,通常需要花费二次时间维持该状态,使得难以大幅缩短用时。这使得难以缩短热压着工艺的时间,且干扰生产率提高的因素也是如此。此外,在将薄膜半导体部件层叠在电路板上的芯片上芯片(chip-on-chip)结构安装方法中,这尤为显著。 
因此,本发明的目的是提供一种可以在热压着工艺中改善生产率的部件接合方法和部件层叠方法。 
解决问题的手段
根据本发明的部件接合方法是通过将粘合层***半导体部件和电路板之间而将具有热固性粘合层的半导体部件接合到表面上形成有树脂层的电路板的部件接合方法。该部件接合方法包括如下步骤:通过对该树脂层进行等离子体处理来改性该树脂层的表面;使用部件保持嘴保持该半导体部件;使该粘合层接触到表面改性的树脂层;以及使用加热器热固化该粘合层。 
根据本发明的部件层叠方法是将多个部件层叠在电路板上的部件层叠方法,该多个部件的每一个在一个表面上形成有树脂层且在另一表面上形成有热固性粘合层,且该多个部件至少包括第一部件和第二部件。该部件层叠方法包括如下步骤:将该第一部件安装在该电路板上;通过对该第一部件的树脂层进行等离子体处理来改性该第一部件的树脂层的表面;使用部件保持嘴保持该第二部件;使该第二部件的粘合层接触到该第一部件的表面改性的树脂层;以及使用加热器热固化该第二部件的粘合层。 
根据本发明的部件接合结构是通过将粘合层***半导体部件和电路板之间而将具有热固性粘合层的半导体部件接合到表面上形成有树脂层的电路板的部件接合结构。该部件接合结构通过如下步骤形成:通过对该树脂层进行等离子体处理来改性该树脂层的表面;使用部件保持嘴保持该半导体部件;使该粘合层接触到表面改性的树脂层;以及使用加热器热固化该粘合层。 
本发明的效果
根据本发明,树脂层的表面通过等离子体处理改性,且因此可以改善树脂层和预先形成于半导体部件上的粘合层之间的粘合力。此外,通过减小部件接合所需的时间,可以改善热压着工艺中的生产率。
附图说明
图1为解释本发明实施例1的部件接合方法的工艺的图示。 
图2为解释本发明实施例1的部件接合方法的工艺的图示。
图3为解释本发明实施例1的部件接合方法的工艺的图示。 
图4为解释本发明实施例1的部件接合方法的工艺的图示。 
图5为解释本发明实施例1的部件接合方法的工艺的图示。 
图6为解释本发明实施例1的部件接合方法的工艺的图示。 
图7为解释本发明实施例2的部件层叠方法的工艺的图示。 
图8为解释本发明实施例2的部件层叠方法的工艺的图示。 
图9为解释本发明实施例2的部件层叠方法的工艺的图示。 
图10为解释本发明实施例2的部件层叠方法的工艺的图示。 
附图标记说明 
1:等离子体处理装置 
5:电路板 
9:部件安装装置 
12:部件保持嘴 
13:第一半导体部件(第一部件) 
14:固化炉 
15、25:2层层叠体 
13a、23a、26a:半导体芯片 
13b、23b、26b:树脂层 
13c、23c、26c:粘合层 
23:第二半导体部件 
24:间隔物(第二部件) 
26:第三半导体部件 
27:3层层叠体 
具体实施方式
(实施例1) 
图1、2、3、4、5和6为解释本发明实施例1的部件接合方法的工艺的 图示。在此处所示的部件接合中,其上预先形成有热固性粘合层的半导体部件通过热压着而接合并且安装在具有诸如聚酰亚胺或玻璃树脂的树脂层的电路板上。 
在热压着之前,首先,为了改善电路板表面的润湿性,通过等离子体处理装置进行用于改性电路板表面的等离子体处理。如图1(a)所示,等离子体处理装置1配置成使得下电极3和上电极4在由气密性真空室1a形成的处理室2内布置成彼此相对。进行表面改性处理的电路板5置于下电极3上,树脂层的表面朝上。 
在等离子体处理中,处理室2的内部通过真空排气部6被抽气和减压,且随后等离子体发生气体通过气体供给部7供给到处理室2内。随后,高频电压通过高频电源8施加在下电极3和上电极4之间。这种情况下,对于等离子体发生气体,采用氧气气体或者氩气气体。采用这种配置,如图1(b)所示,在处理室2内产生氧气气体等离子体或者氩气气体等离子体,并对形成于电路板5表面上的树脂层进行等离子体处理。通过进行等离子体处理,树脂层的表面被改性,其表面的润湿性改善。具体而言,在该实施例中,通过使用氧气气体或者氩气气体作为等离子体发生气体的等离子体处理来改性形成于电路板5表面上的树脂层的表面。 
现在描述表面改性。构成形成于电路板5上的树脂层的诸如聚酰亚胺的树脂是由各种有机键形成。在该树脂层内,在包括氧、氢、碳的原子之间存在以独特形式结合的大量有机键,例如碳-碳键基团(C-C)或羰基基团(C=O)等。每个有机键具有独特的键能,且当从外部施加大于该键能的能量时,有机键分解。 
在用于表面改性的等离子体处理中,在树脂层中存在的多种有机键中,等离子体处理的条件设置为能够选择性地除去除了亲水有机键基团诸如羰基基团以外的键基团。具体而言,通过控制由等离子体产生的带电粒子的能量,位于能够留下具有大键能的有机键基团例如羰基基团并选择性地除去具有低键能的碳-碳键基团等的能量区域内的带电粒子被致使碰撞。采用这种配置,电路板5的树脂表面层内的亲水有机键基团诸如羰基基团的比例增大,且其润湿性大幅增加。 
随后,表面改性之后的电路板5送到部件安装装置9,通过传送机构11传送,并固定在部件安装位置,如图2(a)所示。部件安装装置9具有将安 装对象部件压着在电路板5上的功能,其中安装对象部件是由具有加热器的部件保持嘴12保持。此外,部件保持嘴12最初保持第一半导体部件13。再者,传送机构11还根据需要而具有加热器。 
如图2(b)所示,第一半导体部件13配置成使得粘合层13c形成于半导体芯片13a的下表面上且树脂层13b形成于半导体芯片13a的上表面上。粘合层13c是由半硬化的热固性树脂制成。这种情况下,由半硬化树脂形成的具有片状的管芯附着膜贴着到半导体芯片13a尚未分离成单片的半导体晶片,且粘合层由此形成。保持第一半导体部件13的部件保持嘴12移动到电路板5上,且第一半导体部件13置于安装位置上。 
接着,如图2(c)所示,保持第一半导体部件13的部件保持嘴12下降,且粘合层13c直接接触到位于电路板5表面上的表面改性的树脂层。随后,如图2(d)所示,在第一半导体部件13被内藏于部件保持嘴12内的加热器加热的同时,第一半导体部件13压着在电路板5上。采用这种配置,半硬化状态的粘合层13c热固化。这种情况下,由于通过改性电路板5的树脂表面5a而在整个工艺中大幅增大了润湿性,半硬化状态的粘合层13c在树脂表面5a上迅速流动,且令人满意地贴着在树脂表面5a上而在粘合层内不残留气泡。 
在经过预定热压着时间之后,如图3(a)所示,部件保持嘴12从电路板5上升,且与第一半导体部件13分离。这种情况下,由于粘合层13c通过紧密地贴着到树脂表面5a而不会剥落和偏移,部件保持嘴12在粘合层13c完全热固化之前上升,且可以与第一半导体部件13分离。采用这种配置,热压着时间缩短至约0.2秒,而在使用管芯附着膜的传统部件接合工艺中热压着时间需要好几秒。因此可以大幅提高生产率。 
随后,如图3(b)所示,其他安装对象的第一半导体部件13类似地通过热压着接合到电路板5,所有第一半导体部件13的热压着完成,且随后对电路板5进行固化工艺。也就是说,完成热压着之后的电路板5置于固化炉14内,且在预定固化温度维持预定时间。由此,粘合层13c的热固化完成,且第一半导体部件13与电路板5的接合完成。此外,当热固化反应在如图2(d)所示的热压着工艺中充分进行时,图3(c)所示的另外固化工艺可以省略。 
随后,与第一半导体部件13接合的电路板5再次送到等离子体处理装 置1,且如图4(a)所示,采用第一半导体部件13朝上的姿态置于真空室1a内的下电极3上。随后,如图4(b)所示,等离子体放电发生于处理室2内,且因此由树脂制成的树脂层13b的上表面通过该等离子体处理被改性。随后,表面改性之后的电路板5再次送到部件安装装置9,如图5(a)所示,并由传送机构11保持。 
接着,如图5(b)所示,保持第二半导体部件23的部件保持嘴12移动到电路板5上,且其位置调整到第一半导体部件13的位置。第二半导体部件23为具有与第一半导体部件13相同配置的半导体部件,且配置成使得粘合层23c形成于半导体芯片23a下表面上且树脂层23b形成于半导体芯片23a上表面上。粘合层23c与粘合层13c类似地通过贴着管芯附着膜而形成。此外,第二半导体部件23的外部尺寸设置为比第一半导体部件13更小,从而不干扰在第二半导体部件23层叠于第一半导体部件13上的状态下第一半导体部件13的引线接合。 
接着,如图5(c)所示,保持第二半导体部件23的部件保持嘴12下降,且粘合层23c直接接触到第一半导体部件13表面上的表面改性的树脂层13b。接着,如图5(d)所示,在第二半导体部件23被内藏于部件保持嘴12内的加热器加热的同时,第二半导体部件23压着在第一半导体部件13上。采用这种配置,半硬化状态的粘合层23c热固化。这种情况下,由于通过改性第一半导体部件13的树脂表面13d而在整个工艺中大幅增大了润湿性,半硬化状态的粘合层23c在树脂表面13d上迅速流动,且令人满意地贴着在树脂表面13d上。 
随后,在经过预定热压着时间之后,如图6(a)所示,部件保持嘴12上升,且与第二半导体部件23分离。采用这种配置,其中第一半导体部件13和第二半导体部件23层叠的2层层叠体15形成于电路板5上。这种情况下,类似于图2(d),由于粘合层23c通过紧密地贴着到树脂表面13d而不会剥落和偏移,部件保持嘴12在粘合层23c完全热固化之前上升,且可以与第二半导体部件23分离。采用这种配置,类似地,热压着时间缩短,且因此可以大幅提高生产率。 
随后,如图6(b)所示,类似地,在电路板5上其他2层层叠体15的形成完成,且随后对电路板5进行固化工艺。也就是说,2层层叠体15的形成完成之后的电路板5置于固化炉14内,且在预定固化温度维持预定时间。 由此,粘合层23c的热固化完成,且2层层叠体15的形成完成。此外,当热固化反应在如图5(d)所示的热压着工艺中充分进行时,图6(c)所示的另外固化工艺可以省略。 
随后,其上形成有2层层叠体15的电路板5送到引线接合工艺,在半导体芯片13a和23a的***部上形成的连接端子通过接合引线16连接到电路板5的电极,如图6(d)所示,且因此具有芯片上芯片结构的安装体完全形成,其中在该安装体中,两个电子部件层叠在电路板5上。 
如上所述,在用于形成具有芯片上芯片结构的安装体的部件接合中,通过等离子体处理进行树脂层的表面改性,因此可以改善树脂层与预先形成于半导体部件上的粘合层之间的粘合力。因此,与使用管芯附着膜进行部件接合时所应用的传统工艺相比,通过大幅缩短部件接合所需的时间,可以改善热压着工艺中的生产率。 
(实施例2) 
图7、8、9和10为解释本发明实施例2的部件层叠方法的工艺的图示。在该部件层叠方法中,多个部件层叠在电路板5上,其中该多个部件的每一个在其一个表面上形成有树脂层且在其另一表面上形成有热固性粘合层。在实施例2中示出这样的例子,其中层叠有两个半导体部件,间隔物24夹置于该两个半导体部件之间。 
在图7(a),与实施例1所示相同的第一半导体部件13接合在电路板5上,电路板5由部件安装装置9的传送机构11保持。与实施例1中图1至4所示方法类似地,第一半导体部件13接合到电路板5。 
接着,如图7(b)所示,保持间隔物24的部件保持嘴12移动到电路板5上,且其位置调整到第一半导体部件13的位置。在具有相似外部尺寸的两个半导体部件层叠的配置的半导体装置中,间隔物24用于夹置于两个部件之间,以保证用于下层部件的引线接合的间隙。间隔物24配置成使得粘合层24b形成于由树脂制成的树脂板24a的下表面上。粘合层24b与粘合层13c类似地通过贴着管芯附着膜而形成。 
接着,如图7(c)所示,保持间隔物24的部件保持嘴12下降,且粘合层24b直接接触到第一半导体部件13表面上的表面改性的树脂层13b。接着,如图7(d)所示,在间隔物24被内藏于部件保持嘴12内的加热器加热的同时,间隔物24压着在第一半导体部件13上。采用这种配置,半硬化状态的 粘合层24b热固化。这种情况下,由于通过改性第一半导体部件13的树脂表面13d而在整个工艺中大幅增大了润湿性,半硬化状态的粘合层24d在树脂表面13d上迅速流动,且令人满意地贴着在树脂表面13d上。 
随后,在经过预定热压着时间之后,如图8(a)所示,部件保持嘴12上升,且与间隔物24分离。采用这种配置,其中第一半导体部件13和间隔物24层叠的2层层叠体25形成于电路板5上。这种情况下,类似于图2(d),由于粘合层24b通过紧密地贴着到树脂表面13d而不会剥落和偏移,部件保持嘴12在粘合层24b完全热固化之前上升,且可以与间隔物24分离。采用这种配置,类似地,热压着时间缩短,且因此可以大幅提高生产率。 
随后,如图8(b)所示,类似地,在电路板5上其他2层层叠体25的形成完成,且随后对电路板5进行固化工艺。也就是说,2层层叠体25的形成完成之后的电路板5置于固化炉14内,且在预定固化温度维持预定时间。由此,粘合层24b的热固化完成,且2层层叠体25的形成完成。 
随后,其上形成有2层层叠体25的电路板5再次送到等离子体处理工艺,且如图4(a)所示,置于等离子体处理装置1的下电极3上。随后,如图4(b)所示,等离子体放电发生于处理室2内,且用作树脂层的树脂板24a的上表面因此通过该等离子体处理被改性。随后,表面改性之后的电路板5再次送到部件安装装置9,如图9(a)所示,并由传送机构11保持。 
接着,如图9(b)所示,保持第三半导体部件26的部件保持嘴12移动到电路板5上,且其位置调整到2层层叠体25的位置。第三半导体部件26为具有与第一半导体部件13相同配置的半导体部件,且配置成使得粘合层26c形成于半导体芯片26a下表面上且树脂层26b形成于半导体芯片26a上表面上。粘合层26c与粘合层13c类似地通过贴着管芯附着膜而形成。 
接着,如图9(c)所示,保持第三半导体部件26的部件保持嘴12下降,且粘合层26c直接接触到间隔物24表面上的表面改性的树脂板24a。接着,如图9(d)所示,在第三半导体部件26被内藏于部件保持嘴12内的加热器加热的同时,第三半导体部件26压着在间隔物24上。采用这种配置,半硬化状态的粘合层26c热固化。这种情况下,由于通过改性间隔物24的树脂板24a而在整个工艺中大幅增大了润湿性,半硬化状态的粘合层26c在树脂表面24c上迅速流动,且令人满意地贴着在树脂板24a上。 
随后,在经过预定热压着时间之后,如图10(a)所示,部件保持嘴12 上升,且与第三半导体部件26分离。采用这种配置,其中第三半导体部件26再层叠在2层层叠体25上的3层层叠体27形成于电路板5上。这种情况下,类似于图2(d),由于粘合层26c通过紧密地贴着到树脂板24a而不会剥落和偏移,部件保持嘴12在粘合层26c完全热固化之前上升,且可以与第三半导体部件26分离。采用这种配置,类似地,热压着时间缩短,且因此可以大幅提高生产率。 
随后,如图10(b)所示,类似地,在电路板5上其他3层层叠体27的形成完成,且随后对电路板5进行固化工艺。也就是说,3层层叠体27的形成完成之后的电路板5置于固化炉14内,且在预定固化温度维持预定时间。由此,粘合层26c的热固化完成,且3层层叠体27的形成完成。此外,当热固化反应在如图9(d)所示的热压着工艺中充分进行时,图10(c)所示的另外固化工艺可以省略。 
随后,其上形成有3层层叠体27的电路板5送到引线接合工艺,在半导体芯片13a和26a的***部上形成的连接端子通过接合引线28连接到电路板5的电极,如图10(d)所示,且具有芯片上芯片结构的安装体因此完全形成,其中第一半导体部件13和第三半导体部件26二者层叠在电路板5上,3层层叠体27夹置于该第一半导体部件13和第三半导体部件26之间。 
如上所述,部件层叠方法采用下述工艺:将用作第一部件的第一半导体部件13安装在电路板5上,通过使用氧气气体或者氩气气体作为等离子体发生气体的等离子体处理改性第一半导体部件13的树脂层13b的表面,通过使用具有加热器的部件保持嘴12保持用作第二部件的间隔物24,将间隔物24的粘合层24b接触到表面改性的树脂层13b,以及使用加热器热固化粘合层24b。此外,在间隔物24的粘合层24b完全热固化之前,部件保持嘴12与间隔物24分离。 
类似地,在将第三半导体部件26层叠在2层层叠体25上的工艺中,间隔物24和第三半导体部件26分别对应于第一部件和第二部件,且上述方法适用于这两个部件的层叠。也就是说,对至少包括第一部件和第二部件的多个部件进行根据实施例2的部件层叠方法。同样,在该部件层叠方法中,对于每一层可以获得与实施例1相同的效果,且随着层叠层的数目增加,该效果特别显著。 
已经参考具体实施例详细地描述本发明,不过本领域技术人员容易显而 易见的是,在不背离本发明中所述的技术范围的情况下可以进行各种调整、派生和变更。本申请是基于2006年2月28日提交的日本专利申请No.2006-051729,其全部内容引用结合于此。 
工业应用性 
本发明的部件接合方法和部件层叠方法具有可以改善热压着工艺的生产率的效果,且在具有热固性粘合层的半导体部件通过热压着而接合到其表面上形成于树脂层的电路板的领域中是有用的。

Claims (2)

1.一种将多个部件层叠在电路板上的部件层叠方法,所述多个部件的每一个在一个表面上形成有树脂层且在另一表面上形成有热固性粘合层,且所述多个部件至少包括第一部件和第二部件,所述部件层叠方法包括如下步骤:
将所述第一部件安装在所述电路板上;
通过对所述第一部件的树脂层进行等离子体处理来改性所述第一部件的树脂层的表面;
使用部件保持嘴保持所述第二部件;
使所述第二部件的粘合层接触到所述第一部件的表面改性的树脂层;以及
使用加热器热固化所述第二部件的粘合层。
2.如权利要求1所述的部件层叠方法,其中在所述第二部件的粘合层完全热固化之前,所述部件保持嘴与所述第二部件分离。
CN200780007045XA 2006-02-28 2007-02-09 部件层叠方法 Active CN101395707B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2006051729A JP4844168B2 (ja) 2006-02-28 2006-02-28 部品接合方法および部品積層方法
JP051729/2006 2006-02-28
PCT/JP2007/052409 WO2007099759A1 (ja) 2006-02-28 2007-02-09 部品接合方法、部品積層方法および部品接合構造体

Publications (2)

Publication Number Publication Date
CN101395707A CN101395707A (zh) 2009-03-25
CN101395707B true CN101395707B (zh) 2013-04-24

Family

ID=38458874

Family Applications (1)

Application Number Title Priority Date Filing Date
CN200780007045XA Active CN101395707B (zh) 2006-02-28 2007-02-09 部件层叠方法

Country Status (6)

Country Link
US (1) US8614118B2 (zh)
JP (1) JP4844168B2 (zh)
KR (1) KR20080106168A (zh)
CN (1) CN101395707B (zh)
TW (1) TW200741910A (zh)
WO (1) WO2007099759A1 (zh)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100151114A1 (en) * 2008-12-17 2010-06-17 Zimmer, Inc. In-line treatment of yarn prior to creating a fabric
JP5419226B2 (ja) * 2010-07-29 2014-02-19 日東電工株式会社 フリップチップ型半導体裏面用フィルム及びその用途
US20120109301A1 (en) 2010-11-03 2012-05-03 Zimmer, Inc. Modified Polymeric Materials And Methods Of Modifying Polymeric Materials
US10649497B2 (en) * 2014-07-23 2020-05-12 Apple Inc. Adaptive processes for improving integrity of surfaces
WO2016014047A1 (en) 2014-07-23 2016-01-28 Apple Inc. Adaptive processes for improving integrity of surfaces
US10083896B1 (en) 2017-03-27 2018-09-25 Texas Instruments Incorporated Methods and apparatus for a semiconductor device having bi-material die attach layer
USD953183S1 (en) 2019-11-01 2022-05-31 Nvent Services Gmbh Fuel sensor

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61185994A (ja) * 1985-02-13 1986-08-19 信越化学工業株式会社 耐熱性フレキシブルプリント配線用基板およびその製造方法
EP0954208A4 (en) 1996-12-27 2002-09-11 Matsushita Electric Ind Co Ltd METHOD AND DEVICE FOR FIXING AN ELECTRONIC COMPONENT ON A CIRCUIT BOARD
JP3012575B2 (ja) * 1997-10-03 2000-02-21 九州日本電気株式会社 Loc型半導体装置の製造方法
JP3427702B2 (ja) * 1997-11-12 2003-07-22 松下電器産業株式会社 電子部品のプラズマ処理装置
JPH11251335A (ja) * 1998-03-04 1999-09-17 Oki Electric Ind Co Ltd 半導体素子の実装装置及びその実装方法
JP4240711B2 (ja) 1999-12-27 2009-03-18 日立化成工業株式会社 ダイボンディング用接着フィルム及び半導体装置の製造方法
AU776266C (en) * 2000-01-31 2006-01-05 Diagnoswiss S.A. Method for fabricating micro-structures with various surface properties in multilayer body by plasma etching
JP2003264205A (ja) * 2002-03-08 2003-09-19 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
JP4067507B2 (ja) * 2003-03-31 2008-03-26 三洋電機株式会社 半導体モジュールおよびその製造方法
JP4705748B2 (ja) * 2003-05-30 2011-06-22 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP2005251779A (ja) * 2004-03-01 2005-09-15 Mitsui Chemicals Inc 接着フィルムおよびそれを用いた半導体装置

Non-Patent Citations (4)

* Cited by examiner, † Cited by third party
Title
JP特开2001-185563A 2001.07.06
JP特开2003-264205A 2003.09.19
JP特开平11-145120A 1999.05.28
JP特开平11-251335A 1999.09.17

Also Published As

Publication number Publication date
WO2007099759A1 (ja) 2007-09-07
CN101395707A (zh) 2009-03-25
US8614118B2 (en) 2013-12-24
TW200741910A (en) 2007-11-01
KR20080106168A (ko) 2008-12-04
JP4844168B2 (ja) 2011-12-28
US20090035892A1 (en) 2009-02-05
JP2007234713A (ja) 2007-09-13

Similar Documents

Publication Publication Date Title
CN101395707B (zh) 部件层叠方法
JP4401649B2 (ja) 太陽電池モジュールの製造方法
JP5705937B2 (ja) 貼合デバイスの製造装置及び製造方法
JP2010245412A (ja) 半導体集積回路装置の製造方法
JP2009028923A (ja) 接合方法、接合体および配線基板
JP2010080087A (ja) 平面表示装置の製造方法、平面表示装置の製造装置及び平面表示装置
CN102668271B (zh) 布线连接方法和功能器件
JP2004311709A (ja) 半導体装置の製造方法および半導体製造装置
JP2010153498A (ja) 樹脂封止パッケージ及びその製造方法
TWI616340B (zh) 基板貼合裝置、顯示裝置用構件的製造裝置及製造方法
TW201818482A (zh) 樹脂封裝裝置及樹脂封裝方法
JP6557428B2 (ja) 樹脂封止装置及び樹脂封止方法
JP6429187B2 (ja) 接合方法および接合装置
JP2006258958A (ja) 基板接着方法及び基板接着装置
JP2017092791A (ja) 複合基板の製造方法
TW200708218A (en) Process for producing junction structure
JP2008235840A (ja) 半導体装置の製造方法、半導体製造装置および半導体モジュール
JP2000269267A (ja) 電子部品実装方法及び装置
KR102155583B1 (ko) 라미네이팅 장치의 배면 전극형 정전척과, 이의 제조 방법 및 라미네이팅 장치
JP2013008919A (ja) パッケージの製造方法
JP3173738U (ja) 真空式太陽電池モジュールラミネート装置
KR20150077141A (ko) Oled 패널용 합착장치 및 이의 제어 방법
WO2017154408A1 (ja) パワー半導体モジュール、並びにそれに搭載されるSiC半導体素子およびその製造方法
JP2003133707A (ja) 電子部品の装着方法及び装置
US20200068717A1 (en) Method and apparatus for producing a composite material component with an integrated electrical conductor circuit, and composite material component which can be obtained therewith

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant