CN101069240A - 定时抽取装置、以及使用它的信息重放装置和dvd装置 - Google Patents

定时抽取装置、以及使用它的信息重放装置和dvd装置 Download PDF

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Publication number
CN101069240A
CN101069240A CNA2006800013344A CN200680001334A CN101069240A CN 101069240 A CN101069240 A CN 101069240A CN A2006800013344 A CNA2006800013344 A CN A2006800013344A CN 200680001334 A CN200680001334 A CN 200680001334A CN 101069240 A CN101069240 A CN 101069240A
Authority
CN
China
Prior art keywords
mentioned
frequency
generating unit
output
clock generating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CNA2006800013344A
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English (en)
Chinese (zh)
Inventor
冈本好史
山本明
毛利浩喜
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Publication of CN101069240A publication Critical patent/CN101069240A/zh
Pending legal-status Critical Current

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/14—Digital recording or reproducing using self-clocking codes
    • G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/10009—Improvement or modification of read or write signals
    • G11B20/10222—Improvement or modification of read or write signals clock-related aspects, e.g. phase or frequency adjustment or bit synchronisation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/091—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector using a sampling device
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
    • H03L7/1974—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division
    • H03L7/1976—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division using a phase accumulator for controlling the counter or frequency divider
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop

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  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
CNA2006800013344A 2005-11-28 2006-07-18 定时抽取装置、以及使用它的信息重放装置和dvd装置 Pending CN101069240A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP341734/2005 2005-11-28
JP2005341734 2005-11-28

Publications (1)

Publication Number Publication Date
CN101069240A true CN101069240A (zh) 2007-11-07

Family

ID=38067003

Family Applications (1)

Application Number Title Priority Date Filing Date
CNA2006800013344A Pending CN101069240A (zh) 2005-11-28 2006-07-18 定时抽取装置、以及使用它的信息重放装置和dvd装置

Country Status (3)

Country Link
JP (1) JP4124798B2 (ja)
CN (1) CN101069240A (ja)
WO (1) WO2007060765A1 (ja)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101461006A (zh) 2006-06-02 2009-06-17 松下电器产业株式会社 信息再生装置
WO2008129708A1 (ja) * 2007-04-05 2008-10-30 Panasonic Corporation 再生信号処理装置及び映像表示装置
JP2010211834A (ja) * 2007-06-29 2010-09-24 Panasonic Corp 情報再生信号処理装置
US8174949B2 (en) * 2009-07-02 2012-05-08 Lsi Corporation Systems and methods for format efficient timing recovery in a read channel
US8638436B2 (en) 2009-09-15 2014-01-28 Hochiki Corporation Smoke sensor

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3368914B2 (ja) * 1992-03-19 2003-01-20 富士通株式会社 クロック回路及びこれを用いた磁気ディスク装置
JP3477941B2 (ja) * 1994-11-25 2003-12-10 ソニー株式会社 ディスク再生装置の信号処理回路
JPH08161829A (ja) * 1994-12-01 1996-06-21 Canon Inc デジタル情報再生装置及びデジタルｐｌｌ装置
WO2000036602A1 (fr) * 1998-12-17 2000-06-22 Matsushita Electric Industrial Co., Ltd. Circuit de synchronisation de phase/stabilisation de frequence
JP2002008315A (ja) * 2000-06-22 2002-01-11 Matsushita Electric Ind Co Ltd 光ディスク装置
JP3609721B2 (ja) * 2000-12-19 2005-01-12 株式会社東芝 デジタルデータ再生装置及びデジタルデータ再生方法

Also Published As

Publication number Publication date
JPWO2007060765A1 (ja) 2009-05-07
WO2007060765A1 (ja) 2007-05-31
JP4124798B2 (ja) 2008-07-23

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Open date: 20071107