WO2008129708A1 - 再生信号処理装置及び映像表示装置 - Google Patents

再生信号処理装置及び映像表示装置 Download PDF

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Publication number
WO2008129708A1
WO2008129708A1 PCT/JP2007/071336 JP2007071336W WO2008129708A1 WO 2008129708 A1 WO2008129708 A1 WO 2008129708A1 JP 2007071336 W JP2007071336 W JP 2007071336W WO 2008129708 A1 WO2008129708 A1 WO 2008129708A1
Authority
WO
WIPO (PCT)
Prior art keywords
clock
generating section
frequency
signal processor
reproduced signal
Prior art date
Application number
PCT/JP2007/071336
Other languages
English (en)
French (fr)
Inventor
Kouji Okamoto
Akira Yamamoto
Hiroki Mouri
Yoshinori Shirakawa
Original Assignee
Panasonic Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corporation filed Critical Panasonic Corporation
Priority to JP2009510724A priority Critical patent/JP4837778B2/ja
Priority to US12/526,746 priority patent/US8098972B2/en
Publication of WO2008129708A1 publication Critical patent/WO2008129708A1/ja

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/02Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0331Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop with a digital phase-locked loop [PLL] processing binary samples, e.g. add/subtract logic for correction of receiver clock
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/10009Improvement or modification of read or write signals
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/10009Improvement or modification of read or write signals
    • G11B20/10037A/D conversion, D/A conversion, sampling, slicing and digital quantisation or adjusting parameters thereof
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/10009Improvement or modification of read or write signals
    • G11B20/10222Improvement or modification of read or write signals clock-related aspects, e.g. phase or frequency adjustment or bit synchronisation
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/14Digital recording or reproducing using self-clocking codes
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/12Formatting, e.g. arrangement of data block or words on the record carriers
    • G11B2020/1264Formatting, e.g. arrangement of data block or words on the record carriers wherein the formatting concerns a specific kind of data
    • G11B2020/1265Control data, system data or management information, i.e. data used to access or process user data
    • G11B2020/1287Synchronisation pattern, e.g. VCO fields
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B2220/00Record carriers by type
    • G11B2220/20Disc-shaped record carriers
    • G11B2220/25Disc-shaped record carriers characterised in that the disc is based on a specific recording technology
    • G11B2220/2537Optical discs
    • G11B2220/2541Blu-ray discs; Blue laser DVR discs
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B2220/00Record carriers by type
    • G11B2220/20Disc-shaped record carriers
    • G11B2220/25Disc-shaped record carriers characterised in that the disc is based on a specific recording technology
    • G11B2220/2537Optical discs
    • G11B2220/2545CDs
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B2220/00Record carriers by type
    • G11B2220/20Disc-shaped record carriers
    • G11B2220/25Disc-shaped record carriers characterised in that the disc is based on a specific recording technology
    • G11B2220/2537Optical discs
    • G11B2220/2562DVDs [digital versatile discs]; Digital video discs; MMCDs; HDCDs
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

 フィードフォワード制御方式の再生信号処理装置において、クロック生成部1が、デジタル値生成部7で設定されるデジタル値に応じてクロック周波数を変更する。従って、システムの消費電力の最適化及び制御の簡易化が図られる。更に、周波数比率算出部3で算出した周波数比率が設定条件を満たした周波数ロック状態になると、変調データ生成部6がクロック生成部1のクロックを用いて変化の小さい変調成分を生成する。従って、この変調成分で前記デジタル値が更新されて、クロック生成部1のクロック周波数の変化が緩やかになり、このクロック周波数の変化が復号処理の応答性に与える影響が小さくなる。よって、再生信号処理装置としてフィードフォワード制御型を採用しつつ、復号処理系の安定性が弱い場合であっても、良好な復号処理を維持しながら、クロック周波数の微調整が行われる。
PCT/JP2007/071336 2007-04-05 2007-11-01 再生信号処理装置及び映像表示装置 WO2008129708A1 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2009510724A JP4837778B2 (ja) 2007-04-05 2007-11-01 再生信号処理装置及び映像表示装置
US12/526,746 US8098972B2 (en) 2007-04-05 2007-11-01 Reproduced signal processor and video display

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007099212 2007-04-05
JP2007-099212 2007-04-05

Publications (1)

Publication Number Publication Date
WO2008129708A1 true WO2008129708A1 (ja) 2008-10-30

Family

ID=39875248

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2007/071336 WO2008129708A1 (ja) 2007-04-05 2007-11-01 再生信号処理装置及び映像表示装置

Country Status (3)

Country Link
US (1) US8098972B2 (ja)
JP (1) JP4837778B2 (ja)
WO (1) WO2008129708A1 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8456977B2 (en) 2010-10-12 2013-06-04 Renesas Electronics Corporation Digital PLL circuit, information readout device, disc readout device, and signal processing method

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8619932B2 (en) * 2010-09-15 2013-12-31 Mediatek Inc. Signal transmission system with clock signal generator configured for generating clock signal having stepwise/smooth frequency transition and related signal transmission method thereof
JP6585963B2 (ja) * 2015-08-24 2019-10-02 ルネサスエレクトロニクス株式会社 Pll回路、及び、動作方法
TWI730667B (zh) * 2020-03-12 2021-06-11 瑞昱半導體股份有限公司 具有抗射頻干擾機制的訊號接收裝置及方法
TWI768690B (zh) * 2021-01-29 2022-06-21 瑞昱半導體股份有限公司 無參考時脈之時脈資料回復裝置及其方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH087489A (ja) * 1994-06-14 1996-01-12 Sony Corp 記録媒体駆動装置
WO2000036602A1 (fr) * 1998-12-17 2000-06-22 Matsushita Electric Industrial Co., Ltd. Circuit de synchronisation de phase/stabilisation de frequence
WO2007007421A1 (ja) * 2005-07-07 2007-01-18 Matsushita Electric Industrial Co., Ltd. タイミング抽出装置及び映像表示装置
WO2007060765A1 (ja) * 2005-11-28 2007-05-31 Matsushita Electric Industrial Co., Ltd. タイミング抽出装置、並びにこれを用いた情報再生装置及びdvd装置

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04124798A (ja) 1990-09-14 1992-04-24 Matsushita Electric Works Ltd 光電式煙感知器
JPH08161829A (ja) 1994-12-01 1996-06-21 Canon Inc デジタル情報再生装置及びデジタルpll装置
JP2002008315A (ja) 2000-06-22 2002-01-11 Matsushita Electric Ind Co Ltd 光ディスク装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH087489A (ja) * 1994-06-14 1996-01-12 Sony Corp 記録媒体駆動装置
WO2000036602A1 (fr) * 1998-12-17 2000-06-22 Matsushita Electric Industrial Co., Ltd. Circuit de synchronisation de phase/stabilisation de frequence
WO2007007421A1 (ja) * 2005-07-07 2007-01-18 Matsushita Electric Industrial Co., Ltd. タイミング抽出装置及び映像表示装置
WO2007060765A1 (ja) * 2005-11-28 2007-05-31 Matsushita Electric Industrial Co., Ltd. タイミング抽出装置、並びにこれを用いた情報再生装置及びdvd装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8456977B2 (en) 2010-10-12 2013-06-04 Renesas Electronics Corporation Digital PLL circuit, information readout device, disc readout device, and signal processing method

Also Published As

Publication number Publication date
US20100020250A1 (en) 2010-01-28
US8098972B2 (en) 2012-01-17
JP4837778B2 (ja) 2011-12-14
JPWO2008129708A1 (ja) 2010-07-22

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