CN101043021B - 具有镶嵌形成的配线的半导体器件及其制造方法 - Google Patents
具有镶嵌形成的配线的半导体器件及其制造方法 Download PDFInfo
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- CN101043021B CN101043021B CN2006101389898A CN200610138989A CN101043021B CN 101043021 B CN101043021 B CN 101043021B CN 2006101389898 A CN2006101389898 A CN 2006101389898A CN 200610138989 A CN200610138989 A CN 200610138989A CN 101043021 B CN101043021 B CN 101043021B
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- 238000009826 distribution Methods 0.000 claims description 121
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- 229910052751 metal Inorganic materials 0.000 claims description 43
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
- H01L21/76808—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures involving intermediate temporary filling with material
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/2855—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by physical means, e.g. sputtering, evaporation
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31127—Etching organic layers
- H01L21/31133—Etching organic layers by chemical means
- H01L21/31138—Etching organic layers by chemical means by dry-etching
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31144—Etching the insulating layers by chemical or physical means using masks
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/32051—Deposition of metallic or metal-silicide layers
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76804—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics by forming tapered via holes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
- H01L21/76865—Selective removal of parts of the layer
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- Engineering & Computer Science (AREA)
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Physical Vapour Deposition (AREA)
- Electrodes Of Semiconductors (AREA)
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Abstract
Description
Claims (8)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006076422A JP4728153B2 (ja) | 2006-03-20 | 2006-03-20 | 半導体装置の製造方法 |
JP2006-076422 | 2006-03-20 | ||
JP2006076422 | 2006-03-20 |
Publications (2)
Publication Number | Publication Date |
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CN101043021A CN101043021A (zh) | 2007-09-26 |
CN101043021B true CN101043021B (zh) | 2010-06-16 |
Family
ID=38518434
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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CN2006101389898A Active CN101043021B (zh) | 2006-03-20 | 2006-09-22 | 具有镶嵌形成的配线的半导体器件及其制造方法 |
Country Status (4)
Country | Link |
---|---|
US (2) | US7906433B2 (zh) |
JP (1) | JP4728153B2 (zh) |
CN (1) | CN101043021B (zh) |
TW (1) | TWI324375B (zh) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
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JP5436867B2 (ja) * | 2009-01-09 | 2014-03-05 | ルネサスエレクトロニクス株式会社 | フューズ素子の製造方法 |
JP2010278330A (ja) * | 2009-05-29 | 2010-12-09 | Renesas Electronics Corp | 半導体装置及び半導体装置の製造方法 |
US20140061918A1 (en) * | 2011-12-27 | 2014-03-06 | Christopher Jezewski | METHOD OF FORMING LOW RESISTIVITY TaNx/Ta DIFFUSION BARRIERS FOR BACKEND INTERCONNECTS |
US8736056B2 (en) * | 2012-07-31 | 2014-05-27 | Taiwan Semiconductor Manufacturing Company, Ltd. | Device for reducing contact resistance of a metal |
JP5904070B2 (ja) * | 2012-09-13 | 2016-04-13 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
KR102014197B1 (ko) | 2012-10-25 | 2019-08-26 | 삼성전자주식회사 | 반도체 장치 및 이의 형성 방법 |
TWI594671B (zh) * | 2014-12-17 | 2017-08-01 | Flexible circuit board micro-aperture conductive through-hole structure and manufacturing method | |
DE102017103620B4 (de) * | 2017-02-22 | 2022-01-05 | Infineon Technologies Ag | Halbleitervorrichtung, Mikrofon und Verfahren zum Bilden einer Halbleitervorrichtung |
KR102460076B1 (ko) | 2017-08-01 | 2022-10-28 | 삼성전자주식회사 | 반도체 장치 |
Citations (2)
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CN1495879A (zh) * | 2002-07-24 | 2004-05-12 | 三星电子株式会社 | 微电子器件的双镶嵌互连的制造方法 |
CN1523657A (zh) * | 2003-02-20 | 2004-08-25 | 株式会社瑞萨科技 | 半导体装置的制造方法 |
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US5933756A (en) * | 1995-10-18 | 1999-08-03 | Ricoh Company, Ltd. | Fabrication process of a semiconductor device having a multilayered interconnection structure |
JP3445495B2 (ja) * | 1997-07-23 | 2003-09-08 | 株式会社東芝 | 半導体装置 |
US6169030B1 (en) * | 1998-01-14 | 2001-01-02 | Applied Materials, Inc. | Metallization process and method |
US6042999A (en) * | 1998-05-07 | 2000-03-28 | Taiwan Semiconductor Manufacturing Company | Robust dual damascene process |
US6406995B1 (en) * | 1998-09-30 | 2002-06-18 | Intel Corporation | Pattern-sensitive deposition for damascene processing |
JP2000208620A (ja) * | 1999-01-11 | 2000-07-28 | Mitsubishi Electric Corp | 半導体装置の製造方法 |
JP2001230317A (ja) * | 2000-02-15 | 2001-08-24 | Nec Corp | 多層配線構造の形成方法及び半導体装置の多層配線構造 |
JP2001284449A (ja) | 2000-03-31 | 2001-10-12 | Sony Corp | 半導体装置の製造方法 |
JP4858895B2 (ja) * | 2000-07-21 | 2012-01-18 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
EP1384257A2 (en) * | 2001-05-04 | 2004-01-28 | Tokyo Electron Limited | Ionized pvd with sequential deposition and etching |
JP2003092349A (ja) | 2001-09-18 | 2003-03-28 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
JP3810309B2 (ja) * | 2001-12-03 | 2006-08-16 | Necエレクトロニクス株式会社 | 半導体装置の製造方法 |
JP2003218114A (ja) * | 2002-01-22 | 2003-07-31 | Toshiba Corp | 半導体装置及びその製造方法 |
US7183195B2 (en) * | 2002-02-22 | 2007-02-27 | Samsung Electronics, Co., Ltd. | Method of fabricating dual damascene interconnections of microelectronic device using hybrid low k-dielectric and carbon-free inorganic filler |
US6855629B2 (en) * | 2002-07-24 | 2005-02-15 | Samsung Electronics Co., Ltd. | Method for forming a dual damascene wiring pattern in a semiconductor device |
JP4023236B2 (ja) * | 2002-07-08 | 2007-12-19 | 松下電器産業株式会社 | 金属配線の形成方法 |
JP2004119950A (ja) * | 2002-09-30 | 2004-04-15 | Sony Corp | 半導体装置の製造方法 |
JP3909283B2 (ja) * | 2002-10-31 | 2007-04-25 | 富士通株式会社 | 半導体装置の製造方法 |
JP2004165336A (ja) | 2002-11-12 | 2004-06-10 | Matsushita Electric Ind Co Ltd | 半導体装置の製造方法 |
JP4173374B2 (ja) * | 2003-01-08 | 2008-10-29 | 株式会社ルネサステクノロジ | 半導体装置の製造方法 |
US20040209458A1 (en) * | 2003-04-16 | 2004-10-21 | Tsai Shin Yi | Semiconductor device having rounding profile structure for reducing step profile and manufacturing processing stress and its manufacturing method |
JP4571785B2 (ja) * | 2003-05-30 | 2010-10-27 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
JP2005191254A (ja) * | 2003-12-25 | 2005-07-14 | Fujitsu Ltd | 半導体装置の製造方法 |
DE102004015862B4 (de) * | 2004-03-31 | 2006-11-16 | Advanced Micro Devices, Inc., Sunnyvale | Verfahren zur Herstellung einer leitenden Barrierenschicht in kritischen Öffnungen mittels eines abschließenden Abscheideschritts nach einer Rück-Sputter-Abscheidung |
KR100593446B1 (ko) * | 2004-05-19 | 2006-06-28 | 삼성전자주식회사 | 유기성 플루오라이드 계열 완충 용액을 사용해서 반도체장치를 제조하는 방법들 |
KR100745986B1 (ko) | 2004-12-08 | 2007-08-06 | 삼성전자주식회사 | 다공 생성 물질을 포함하는 충전재를 사용하는 미세 전자소자의 듀얼 다마신 배선의 제조 방법 |
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2006
- 2006-03-20 JP JP2006076422A patent/JP4728153B2/ja active Active
- 2006-08-28 TW TW095131565A patent/TWI324375B/zh active
- 2006-09-05 US US11/515,202 patent/US7906433B2/en active Active
- 2006-09-22 CN CN2006101389898A patent/CN101043021B/zh active Active
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2010
- 2010-04-07 US US12/755,656 patent/US8546949B2/en active Active
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1495879A (zh) * | 2002-07-24 | 2004-05-12 | 三星电子株式会社 | 微电子器件的双镶嵌互连的制造方法 |
CN1523657A (zh) * | 2003-02-20 | 2004-08-25 | 株式会社瑞萨科技 | 半导体装置的制造方法 |
Also Published As
Publication number | Publication date |
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JP4728153B2 (ja) | 2011-07-20 |
CN101043021A (zh) | 2007-09-26 |
TWI324375B (en) | 2010-05-01 |
US20100193965A1 (en) | 2010-08-05 |
US20070218671A1 (en) | 2007-09-20 |
US7906433B2 (en) | 2011-03-15 |
TW200737406A (en) | 2007-10-01 |
US8546949B2 (en) | 2013-10-01 |
JP2007251105A (ja) | 2007-09-27 |
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