WO2021103197A1 - Oled显示面板 - Google Patents

Oled显示面板 Download PDF

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Publication number
WO2021103197A1
WO2021103197A1 PCT/CN2019/125639 CN2019125639W WO2021103197A1 WO 2021103197 A1 WO2021103197 A1 WO 2021103197A1 CN 2019125639 W CN2019125639 W CN 2019125639W WO 2021103197 A1 WO2021103197 A1 WO 2021103197A1
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WO
WIPO (PCT)
Prior art keywords
layer
area
retaining wall
metal
display panel
Prior art date
Application number
PCT/CN2019/125639
Other languages
English (en)
French (fr)
Inventor
曹君
Original Assignee
武汉华星光电半导体显示技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 武汉华星光电半导体显示技术有限公司 filed Critical 武汉华星光电半导体显示技术有限公司
Priority to US16/966,178 priority Critical patent/US11957029B2/en
Publication of WO2021103197A1 publication Critical patent/WO2021103197A1/zh

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/84—Passivation; Containers; Encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/87—Passivation; Containers; Encapsulations
    • H10K59/873—Encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/17—Passive-matrix OLED displays
    • H10K59/179—Interconnections, e.g. wiring lines or terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K2102/00—Constructional details relating to the organic devices covered by this subclass
    • H10K2102/301—Details of OLEDs
    • H10K2102/311—Flexible OLED
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K77/00—Constructional details of devices covered by this subclass and not covered by groups H10K10/80, H10K30/80, H10K50/80 or H10K59/80
    • H10K77/10—Substrates, e.g. flexible substrates
    • H10K77/111—Flexible substrates

Definitions

  • This application relates to the field of display technology, and in particular to an OLED display panel.
  • OLED Organic Light-Emitting Diode
  • OLED Organic Light-Emitting Diode
  • the light-emitting unit of the OLED device is more sensitive to water and oxygen, and needs to be packaged and protected.
  • a thin film encapsulation method is generally adopted, that is, an inorganic/organic/inorganic film layer is stacked for encapsulation.
  • the inorganic layer plays a role of blocking water and oxygen
  • the organic layer is to cover the particles and relieve the stress when the device is bent.
  • the organic layer has fluidity.
  • one or several retaining walls will be set around the device. Further, in order to overlap the metal wires at the edge of the device, or to increase the relative thickness of the thin-film encapsulated organic layer at the edge, the organic layer in the array substrate near the inner side of the barrier is usually removed.
  • the organic layer on the inner side of the retaining wall is removed, the organic layer is not covered, and the inorganic layer/metal and other uneven film layers are exposed to the outside, which results in a certain frame of the display panel, especially the metal In the lower frame area with more wires and more complicated morphology, the surface morphology of the inorganic/metal film layer at different positions is different, and the inorganic layer does not have a flattening effect when the film is encapsulated, which makes the surface morphology of the organic layer of the film package different.
  • the fluidity is different at the same location, and the thin-film encapsulated organic layer is likely to spread across the retaining wall, causing the encapsulation to fail after the organic film comes in contact with the outside world.
  • the surface morphology of the inorganic/metal film layer at different positions is different in the lower frame area where there are more metal wires, which makes the film
  • the fluidity of the encapsulated organic layer is different at the position where the surface morphology is different, so that the thin-film encapsulated organic layer is likely to spread across the retaining wall, which causes the organic film to contact the outside and cause the encapsulation to fail.
  • the surface morphology of the inorganic/metal film layer at different positions is different in the lower frame area where there are more metal wires, so that the thin film encapsulated organic layer is on the surface.
  • the fluidity is also different at positions with different morphologies, and the thin-film encapsulated organic layer is likely to spread across the retaining wall, which will cause the encapsulation to fail after the organic film comes in contact with the outside world.
  • an embodiment of the present application provides an OLED display panel including a display area and a non-display area located around the display area.
  • the OLED display panel includes an array substrate, a first retaining wall, a second retaining wall, and a plurality of A metal trace, a plurality of first trenches, and a thin film packaging layer;
  • the first retaining wall is located in the non-display area and surrounds the display area
  • the second retaining wall is located in the non-display area and surrounds the first retaining wall
  • the second retaining wall is connected to the display area.
  • the first retaining wall is at a distance
  • the metal wiring layer is located in the fan-out wiring area of the array substrate close to the lower frame
  • the fan-out wiring area includes a first area and a second area, in the first area
  • the metal traces are arranged along a direction perpendicular to the first retaining wall, and the angle between the metal traces in the second region and the first retaining wall is an acute angle
  • the first trench is provided in the fan-out wiring area, and the first trench is arranged along the direction of the metal wiring
  • the portion of the array substrate corresponding to the second area is further provided with a plurality of second Two grooves, the second grooves are arranged along a direction perpendicular to the first retaining wall; the distance between two adjacent first grooves ranges between 10-
  • the bottom surface pattern of the second groove is bar-shaped or wave-shaped.
  • the cross-sectional shape of the second groove in a vertical section is at least one of a rectangle, a trapezoid, or a circle, and the normal direction of the vertical section is the same as the plane where the array substrate is located.
  • the normal directions are perpendicular to each other.
  • two adjacent second trenches are communicated through the first trenches.
  • the portion of the array substrate corresponding to the non-display area away from the fan-out wiring area includes a flexible substrate, an inorganic buffer layer, a barrier layer, a first gate insulating layer, and a second gate insulating layer.
  • the sum of the thickness of the first gate insulating layer and the second gate insulating layer is the same as the thickness of the first metal wiring layer, and the second metal wiring The thickness of the layer is the same as the thickness of the first metal wiring layer.
  • the material of the planarization layer and the material of the pixel definition layer are both organic photoresist.
  • the portion of the array substrate corresponding to the first trench includes a flexible substrate, an inorganic buffer layer, a barrier layer, a first gate insulating layer, a first metal wiring layer, The second gate insulating layer, the second metal wiring layer, the interlayer insulating layer, and the source and drain metal layers.
  • the portion of the array substrate corresponding to the second trench includes a flexible substrate, an inorganic buffer layer, a barrier layer, a first metal wiring layer, a second metal wiring layer, Interlayer insulating layer and source and drain metal layer.
  • the embodiment of the present application also provides another OLED display panel, including a display area and a non-display area located around the display area.
  • the OLED display panel includes an array substrate, a first retaining wall, a second retaining wall, and a plurality of metal bars. Wiring, a plurality of first trenches, and a thin film encapsulation layer;
  • the first retaining wall is located in the non-display area and surrounds the display area
  • the second retaining wall is located in the non-display area and surrounds the first retaining wall
  • the second retaining wall is connected to the display area.
  • the first retaining wall is at a distance
  • the metal wiring layer is located in the fan-out wiring area of the array substrate close to the lower frame
  • the fan-out wiring area includes a first area and a second area, in the first area
  • the metal traces are arranged along a direction perpendicular to the first retaining wall, and the angle between the metal traces in the second region and the first retaining wall is an acute angle
  • the first trench is provided in the fan-out wiring area, and the first trench is arranged along the direction of the metal wiring
  • the portion of the array substrate corresponding to the second area is further provided with a plurality of second Two grooves, the second grooves are arranged along a direction perpendicular to the first retaining wall.
  • the portion of the array substrate corresponding to the non-display area away from the fan-out wiring area includes a flexible substrate, an inorganic buffer layer, a barrier layer, a first gate insulating layer, and a second gate insulating layer.
  • the sum of the thickness of the first gate insulating layer and the second gate insulating layer is the same as the thickness of the first metal wiring layer, and the second metal wiring The thickness of the layer is the same as the thickness of the first metal wiring layer.
  • the material of the planarization layer and the material of the pixel definition layer are both organic photoresist.
  • the portion of the array substrate corresponding to the first trench includes a flexible substrate, an inorganic buffer layer, a barrier layer, a first gate insulating layer, a first metal wiring layer, The second gate insulating layer, the second metal wiring layer, the interlayer insulating layer, and the source and drain metal layers.
  • the portion of the array substrate corresponding to the second trench includes a flexible substrate, an inorganic buffer layer, a barrier layer, a first metal wiring layer, a second metal wiring layer, Interlayer insulating layer and source and drain metal layer.
  • a plurality of grooves perpendicular to the direction of the retaining wall are provided in the area where the metal wire and the retaining wall are at an acute angle at the lower frame of the display panel, which improves the film packaging
  • the fluidity of the organic layer at this position further improves the uniformity of film formation of the thin-film encapsulated organic layer at the lower frame, and further extends the service life of the OLED display panel.
  • FIG. 1 is a schematic structural diagram of an OLED display panel according to an embodiment of the application.
  • FIG. 2 is a schematic diagram of an OLED display panel in a fan-out wiring area according to an embodiment of the application.
  • FIG. 3 is a schematic diagram of the first trench in the fan-out wiring area of the OLED display panel according to the embodiment of the application.
  • FIG. 4 is a schematic diagram of a cross-sectional structure of the first area in the fan-out wiring area of the OLED display panel according to the embodiment of the application.
  • FIG. 5 is a schematic diagram of the second trench in the fan-out wiring area of the OLED display panel according to the embodiment of the application.
  • Fig. 6A is a schematic diagram of the cross-sectional structure at I-I in Fig. 5.
  • FIG. 6B is a schematic diagram of the cross-sectional structure at II-II in FIG. 5.
  • the embodiment of the application is directed to the existing OLED display panel.
  • the surface morphology of the inorganic/metal film layer at different positions is different in the lower frame area where there are more metal wires.
  • the fluidity of the encapsulated organic layer is different at the position where the surface morphology is different, so that the thin-film encapsulated organic layer is likely to spread across the retaining wall, which leads to the technical problem of the packaging failure after the organic film comes in contact with the outside world , This embodiment can solve this defect.
  • the OLED display panel includes a display area 11 and a non-display area 12 located around the display area 11.
  • the OLED display panel further includes an array substrate 13, a first retaining wall 14, and a second retaining wall 15.
  • the first retaining wall 14 is disposed on the array substrate 13, and the first retaining wall 14 is located at the
  • the non-display area 12 surrounds the display area 11
  • the second barrier wall 15 is disposed on the array substrate 13, and the second barrier wall 15 is located in the non-display area 12 and surrounds the first barrier.
  • the wall 14, the second retaining wall 15 and the first retaining wall 14 are at a distance, and the first retaining wall 14 and the second retaining wall 15 each form a ring structure.
  • the first retaining wall 14 is mainly used to define the boundary of the thin film encapsulated organic layer.
  • the second retaining wall 15 is mainly used to prevent a part of the thin-film encapsulated organic layer from being deposited on areas where deposition is not desired when forming the thin-film encapsulated organic layer, which may cause problems such as reduced adhesion or water and oxygen penetration.
  • the material of the first retaining wall 14 and the second retaining wall 15 may include photoresist, polyacrylic resin, polyimide resin and organic material of acrylic resin, or silicon compound Of inorganic materials.
  • the display area 11 has a number of pixels formed by interlacing a number of scan lines and a number of data lines for displaying images.
  • the non-display area 12 surrounds the display area.
  • the non-display area 12 is provided with a fan-out wiring area 121 at the lower frame of the array substrate 13, and a plurality of metal wiring areas are provided in the fan-out wiring area 121.
  • Some of the metal traces are arranged along a direction perpendicular to the first retaining wall 14, and the angle between the other part of the metal traces and the first retaining wall 14 is an acute angle.
  • FIG. 2 it is a schematic diagram of the OLED display panel in the fan-out wiring area according to the embodiment of the application.
  • a plurality of metal traces 16 are provided in the fan-out wiring area 121, the fan-out wiring area 121 includes a first area 1211 and a second area 1212, and the metal wiring in the first area 1211
  • the 16 is arranged along a direction perpendicular to the first retaining wall 14, and the angle ⁇ between the metal trace 16 in the second area 1212 and the first retaining wall 14 is an acute angle.
  • the fan-out wiring area 121 is further provided with a plurality of first grooves, and the first grooves are arranged along the direction of the metal wiring.
  • FIG. 3 it is a schematic diagram of the first trench in the fan-out wiring area of the OLED display panel according to the embodiment of the application.
  • the fan-out wiring area 121 is further provided with a plurality of first trenches 17, and the first trenches 17 are arranged along the direction of the metal wiring 16.
  • the first trench 17 is used to flatten the top two layers in the array structure of the fan-out wiring area 121 corresponding to the array substrate 10 through processes such as photoresist coating, exposure, development, and etching. Layer and pixel definition layer) removed and formed.
  • the distance between two adjacent first trenches ranges from 10-1000 ⁇ m.
  • the portion of the array substrate 10 corresponding to the non-display area 12 away from the fan-out wiring area 121 includes a flexible substrate 101, an inorganic buffer layer 102, a barrier layer 103, a first gate insulating layer 104, and a first gate insulating layer 104.
  • the sum of the thickness of the first gate insulating layer 104 and the second gate insulating layer 105 is the same as the thickness of the first metal wiring layer 161, and the thickness of the second metal wiring layer 162 The thickness is the same as the thickness of the first metal wiring layer 161.
  • the material of the planarization layer 108 and the material of the pixel definition layer 109 are both organic photoresist.
  • the material of the flexible substrate 101 is polyimide, and the material of the source/drain metal layer 107 is the same as the material of the first metal wiring layer 161.
  • the first retaining wall is set around the device 14 and the second retaining wall 15.
  • the planarization layer 108 and the pixel defining layer 109 in the array substrate 10 near the inner area of the first barrier wall 14 are etched away, thereby forming the first trench 17.
  • the metal traces 16 in the first area 1211 are arranged along a direction perpendicular to the first retaining wall 14, and the array substrate 10 corresponds to the
  • the portion at the first trench 17 includes the flexible substrate 101, the inorganic buffer layer 102, the barrier layer 103, the first gate insulating layer 104, the first metal wiring layer 161, the The second gate insulating layer 105, the second metal wiring layer 162, the interlayer insulating layer 106, and the source-drain metal layer 107.
  • FIG. 5 it is a schematic diagram of the second trench in the fan-out wiring area 121 of the OLED display panel according to the embodiment of the application.
  • the included angle between the metal trace 16 in the second area 1212 and the first retaining wall 14 is an acute angle
  • the second groove 18 is provided in the second area 1212
  • the first The two grooves 18 are arranged along a direction perpendicular to the first retaining wall 14.
  • the second trench 18 is formed by applying photoresist, exposing, developing, etching, and other processes to remove the metal wiring layer in the array structure of the second region 1212 corresponding to the array substrate 10
  • the gate insulating layer in the vertical direction is etched and removed.
  • the second grooves 18 are arranged along a direction perpendicular to the first retaining wall 14, and two adjacent second grooves 18 are connected through the first groove 17.
  • the distance between two adjacent second trenches 18 ranges from 10-1000 ⁇ m.
  • the bottom surface of the second groove 18 has a strip shape or a wave shape.
  • the cross-sectional shape of the second groove 18 in a vertical section is at least one of a rectangle, a trapezoid, or a circle, and the normal direction of the vertical section is the same as the normal direction of the plane where the array substrate 10 is located. Perpendicular to each other.
  • the organic layer of the film encapsulation is printed on the array substrate 10.
  • the thin-film encapsulated organic layer is generally diffused from the display area 11 to the non-display area 12. Because the metal wires at the down border (bottom border) of the OLED display device are denser, the direction of the metal wires in different areas is different, which makes the surface topography different, resulting in a difference in the fluidity of the thin-film encapsulated organic layer.
  • the thin-film encapsulated organic layer When part of the thin-film encapsulated organic layer will be abnormally diffused in the second area 1212 (the area where the metal wires and the retaining wall at the lower frame of the OLED display panel are at an acute angle), the thin-film encapsulated organic layer will first enter the second area. 1212 of multiple second grooves 18.
  • the thin film encapsulated organic layer flowing into the second groove 18 will be blocked by the first retaining wall 14, and the thin film encapsulated organic layer will Flow along the second groove 18 and through the first groove 17 communicating with it to a position where no abnormal diffusion occurs, thereby greatly reducing the possibility of overflow of the thin film encapsulated organic layer during flow, and preventing the thin film encapsulated organic layer.
  • the package fails, which greatly improves the package effect and prolongs the service life of the OLED device.
  • the portion of the array substrate 10 corresponding to the non-display area 12 away from the fan-out wiring area 121 includes a flexible substrate 101, an inorganic buffer layer 102, a barrier layer 103, a first gate insulating layer 104, and a first gate insulating layer 104.
  • the sum of the thickness of the first gate insulating layer 104 and the second gate insulating layer 105 is the same as the thickness of the first metal wiring layer 161, and the thickness of the second metal wiring layer 162 The thickness is the same as the thickness of the first metal wiring layer 161.
  • the material of the planarization layer 108 and the material of the pixel definition layer 109 are both organic photoresist.
  • the angle between the metal trace 16 in the second area 1212 and the first retaining wall 14 is an acute angle, and the array substrate 10 is in the second area 1212
  • the portion corresponding to the first trench 17 includes the flexible substrate 101, the inorganic buffer layer 102, the barrier layer 103, the first gate insulating layer 104, and the first metal trace Layer 161, the second gate insulating layer 105, the second metal wiring layer 162, the interlayer insulating layer 106, and the source drain metal layer 107.
  • the portion of the array substrate 10 corresponding to the non-display area 12 away from the fan-out wiring area 121 includes a flexible substrate 101, an inorganic buffer layer 102, a barrier layer 103, a first gate insulating layer 104, and a first gate insulating layer 104.
  • the sum of the thickness of the first gate insulating layer 104 and the second gate insulating layer 105 is the same as the thickness of the first metal wiring layer 161, and the thickness of the second metal wiring layer 162 The thickness is the same as the thickness of the first metal wiring layer 161.
  • the material of the planarization layer 108 and the material of the pixel definition layer 109 are both organic photoresist.
  • the angle between the metal trace 16 in the second region 1212 and the first retaining wall 14 is an acute angle.
  • the first gate insulating layer 104 and the second gate insulating layer 105 in the vertical direction of the first metal wiring layer 161 and the second metal wiring layer 162 are etched away to form a
  • the second grooves 18 are arranged along a direction perpendicular to the first retaining wall 14.
  • the portion of the array substrate 10 corresponding to the second trench 18 in the second region 1212 includes the flexible substrate 101, the inorganic buffer layer 102, the barrier layer 103, and the The first gate insulating layer 104, the first metal wiring layer 161, the second gate insulating layer 105, the second metal wiring layer 162, the interlayer insulating layer 106, and the source 107 Drain metal layer.
  • the embodiment of the present application proposes a structural design of an OLED device at the lower frame. Since the metal wires at the lower frame are denser and have different directions, the difference in fluidity of the organic layer of the film encapsulation is also greater. In the area where the metal wire and the retaining wall are at an acute angle, the fluidity of the organic layer of the film encapsulation is poor.
  • the embodiment of the present application etches the inorganic insulating layer under these regions according to a certain rule, thus forming a trench perpendicular to the retaining wall. These grooves can improve the fluidity of the thin film encapsulated organic layer, and further improve the film uniformity of the thin film encapsulated organic layer at the lower frame.
  • a plurality of grooves perpendicular to the direction of the retaining wall are provided in the area where the metal wires and the retaining wall at the lower frame of the OLED display panel are at an acute angle, which improves the organic layer of the film encapsulation.
  • the fluidity at this position further improves the uniformity of film formation of the thin-film encapsulated organic layer at the lower frame, and further extends the service life of the OLED display panel.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Electroluminescent Light Sources (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

一种OLED显示面板，包括阵列基板及金属走线层。其中，部分金属走线沿着垂直于第一挡墙的方向排布，另一部分金属走线与所述第一挡墙的夹角为锐角；多个第一沟槽设置于扇出走线区且沿着所述金属走线的走向排布；所述阵列基板对应于部分区域还设置有多个第二沟槽，所述第二沟槽沿着垂直于所述第一挡墙的方向排布。

Description

OLED显示面板 技术领域
本申请涉及显示技术领域，尤其涉及一种OLED显示面板。
 背景技术
在平板显示技术中，OLED（Organic Light-Emitting Diode，有机发光二极管）器件因其重量轻、厚度薄、可弯折、视角广等优点，有了更广泛的应用。但OLED器件发光单元对水氧较敏感，需要对其进行封装保护。为达到柔性显示的目的，一般采用的是薄膜封装的方法，即无机/有机/无机膜层堆叠的方式进行封装。其中无机层起到阻隔水氧的作用，有机层则是为了包覆颗粒和缓解器件弯折时的应力。有机层具有流动性，为将其限制在特定区域内，会在器件周围设置一圈或几圈挡墙（Dam）。进一步地，为了器件边缘处金属导线之间的互相搭接，或者为了增加边缘处薄膜封装有机层的相对厚度，通常会去掉靠近挡墙内侧区域的阵列基板中的有机层。然而，当去掉挡墙内侧区域的有机层时，没有了有机层的包覆，无机层/金属等不平坦的膜层就暴露在外面，这样就导致在显示面板的某一边框，特别是金属导线比较多、形貌比较复杂的下边框区域，不同位置的无机/金属膜层表面形貌不一样，而薄膜封装时，无机层也没有平坦化效果，使得薄膜封装有机层在表面形貌不一样的位置处流动性也不一样，薄膜封装有机层很可能会出现越过挡墙发生扩散的情况，从而导致有机膜与外界接触后造成封装失效。
综上所述，现有的OLED显示面板，在去掉挡墙内侧区域的有机层时，导致在金属导线比较多的下边框区域，不同位置的无机/金属膜层表面形貌不一样，使得薄膜封装有机层在表面形貌不一样的位置处流动性也不一样，进而使薄膜封装有机层很可能会出现越过挡墙发生扩散的情况，从而导致有机膜与外界接触后造成封装失效。
 技术问题
现有的OLED显示面板，在去掉挡墙内侧区域的有机层时，导致在金属导线比较多的下边框区域，不同位置的无机/金属膜层表面形貌不一样，使得薄膜封装有机层在表面形貌不一样的位置处流动性也不一样，进而使薄膜封装有机层很可能会出现越过挡墙发生扩散的情况，从而导致有机膜与外界接触后造成封装失效。
 技术解决方案
第一方面，本申请实施例提供一种OLED显示面板，包括显示区域以及位于所述显示区域周围的非显示区域，所述OLED显示面板包括阵列基板、第一挡墙、第二挡墙、多条金属走线、多个第一沟槽以及薄膜封装层；
其中，所述第一挡墙位于所述非显示区域且围绕所述显示区域，所述第二挡墙位于所述非显示区域且围绕所述第一挡墙，所述第二挡墙与所述第一挡墙相距一段距离；所述金属走线层位于所述阵列基板靠近下边框的扇出走线区，所述扇出走线区包括第一区域与第二区域，所述第一区域中的所述金属走线沿着垂直于所述第一挡墙的方向排布，所述第二区域中的所述金属走线与所述第一挡墙的夹角为锐角；多个所述第一沟槽设置于所述扇出走线区，所述第一沟槽沿着所述金属走线的走向排布；所述阵列基板对应于所述第二区域的部分还设置有多个第二沟槽，所述第二沟槽沿着垂直于所述第一挡墙的方向排布；相邻两所述第一沟槽之间的间距范围在10-1000μm之间，相邻两所述第二沟槽之间的间距范围在10-1000μm之间。
在所述的OLED显示面板中，所述第二沟槽的底面图形为条形或波浪形。
在所述的OLED显示面板中，所述第二沟槽在一个垂直截面的截面形状为矩形、梯形或圆形中的至少一种，所述垂直截面的法线方向与所述阵列基板所在平面的法线方向互相垂直。
在所述的OLED显示面板中，相邻的两所述第二沟槽之间通过所述第一沟槽连通。
在所述的OLED显示面板中，所述阵列基板对应于所述非显示区域中远离所述扇出走线区的部分包括柔性衬底、无机缓冲层、阻隔层、第一栅极绝缘层、第一金属走线层、第二栅极绝缘层、第二金属走线层、层间绝缘层、源漏极金属层、平坦化层以及像素定义层。
在所述的OLED显示面板中，所述第一栅极绝缘层和所述第二栅极绝缘层的厚度之和与所述第一金属走线层的厚度相同，所述第二金属走线层的厚度与所述第一金属走线层的厚度相同。
在所述的OLED显示面板中，所述平坦化层的材料与所述像素定义层的材料均为有机光阻。
在所述的OLED显示面板中，所述阵列基板对应于所述第一沟槽处的部分包括柔性衬底、无机缓冲层、阻隔层、第一栅极绝缘层、第一金属走线层、第二栅极绝缘层、第二金属走线层、层间绝缘层以及源漏极金属层。
在所述的OLED显示面板中，所述阵列基板对应于所述第二沟槽处的部分包括柔性衬底、无机缓冲层、阻隔层、第一金属走线层、第二金属走线层、层间绝缘层以及源漏极金属层。
本申请实施例还提供另一种OLED显示面板，包括显示区域以及位于所述显示区域周围的非显示区域，所述OLED显示面板包括阵列基板、第一挡墙、第二挡墙、多条金属走线、多个第一沟槽以及薄膜封装层；
其中，所述第一挡墙位于所述非显示区域且围绕所述显示区域，所述第二挡墙位于所述非显示区域且围绕所述第一挡墙，所述第二挡墙与所述第一挡墙相距一段距离；所述金属走线层位于所述阵列基板靠近下边框的扇出走线区，所述扇出走线区包括第一区域与第二区域，所述第一区域中的所述金属走线沿着垂直于所述第一挡墙的方向排布，所述第二区域中的所述金属走线与所述第一挡墙的夹角为锐角；多个所述第一沟槽设置于所述扇出走线区，所述第一沟槽沿着所述金属走线的走向排布；所述阵列基板对应于所述第二区域的部分还设置有多个第二沟槽，所述第二沟槽沿着垂直于所述第一挡墙的方向排布。
在所述的OLED显示面板中，所述阵列基板对应于所述非显示区域中远离所述扇出走线区的部分包括柔性衬底、无机缓冲层、阻隔层、第一栅极绝缘层、第一金属走线层、第二栅极绝缘层、第二金属走线层、层间绝缘层、源漏极金属层、平坦化层以及像素定义层。
在所述的OLED显示面板中，所述第一栅极绝缘层和所述第二栅极绝缘层的厚度之和与所述第一金属走线层的厚度相同，所述第二金属走线层的厚度与所述第一金属走线层的厚度相同。
在所述的OLED显示面板中，所述平坦化层的材料与所述像素定义层的材料均为有机光阻。
在所述的OLED显示面板中，所述阵列基板对应于所述第一沟槽处的部分包括柔性衬底、无机缓冲层、阻隔层、第一栅极绝缘层、第一金属走线层、第二栅极绝缘层、第二金属走线层、层间绝缘层以及源漏极金属层。
在所述的OLED显示面板中，所述阵列基板对应于所述第二沟槽处的部分包括柔性衬底、无机缓冲层、阻隔层、第一金属走线层、第二金属走线层、层间绝缘层以及源漏极金属层。
 有益效果
相较于现有技术，本申请实施例提供的OLED显示面板，在显示面板下边框处中金属导线与挡墙成锐角的区域，设置多道垂直于挡墙方向的沟槽，提升了薄膜封装有机层在该位置的流动性，进一步提高了薄膜封装有机层在下边框处的成膜均匀性，更进一步延长了OLED显示面板的使用寿命。
 附图说明
图1为本申请实施例OLED显示面板的结构示意图。
图2为本申请实施例OLED显示面板在扇出走线区的示意图。
图3为本申请实施例OLED显示面板在扇出走线区中的第一沟槽示意图。
图4为本申请实施例OLED显示面板在扇出走线区中的第一区域的截面结构示意图。
图5为本申请实施例OLED显示面板在扇出走线区中的第二沟槽示意图。
图6A为图5中Ⅰ-Ⅰ处的截面结构示意图。
图6B为图5中Ⅱ-Ⅱ处的截面结构示意图。
 本发明的实施方式
本申请提供一种OLED显示面板，为使本申请的目的、技术方案及效果更加清楚、明确，以下参照附图并举实施例对本申请进一步详细说明。应当理解，此处所描述的具体实施例仅用以解释本申请，并不用于限定本申请。
本申请实施例针对现有的OLED显示面板，在去掉挡墙内侧区域的有机层时，导致在金属导线比较多的下边框区域，不同位置的无机/金属膜层表面形貌不一样，使得薄膜封装有机层在表面形貌不一样的位置处流动性也不一样，进而使薄膜封装有机层很可能会出现越过挡墙发生扩散的情况，从而导致有机膜与外界接触后造成封装失效的技术问题，本实施例能够解决该缺陷。
如图1所示，为本申请实施例OLED显示面板的结构示意图。其中，所述OLED显示面板包括显示区域11以及位于所述显示区域11周围的非显示区域12。所述OLED显示面板还包括阵列基板13、第一挡墙14以及第二挡墙15；其中，所述第一挡墙14设置于所述阵列基板13上，所述第一挡墙14位于所述非显示区域12且围绕所述显示区域11，所述第二挡墙15设置于所述阵列基板13上，所述第二挡墙15位于所述非显示区域12且围绕所述第一挡墙14，所述第二挡墙15与所述第一挡墙14相距一段距离，所述第一挡墙14和所述第二挡墙15各自构成一环状结构。
其中，所述第一挡墙14主要用于界定薄膜封装有机层的边界。所述第二挡墙15主要用于避免在形成薄膜封装有机层时，部分薄膜封装有机层沉积在不期望沉积的区域，而造成黏合性降低或水氧渗透的问题。
优选地，所述第一挡墙14和所述第二挡墙15的材料可以包括光致抗蚀剂、聚丙烯酸类树脂、聚酰亚胺类树脂和丙烯酸类树脂的有机材料，或者硅化合物的无机材料。
具体地，所述显示区域11具有若干条扫描线和若干条数据线交错而成的若干个像素，用于显示影像。所述非显示区域12围绕所述显示区域，所述非显示区域12在所述阵列基板13的下边框处设置有扇出走线区121，所述扇出走线区121内设置有多条金属走线，部分所述金属走线沿着垂直于所述第一挡墙14的方向排布，另一部分所述金属走线与所述第一挡墙14的夹角为锐角。
如图2所示，为本申请实施例OLED显示面板在扇出走线区的示意图。其中，所述扇出走线区121内设置有多条金属走线16，所述扇出走线区121包括第一区域1211与第二区域1212，所述第一区域1211中的所述金属走线16沿着垂直于所述第一挡墙14的方向排布，所述第二区域1212中的所述金属走线16与所述第一挡墙14的夹角δ为锐角。
具体地，所述扇出走线区121中还设置有多个第一沟槽，所述第一沟槽沿着所述金属走线的走向排布。
如图3所示，为本申请实施例OLED显示面板在扇出走线区中的第一沟槽示意图。其中，所述扇出走线区121中还设置有多个第一沟槽17，所述第一沟槽17沿着所述金属走线16的走向排布。所述第一沟槽17是通过涂布光阻、曝光、显影、刻蚀等流程，将所述阵列基板10对应的所述扇出走线区121的阵列结构中的最上面两层（平坦化层以及像素定义层）去除而形成的。
具体地，相邻两所述第一沟槽之间的间距范围在10-1000μm之间。
如图4所示，为本申请实施例OLED显示面板在扇出走线区中的第一区域的截面结构示意图。其中，所述阵列基板10对应于所述非显示区域12中远离所述扇出走线区121的部分包括柔性衬底101、无机缓冲层102、阻隔层103、第一栅极绝缘层104、第一金属走线层161、第二栅极绝缘层105、第二金属走线层162、层间绝缘层106、源漏极金属层107、平坦化层108以及像素定义层109。
具体地，所述第一栅极绝缘层104和所述第二栅极绝缘层105的厚度之和与所述第一金属走线层161的厚度相同，所述第二金属走线层162的厚度与所述第一金属走线层161的厚度相同。
具体地，所述平坦化层108的材料与所述像素定义层109的材料均为有机光阻。
优选地，所述柔性衬底101的材质为聚酰亚胺，所述源漏极金属层107的材料与所述第一金属走线层161的材料相同。
在利用无机/有机/无机膜层堆叠的方式进行薄膜封装时由于薄膜封装层中的薄膜封装有机层具有流动性，为将其限制在特定区域内，会在器件周围设置所述第一挡墙14以及所述第二挡墙15。
为了所述OLED显示面板下边框处的所述扇出走线区121中的金属导线之间的互相搭接，或者为了增加所述扇出走线区121的边缘处薄膜封装有机层的相对厚度，会刻蚀掉靠近所述第一挡墙14内侧区域的所述阵列基板10中的所述平坦化层108以及所述像素定义层109，从而形成所述第一沟槽17。因此，在所述第一区域1211内，所述第一区域1211中的所述金属走线16沿着垂直于所述第一挡墙14的方向排布，所述阵列基板10对应于所述第一沟槽17处的部分包括所述柔性衬底101、所述无机缓冲层102、所述阻隔层103、所述第一栅极绝缘层104、所述第一金属走线层161、所述第二栅极绝缘层105、所述第二金属走线层162、所述层间绝缘层106以及所述107源漏极金属层。
如图5所示，为本申请实施例OLED显示面板在所述扇出走线区121中的第二沟槽示意图。其中，所述第二区域1212中的所述金属走线16与所述第一挡墙14的夹角为锐角，所述第二沟槽18设置于所述第二区域1212，且所述第二沟槽18沿着垂直于所述第一挡墙14的方向排布。
具体地，所述第二沟槽18是通过涂布光阻、曝光、显影、刻蚀等流程，将所述阵列基板10对应的所述第二区域1212的阵列结构中的位于金属走线层垂直方向上的栅极绝缘层刻蚀掉去除而形成的。
具体地，所述第二沟槽18沿着垂直于所述第一挡墙14的方向排布，相邻的两所述第二沟槽18之间通过所述第一沟槽17连通。
优选地，相邻两所述第二沟槽18之间的间距范围在10-1000μm之间。其中，所述第二沟槽18的底面图形为条形或波浪形。
优选地，所述第二沟槽18在一个垂直截面的截面形状为矩形、梯形或圆形中的至少一种，所述垂直截面的法线方向与所述阵列基板10所在平面的法线方向互相垂直。
在进行薄膜封装时，对薄膜封装有机层在所述阵列基板10上进行打印。打印薄膜封装有机层时，一般会使薄膜封装有机层由所述显示区域11向所述非显示区域12进行扩散。因为OLED显示器件down border（下边框）处金属导线较密集，不同区域金属导线的走向有差别，使得表面形貌不一样，导致薄膜封装有机层的流动性有差别。当部分薄膜封装有机层会在所述第二区域1212（OLED显示面板下边框处金属导线与挡墙成锐角的区域）发生异常扩散时，薄膜封装有机层会首先进入设置在所述第二区域1212的多道所述第二沟槽18。由于所述第二沟槽18的走向与所述第一挡墙14垂直，流入所述第二沟槽18的薄膜封装有机层会被所述第一挡墙14挡回，薄膜封装有机层会沿着所述第二沟槽18并经与其连通的所述第一沟槽17流向未发生异常扩散的位置，从而极大的减少了薄膜封装有机层流平时外溢的可能性，防止薄膜封装有机层与外界接触后造成封装失效，大大地提高了封装效果，延长了OLED器件的使用寿命。
如图6A所示，为图5中Ⅰ-Ⅰ处的截面结构示意图。其中，所述阵列基板10对应于所述非显示区域12中远离所述扇出走线区121的部分包括柔性衬底101、无机缓冲层102、阻隔层103、第一栅极绝缘层104、第一金属走线层161、第二栅极绝缘层105、第二金属走线层162、层间绝缘层106、源漏极金属层107、平坦化层108以及像素定义层109。
具体地，所述第一栅极绝缘层104和所述第二栅极绝缘层105的厚度之和与所述第一金属走线层161的厚度相同，所述第二金属走线层162的厚度与所述第一金属走线层161的厚度相同。
具体地，所述平坦化层108的材料与所述像素定义层109的材料均为有机光阻。
在所述第二区域1212内，所述第二区域1212中的所述金属走线16与所述第一挡墙14的夹角为锐角，所述阵列基板10在所述第二区域1212内对应于所述第一沟槽17处的部分包括所述柔性衬底101、所述无机缓冲层102、所述阻隔层103、所述第一栅极绝缘层104、所述第一金属走线层161、所述第二栅极绝缘层105、所述第二金属走线层162、所述层间绝缘层106以及所述107源漏极金属层。
如图6B所示，为图5中Ⅱ-Ⅱ处的截面结构示意图。其中，所述阵列基板10对应于所述非显示区域12中远离所述扇出走线区121的部分包括柔性衬底101、无机缓冲层102、阻隔层103、第一栅极绝缘层104、第一金属走线层161、第二栅极绝缘层105、第二金属走线层162、层间绝缘层106、源漏极金属层107、平坦化层108以及像素定义层109。具体地，所述第一栅极绝缘层104和所述第二栅极绝缘层105的厚度之和与所述第一金属走线层161的厚度相同，所述第二金属走线层162的厚度与所述第一金属走线层161的厚度相同。具体地，所述平坦化层108的材料与所述像素定义层109的材料均为有机光阻。
在所述第二区域1212内，所述第二区域1212中的所述金属走线16与所述第一挡墙14的夹角为锐角。将所述第一金属走线层161以及所述第二金属走线层162垂直方向上的所述第一栅极绝缘层104与所述第二栅极绝缘层105刻蚀掉，形成了所述第二沟槽18，所述第二沟槽18沿着垂直于所述第一挡墙14的方向排布。因此，所述阵列基板10在所述第二区域1212内对应于所述第二沟槽18处的部分包括所述柔性衬底101、所述无机缓冲层102、所述阻隔层103、所述第一栅极绝缘层104、所述第一金属走线层161、所述第二栅极绝缘层105、所述第二金属走线层162、所述层间绝缘层106以及所述107源漏极金属层。
本申请实施例提出一种OLED器件在下边框处的结构设计。由于在下边框处的金属导线较为密集且走向有差别，导致薄膜封装有机层流动性的差别也较大。在金属导线与挡墙呈锐角的区域中，薄膜封装有机层流动性较差，本申请实施例按一定规律刻蚀掉这些区域下面的无机绝缘层，这样就形成一道道垂直于挡墙的沟槽，这些沟槽能提升薄膜封装有机层的流动性，进一步提高了薄膜封装有机层在下边框处的成膜均匀性。
在上述实施例中，对各个实施例的描述都各有侧重，某个实施例中没有详述的部分，可以参见其他实施例的相关描述。
综上所述，本申请实施例提供的OLED显示面板，在OLED显示面板下边框处金属导线与挡墙成锐角的区域，设置多道垂直于挡墙方向的沟槽，提升了薄膜封装有机层在该位置的流动性，进一步提高了薄膜封装有机层在下边框处的成膜均匀性，更进一步延长了OLED显示面板的使用寿命。
可以理解的是，对本领域普通技术人员来说，可以根据本申请的技术方案及其发明构思加以等同替换或改变，而所有这些改变或替换都应属于本申请所附的权利要求的保护范围。

Claims (15)

  1. 一种OLED显示面板，包括显示区域以及位于所述显示区域周围的非显示区域，其中，所述OLED显示面板包括：
    阵列基板；
    第一挡墙，设置于所述阵列基板上，所述第一挡墙位于所述非显示区域且围绕所述显示区域；
    第二挡墙，设置于所述阵列基板上，所述第二挡墙位于所述非显示区域且围绕所述第一挡墙，所述第二挡墙与所述第一挡墙相距一段距离；
    多条金属走线，位于所述阵列基板靠近下边框的扇出走线区，所述扇出走线区包括第一区域与第二区域，所述第一区域中的所述金属走线沿着垂直于所述第一挡墙的方向排布，所述第二区域中的所述金属走线与所述第一挡墙的夹角为锐角；
    多个第一沟槽，设置于所述扇出走线区，所述第一沟槽沿着所述金属走线的走向排布；
    其中，所述阵列基板对应于所述第二区域的部分还设置有多个第二沟槽，所述第二沟槽沿着垂直于所述第一挡墙的方向排布；相邻两所述第一沟槽之间的间距范围在10-1000μm之间，相邻两所述第二沟槽之间的间距范围在10-1000μm之间。
  2. 如权利要求1所述的OLED显示面板，其中，所述第二沟槽的底面图形为条形或波浪形。
  3. 如权利要求1所述的OLED显示面板，其中，所述第二沟槽在一个垂直截面的截面形状为矩形、梯形或圆形中的至少一种，所述垂直截面的法线方向与所述阵列基板所在平面的法线方向互相垂直。
  4. 如权利要求1所述的OLED显示面板，其中，相邻的两所述第二沟槽之间通过所述第一沟槽连通。
  5. 如权利要求1所述的OLED显示面板，其中，所述阵列基板对应于所述非显示区域中远离所述扇出走线区的部分包括柔性衬底、无机缓冲层、阻隔层、第一栅极绝缘层、第一金属走线层、第二栅极绝缘层、第二金属走线层、层间绝缘层、源漏极金属层、平坦化层以及像素定义层。
  6. 如权利要求5所述的OLED显示面板，其中，所述第一栅极绝缘层和所述第二栅极绝缘层的厚度之和与所述第一金属走线层的厚度相同，所述第二金属走线层的厚度与所述第一金属走线层的厚度相同。
  7. 如权利要求5所述的OLED显示面板，其中，所述平坦化层的材料与所述像素定义层的材料均为有机光阻。
  8. 如权利要求1所述的OLED显示面板，其中，所述阵列基板对应于所述第一沟槽处的部分包括柔性衬底、无机缓冲层、阻隔层、第一栅极绝缘层、第一金属走线层、第二栅极绝缘层、第二金属走线层、层间绝缘层以及源漏极金属层。
  9. 如权利要求1所述的OLED显示面板，其中，所述阵列基板对应于所述第二沟槽处的部分包括柔性衬底、无机缓冲层、阻隔层、第一金属走线层、第二金属走线层、层间绝缘层以及源漏极金属层。
  10. 一种OLED显示面板，包括显示区域以及位于所述显示区域周围的非显示区域，其中，所述OLED显示面板包括：
    阵列基板；
    第一挡墙，设置于所述阵列基板上，所述第一挡墙位于所述非显示区域且围绕所述显示区域；
    第二挡墙，设置于所述阵列基板上，所述第二挡墙位于所述非显示区域且围绕所述第一挡墙，所述第二挡墙与所述第一挡墙相距一段距离；
    多条金属走线，位于所述阵列基板靠近下边框的扇出走线区，所述扇出走线区包括第一区域与第二区域，所述第一区域中的所述金属走线沿着垂直于所述第一挡墙的方向排布，所述第二区域中的所述金属走线与所述第一挡墙的夹角为锐角；
    多个第一沟槽，设置于所述扇出走线区，所述第一沟槽沿着所述金属走线的走向排布；
    其中，所述阵列基板对应于所述第二区域的部分还设置有多个第二沟槽，所述第二沟槽沿着垂直于所述第一挡墙的方向排布。
  11. 如权利要求10所述的OLED显示面板，其中，所述阵列基板对应于所述非显示区域中远离所述扇出走线区的部分包括柔性衬底、无机缓冲层、阻隔层、第一栅极绝缘层、第一金属走线层、第二栅极绝缘层、第二金属走线层、层间绝缘层、源漏极金属层、平坦化层以及像素定义层。
  12. 如权利要求11所述的OLED显示面板，其中，所述第一栅极绝缘层和所述第二栅极绝缘层的厚度之和与所述第一金属走线层的厚度相同，所述第二金属走线层的厚度与所述第一金属走线层的厚度相同。
  13. 如权利要求11所述的OLED显示面板，其中，所述平坦化层的材料与所述像素定义层的材料均为有机光阻。
  14. 如权利要求10所述的OLED显示面板，其中，所述阵列基板对应于所述第一沟槽处的部分包括柔性衬底、无机缓冲层、阻隔层、第一栅极绝缘层、第一金属走线层、第二栅极绝缘层、第二金属走线层、层间绝缘层以及源漏极金属层。
  15. 如权利要求10所述的OLED显示面板，其中，所述阵列基板对应于所述第二沟槽处的部分包括柔性衬底、无机缓冲层、阻隔层、第一金属走线层、第二金属走线层、层间绝缘层以及源漏极金属层。
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