WO2020235373A1 - 基板処理方法及び基板処理システム - Google Patents
基板処理方法及び基板処理システム Download PDFInfo
- Publication number
- WO2020235373A1 WO2020235373A1 PCT/JP2020/018795 JP2020018795W WO2020235373A1 WO 2020235373 A1 WO2020235373 A1 WO 2020235373A1 JP 2020018795 W JP2020018795 W JP 2020018795W WO 2020235373 A1 WO2020235373 A1 WO 2020235373A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- substrate
- wafer
- separation
- separated
- module
- Prior art date
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 124
- 238000003672 processing method Methods 0.000 title claims abstract description 16
- 238000000926 separation method Methods 0.000 claims description 234
- 238000005530 etching Methods 0.000 claims description 32
- 238000000034 method Methods 0.000 claims description 28
- 238000000227 grinding Methods 0.000 claims description 26
- 238000005304 joining Methods 0.000 claims description 26
- 230000008569 process Effects 0.000 claims description 24
- 239000011241 protective layer Substances 0.000 claims description 24
- 235000012431 wafers Nutrition 0.000 description 513
- 239000010410 layer Substances 0.000 description 27
- 239000012790 adhesive layer Substances 0.000 description 23
- 230000004048 modification Effects 0.000 description 17
- 238000012986 modification Methods 0.000 description 17
- 230000002093 peripheral effect Effects 0.000 description 17
- 239000002390 adhesive tape Substances 0.000 description 15
- 239000004065 semiconductor Substances 0.000 description 10
- 238000004140 cleaning Methods 0.000 description 9
- 238000006116 polymerization reaction Methods 0.000 description 9
- 238000004519 manufacturing process Methods 0.000 description 8
- 230000007704 transition Effects 0.000 description 7
- 230000001681 protective effect Effects 0.000 description 6
- 238000002407 reforming Methods 0.000 description 5
- 238000005201 scrubbing Methods 0.000 description 4
- 239000000853 adhesive Substances 0.000 description 3
- 230000001070 adhesive effect Effects 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000003223 protective agent Substances 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 238000003860 storage Methods 0.000 description 2
- 230000006870 function Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/30604—Chemical etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67017—Apparatus for fluid treatment
- H01L21/67063—Apparatus for fluid treatment for etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67017—Apparatus for fluid treatment
- H01L21/67063—Apparatus for fluid treatment for etching
- H01L21/67075—Apparatus for fluid treatment for etching for wet etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67092—Apparatus for mechanical treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67132—Apparatus for placing on an insulating substrate, e.g. tape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/7806—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices involving the separation of the active layers from a substrate
- H01L21/7813—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices involving the separation of the active layers from a substrate leaving a reusable substrate, e.g. epitaxial lift off
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
Definitions
- This disclosure relates to a substrate processing method and a substrate processing system.
- Patent Document 1 discloses a method for manufacturing a semiconductor device.
- the back surface of the wafer is ground while the front surface of the wafer is fixed to the support member, the wafer is further divided, and then the support member is peeled off from the wafer to obtain a plurality of semiconductor chips.
- the thickness of the support member is thicker than the thickness of the wafer after grinding, for example, the thickness of the wafer is about 700 ⁇ m to 800 ⁇ m, while the thickness of the support member is about 1 mm to 2 mm.
- Patent Document 2 discloses a method for manufacturing a semiconductor chip. In this manufacturing method, with the support member attached to the front surface of the wafer, the back surface of the wafer is ground, the wafer is attached to the dicing frame, the support member is further peeled from the wafer, and then the wafer is divided into a plurality of pieces. Manufactures semiconductor chips.
- the technology according to the present disclosure reduces the cost in manufacturing a semiconductor device by separating the substrate and joining the thinned substrate to the substrate to be processed and reusing it.
- One aspect of the present disclosure is a substrate processing method for processing a substrate to be processed in which a device is formed on the surface, and the first separation substrate on the side where the device substrate is separated and the side without the device are separated.
- the second separation substrates the second separation substrate is prepared, and the second separation substrate is reused and joined to the substrate to be processed.
- a semiconductor wafer (hereinafter referred to as a wafer) in which a plurality of devices are formed on the surface is thinned and further diced with a support substrate attached to the surface. .. Then, the support substrate is peeled off from the wafer to manufacture a semiconductor chip (hereinafter referred to as a chip).
- the support substrate is temporarily attached to the wafer and peeled off from the wafer after the desired processing is completed. Therefore, from the viewpoint of cost reduction, it is preferable that the support substrate is used repeatedly. Therefore, the present inventors further reduced the cost, and when thinning the wafer, separated the front side wafer and the back side wafer on which the device was formed, and re-used the separated back side wafer as a support substrate. I came up with the idea of using it.
- FIG. 1 is a plan view schematically showing an outline of the configuration of the wafer processing system 1.
- the device wafer W as the processing target substrate (device substrate) and the reused wafer S reused as the support wafer are formed via the adhesive tape B as the adhesive layer. They are joined to form a polymerized wafer T, and the desired treatment is performed.
- the surface bonded to the reused wafer S via the adhesive tape B is referred to as a front surface Wa
- the surface opposite to the front surface Wa is referred to as a back surface Wb.
- the surface bonded to the device wafer W via the adhesive tape B is referred to as a front surface Sa
- the surface opposite to the front surface Sa is referred to as a back surface Sb.
- the device wafer W is, for example, a semiconductor wafer such as a silicon substrate, and a device layer (not shown) containing a plurality of devices is formed on the surface Wa.
- the reused wafer S is a wafer that supports the device wafer W, and is, for example, a silicon wafer.
- the second separated wafer W2 separated from the previously processed device wafer W is reused and used.
- the device wafer W in the polymerization wafer T is separated.
- the separated device wafer W on the surface Wa side is referred to as a first separation wafer W1 as a first separation substrate, and is shown in FIG. 3B.
- the device wafer W on the back surface Wb side separated in this way is referred to as a second separation wafer W2 as a second separation substrate.
- the first separation wafer W1 has a device layer and is divided into a plurality of chips to be commercialized.
- the second separation wafer W2 is reused for the reuse wafer S as described later.
- the surface separated in the first separation wafer W1 is referred to as a separation surface W1a, that is, the separation surface W1a is a surface opposite to the surface Wa.
- the surface separated in the second separation wafer W2 is referred to as a separation surface W2a, that is, the separation surface W2a is a surface opposite to the back surface Wb.
- a dicing film D (DAF: Die Attach Film) and a dicing tape P are attached to the device wafer W (first separation wafer W1) to form a dicing frame. It is fixed to F and the desired treatment is performed.
- DAF Die Attach Film
- the die attach film D has adhesiveness on both sides, and joins the first separated wafers W1 to each other when a plurality of the first separated wafers W1 are laminated.
- the dicing tape P has adhesiveness on only one side, and the die attach film D is attached to the one side.
- the dicing frame F fixes the dicing tape P attached to the first separation wafer W1 via the die attach film D.
- the wafer processing system 1 includes a joining device 10 for joining the device wafer W and the reused wafer S, and a wafer processing device 20 for performing desired processing on the polymerized wafer T after joining. ..
- the device configuration in the wafer processing system 1 is arbitrary, and for example, the module of the joining device 10 and the module of the wafer processing device 20 may be provided in different devices.
- the wafer processing system 1 is provided with a control device 30.
- the control device 30 is, for example, a computer equipped with a CPU, a memory, or the like, and has a program storage unit (not shown).
- the program storage unit stores a program that controls wafer processing in the wafer processing system 1. Further, the program storage unit also stores a program for controlling the operation of drive systems such as various processing devices and transfer devices to realize wafer processing in the wafer processing system 1.
- the program may be recorded on a computer-readable storage medium H and may be installed on the control device 30 from the storage medium H.
- the joining device 10 has a configuration in which the loading / unloading station 40 and the processing station 41 are integrally connected.
- the loading / unloading station 40 and the processing station 41 are arranged side by side from the negative direction side of the X axis to the positive direction side.
- the carry-in / out station 40 carries in / out cassettes Cw, Cs, and Ct capable of accommodating a plurality of device wafers W, a plurality of reused wafers S, and a plurality of polymerized wafers T, respectively, to and from the outside.
- the processing station 41 includes various processing devices that perform desired processing on the device wafer W, the recycled wafer S, and the polymerization wafer T.
- the loading / unloading station 40 is provided with a cassette mounting stand 50.
- a plurality of cassettes for example, three cassettes Cw, Cs, and Ct can be freely mounted in a row in the Y-axis direction on the cassette mounting table 50.
- the number of cassettes Cw, Cs, and Ct mounted on the cassette mounting table 50 is not limited to this embodiment and can be arbitrarily determined.
- the loading / unloading station 40 is provided with a wafer transfer area 60 adjacent to the cassette mounting table 50 on the X-axis positive direction side of the cassette mounting table 50.
- the wafer transfer region 60 is provided with a wafer transfer device 62 that is movable on a transfer path 61 extending in the Y-axis direction.
- the wafer transfer device 62 has two transfer arms 63 and 63 that hold and transfer the device wafer W, the recycled wafer S, and the polymerized wafer T.
- Each transport arm 63 is configured to be movable in the horizontal direction, the vertical direction, the horizontal axis, and the vertical axis.
- the configuration of the transport arm 63 is not limited to this embodiment, and any configuration can be adopted.
- the wafer transfer device 62 transfers the device wafer W, the reused wafer S, and the polymerized wafer T to the cassettes Cw, Cs, and Ct of the cassette mounting table 50, and the adhesive layer forming module 70 and the bonding module 71 described later. It is configured to be possible.
- the adhesive layer forming module 70 and the bonding module 71 as a bonding portion are arranged side by side in the Y-axis direction on the X-axis positive direction side of the wafer transfer region 60.
- the number and arrangement of these modules 70 to 71 are not limited to this embodiment, and can be arbitrarily determined.
- the adhesive tape B is attached to the surface Wa of the device wafer W.
- the adhesive tape B may be attached to the surface Sa of the recycled wafer S. Further, a known device is used for the adhesive layer forming module 70.
- the device wafer W and the reused wafer S are joined.
- the device wafer W and the reused wafer S are pressed and joined via the adhesive tape B.
- a known device is used for the joining module 71.
- the wafer processing device 20 has a configuration in which the loading / unloading station 80 and the processing station 81 are integrally connected.
- the loading / unloading station 80 and the processing station 81 are arranged side by side from the negative direction side of the X axis to the positive direction side.
- cassettes Ct, Cw1 and Cw2 capable of accommodating a plurality of polymerization wafers T, a plurality of first separation wafers W1 and a plurality of second separation wafers W2 are carried in / out from the outside. Is done.
- the processing station 81 is provided with various processing devices that perform desired processing on the polymerization wafer T, the separation wafers W1 and W2.
- the cassette Ct and the cassette Cw1 are provided separately, but the same cassette may be used. That is, a cassette containing the polymerized wafer T before processing and a cassette containing the first separation wafer W1 after processing may be used in common.
- the loading / unloading station 80 is provided with a cassette mounting stand 90.
- a plurality of cassettes for example, three cassettes Ct, Cw1 and Cw2 can be freely mounted in a row in the Y-axis direction on the cassette mounting table 90.
- the number of cassettes Ct, Cw1 and Cw2 mounted on the cassette mounting table 90 is not limited to this embodiment and can be arbitrarily determined.
- the loading / unloading station 80 is provided with a wafer transfer area 100 adjacent to the cassette mounting table 90 on the X-axis positive direction side of the cassette mounting table 90.
- the wafer transfer region 100 is provided with a wafer transfer device 102 that is movable on a transfer path 101 extending in the Y-axis direction.
- the wafer transfer device 102 has two transfer arms 103 and 103 that hold and transfer the polymerized wafer T and the separated wafers W1 and W2.
- Each transport arm 103 is configured to be movable in the horizontal direction, the vertical direction, the horizontal axis, and the vertical axis.
- the configuration of the transport arm 103 is not limited to this embodiment, and any configuration can be adopted.
- the wafer transfer device 102 is configured to be able to transfer the polymerization wafer T and the separation wafers W1 and W2 to the cassettes Ct, Cw1, Cw2 of the cassette mounting table 90 and the transition device 110 described later.
- the loading / unloading station 80 is provided with a transition device 110 for delivering the polymerized wafer T and the separated wafers W1 and W2 adjacent to the wafer transport region 100 on the X-axis positive direction side of the wafer transport region 100. There is.
- the processing station 81 is provided with a wafer transfer area 120, a first processing block 130, and a second processing block 140.
- the first processing block 130 is arranged on the Y-axis positive direction side of the wafer transfer area 120
- the second processing block 140 is arranged on the Y-axis negative direction side of the wafer transfer area 120.
- the wafer transfer region 120 is provided with a wafer transfer device 122 that is movable on a transfer path 121 extending in the X-axis direction.
- the wafer transfer device 122 has two transfer arms 123 and 123 that hold and transfer the polymerization wafer T and the separation wafers W1 and W2.
- Each transport arm 123 is configured to be movable in the horizontal direction, the vertical direction, the horizontal axis, and the vertical axis.
- the configuration of the transport arm 123 is not limited to this embodiment, and any configuration can be adopted.
- the wafer transfer device 122 is configured to be capable of transferring the polymerization wafer T, the separation wafers W1 and W2 to each processing module of the transition device 110, the first processing block 130, and the second processing block 140. There is.
- a reforming module 131 a separation module 132 as a separation unit, a grinding module 133 as a grinding unit, an inversion module 134, a cleaning module 135, and an etching module 136 as an etching unit are provided on the X-axis. They are arranged side by side in the direction. The number and arrangement of these modules 131 to 136 are not limited to this embodiment and can be arbitrarily determined.
- the inside of the device wafer W is irradiated with a laser beam to form a reforming layer.
- a laser beam As the laser light, a laser light having a wavelength that is transparent to the device wafer W is used.
- the modified layer is formed along the separation surface W1a of the first separation wafer W1 and the separation surface W2a of the second separation wafer W2.
- the configuration of the modification module 131 is arbitrary.
- the device wafer W is separated into the first separation wafer W1 and the second separation wafer W2 based on the modification layer formed by the modification module 131.
- the separation module 132 while the first separation wafer W1 and the second separation wafer W2 are attracted and held by chucks (not shown), for example, a wedge-shaped blade (not shown) is inserted and separated.
- the first separation wafer W1 and the second separation wafer W2 are edge-cut with the surfaces W1a and W2a as boundaries. After that, the chuck is separated to separate the first separation wafer W1 and the second separation wafer W2.
- the configuration of the separation module 132 is arbitrary.
- the grinding module 133 grinds the separation surface W1a of the first separation wafer W1 or the separation surface W2a of the second separation wafer W2.
- a known device is used for the grinding module 133.
- the inversion module 134 In the inversion module 134, the front and back surfaces of the first separation wafer W1 or the second separation wafer W2 separated by the separation module 132 are inverted.
- a known device is used for the inversion module 134.
- the separation surface W1a of the first separation wafer W1 or the separation surface W2a of the second separation wafer W2 is scrubbed.
- a known device is used for the cleaning module 135.
- the separation surface W1a of the first separation wafer W1 or the separation surface W2a of the second separation wafer W2 is etched.
- a known device is used for the etching module 136.
- a sticking module 141 as a sticking part, a dicing module 142 as a dicing part, a fixing module 143 as a fixing part, a peeling module 144 as a peeling part, and an adhesive layer removing module 145 are X. They are arranged side by side in the axial direction. The number and arrangement of these modules 141 to 145 are not limited to this embodiment, and can be arbitrarily determined.
- the attachment module 141 a mounting process is performed in which the die attach film D is attached to the separation surface W1a of the first separation wafer W1.
- a known device is used for the sticking module 141.
- the die attach film D or the first separation wafer W1 is diced using a laser beam.
- the specifications of the laser beam used for dicing the die attach film D and the laser beam used for dicing the first separation wafer W1 are different.
- the configuration of the dicing module 142 is arbitrary, but for example, different laser beams may be emitted from the same laser head, or different laser beams may be emitted from different laser heads.
- the dicing tape P is attached to the first separation wafer W1 supported by the reused wafer S, and the mounting process of fixing the first separation wafer W1 to the dicing frame F is performed.
- a known device is used for the fixing module 143.
- the peeling module 144 peels the reused wafer S from the first separated wafer W1.
- a known device is used for the peeling module 144.
- the adhesive tape B remaining on the surface Wa of the first separation wafer W1 is peeled off and removed.
- a known device is used for the adhesive layer removing module 145.
- FIG. 4 is a flow chart showing a main process of wafer processing according to the first embodiment.
- FIG. 5 is an explanatory diagram schematically showing each step of wafer processing according to the first embodiment.
- FIG. 6 is an explanatory side view schematically showing a part of the wafer processing steps according to the first embodiment.
- cassettes Cw and Cs containing a plurality of device wafers W and reused wafers S shown in FIG. 5A are placed on the cassette mounting table 50 of the loading / unloading station 40.
- the device wafer W in the cassette Cw is taken out by the wafer transfer device 62 and transferred to the adhesive layer forming module 70.
- the adhesive tape B is attached to the surface Wa of the device wafer W.
- the device wafer W is transferred to the bonding module 71 by the wafer transfer device 62.
- the recycled wafer S in the cassette Cs is also taken out by the wafer transfer device 62 and transferred to the joining module 71.
- the joining module 71 the device wafer W and the reused wafer S are pressed and joined via the adhesive tape B as shown in FIG. 5 (b) (step A1 in FIG. 4).
- the polymerized wafer T to which the device wafer W and the reused wafer S are bonded is transferred to the cassette Ct of the cassette mounting table 50 by the wafer transfer device 62. In this way, a series of joining processes in the joining device 10 is completed.
- the cassette Ct containing the plurality of polymerized wafers T is carried out from the loading / unloading station 40 and transported to the wafer processing apparatus 20.
- the cassette Ct is placed on the cassette mounting table 90 of the loading / unloading station 80.
- the polymerized wafer T in the cassette Ct is taken out by the wafer transfer device 102 and transferred to the transition device 110.
- the wafer transfer device 122 takes out the polymerized wafer T of the transition device 110 and transfers it to the reforming module 131.
- the modification module 131 as shown in FIG. 5C, the inside of the device wafer W is irradiated with laser light to form the modification layer M (step A2 in FIG. 4).
- the peripheral modified layer M1 and the internal surface modified layer M2 are formed as shown in FIG. 6A.
- the peripheral edge modification layer M1 is formed in an annular shape and serves as a base point when the peripheral edge portion We is removed in the edge trim.
- the edge trim is a process for preventing the peripheral edge portion We of the device wafer W from becoming a sharply pointed shape (so-called knife edge shape) after the device wafer W is separated as described later.
- the internal surface modification layer M2 serves as a base point for separating and thinning the device wafer W.
- the internal surface modification layer M2 is formed by extending from the central portion to the peripheral surface modification layer M1 along the surface direction of the device wafer W.
- the polymerized wafer T is transferred to the separation module 132 by the wafer transfer device 102.
- the separation module 132 as shown in FIG. 5D, the device wafer W in the polymerization wafer T is separated into the first separation wafer W1 and the second separation wafer W2 (step A3 in FIG. 4).
- step A3 as shown in FIG. 6B, the device wafer W is separated into the first separation wafer W1 and the second separation wafer W2 based on the peripheral modification layer M1 and the inner surface modification layer M2. .. At this time, the peripheral edge portion We is attached to the second separation wafer W2 and integrated, and the peripheral edge portion We is removed from the first separation wafer W1.
- the second separated wafer W2 is transferred to the reversing module 134 by the wafer transfer device 122.
- the inversion module 134 the front and back surfaces of the second separation wafer W2 are inverted (step A4 in FIG. 4). That is, in the inversion module 134, the separation surface W2a of the second separation wafer W2 is directed upward.
- the second separated wafer W2 is transferred to the cleaning module 135 by the wafer transfer device 122.
- the cleaning module 135 the separation surface W2a of the second separation wafer W2 is scrubbed (step A5 in FIG. 4).
- the second separated wafer W2 is transferred to the etching module 136 by the wafer transfer device 122.
- the etching module 136 as shown in FIG. 5E, the separation surface W2a of the second separation wafer W2 is wet-etched by the etching solution (step A6 in FIG. 4). By this etching, the peripheral modification layer M1 and the internal modification layer M2 remaining on the separation surface W2a are removed.
- the second separated wafer W2 is transferred to the grinding module 133 by the wafer transfer device 122.
- the separation surface W2a of the second separation wafer W2 is ground as shown in FIG. 5 (f) (step A7 in FIG. 4).
- the protruding peripheral edge portion on the outer peripheral portion of the separation surface W2a is removed.
- the second separated wafer W2 is transferred to the cleaning module 135 by the wafer transfer device 122.
- the cleaning module 135 the separation surface W2a of the second separation wafer W2 is scrubbed (step A8 in FIG. 4).
- the second separated wafer W2 is transferred to the etching module 136 by the wafer transfer device 122.
- the etching module 136 as shown in FIG. 5 (g), the separation surface W2a of the second separation wafer W2 is wet-etched by the etching solution (step A9 in FIG. 4). By this etching, the grinding marks remaining on the separation surface W2a are removed.
- the second separated wafer W2 that has been subjected to all the processing is conveyed to the transition device 110 by the wafer transfer device 122, and further transferred to the cassette Cw2 of the cassette mounting table 90 by the wafer transfer device 102.
- the second separation wafer W2 subjected to the above treatment has a thickness of, for example, 400 ⁇ m to 700 ⁇ m. Therefore, the second separation wafer W2 is reused as the reuse wafer S of the device wafer W to be processed next. That is, as shown in FIGS. 5A and 5B, the second separation wafer W2 is joined to the device wafer W to be processed next and functions as a support wafer.
- the desired processing is performed on the first separation wafer W1.
- the first separated wafer W1 is transferred to the grinding module 133 by the wafer transfer device 122.
- the separation surface W1a of the first separation wafer W1 is ground as shown in FIG. 5 (h) (step A10 in FIG. 4).
- the first separation wafer W1 is thinned to a desired thickness.
- the first separated wafer W1 is transferred to the cleaning module 135 by the wafer transfer device 122.
- the cleaning module 135 the separation surface W1a of the first separation wafer W1 is scrubbed (step A11 in FIG. 4).
- the first separated wafer W1 is transferred to the etching module 136 by the wafer transfer device 122.
- the etching module 136 as shown in FIG. 5 (i), the separation surface W1a of the first separation wafer W1 is wet-etched by the etching solution (step A12 in FIG. 4).
- the peripheral surface modified layer M1, the internal surface modified layer M2, and the grinding marks remaining on the separation surface W1a are removed.
- the first separated wafer W1 is transferred to the attachment module 141 by the wafer transfer device 122.
- the die attach film D is attached to the separation surface W1a of the first separation wafer W1 as shown in FIG. 5 (j) (step A13 in FIG. 4).
- the first separated wafer W1 is transferred to the dicing module 142 by the wafer transfer device 122.
- the die attach film D is irradiated with laser light as shown in FIG. 5 (k), and the die attach film D is diced (step A14 in FIG. 4).
- the first separation wafer W1 is irradiated with a laser beam as shown in FIG. 5 (l), and the first separation wafer W1 is diced (the first separation wafer W1 is diced. Step A15 in FIG. 4).
- the first separated wafer W1 is transferred to the fixed module 143 by the wafer transfer device 122.
- the dicing tape P is further attached to the die attach film D attached to the surface Wa of the first separation wafer W1 as shown in FIG. 5 (m).
- the first separation wafer W1 is fixed to the dicing frame F via the dicing tape P (step A16 in FIG. 4).
- the first separated wafer W1 is transferred to the reversing module 134 by the wafer transfer device 122.
- the inversion module 134 the front and back surfaces of the first separation wafer W1 (polymerized wafer T) are inverted (step A17 in FIG. 4).
- the first separated wafer W1 is transferred to the peeling module 144 by the wafer transfer device 122.
- the peeling module 144 the reused wafer S is peeled from the first separated wafer W1 as shown in FIG. 5 (n) (step A18 in FIG. 4).
- the first separated wafer W1 is transferred to the adhesive layer removing module 145 by the wafer transfer device 122.
- the adhesive tape B is removed from the surface Wa of the first separation wafer W1 as shown in FIG. 5 (o) (step A19 in FIG. 4).
- the first separated wafer W1 that has been subjected to all the processing is conveyed to the transition device 110 by the wafer transfer device 122, and further transferred to the cassette Cw1 of the cassette mounting table 90 by the wafer transfer device 102.
- the first separation wafer W1 may be conveyed to the cassette Ct. In this way, a series of wafer processing in the wafer processing system 1 is completed.
- Chip C is manufactured by the above process. Then, outside the wafer processing system 1, the chip C is die-bonded as shown in FIG. 5 (p).
- the device wafer W is separated into the first separation wafer W1 and the second separation wafer W2. Then, the first separation wafer W1 is divided into chip C as a product.
- the second separation wafer W2 is joined to the device wafer W to be processed next and reused as the reuse wafer S. Then, the reused wafer S in which the second separated wafer W2 is reused in this way can be repeatedly used for the subsequent processing of the device wafer W.
- the support member of the device wafer W for example, a BG tape or a support wafer (not a reused wafer, but a separately newly prepared support wafer) has been used.
- a cost for preparing the support member there is a cost for preparing the support member.
- the second separation wafer W2 since the second separation wafer W2 is reused as the reuse wafer S of the device wafer W, the cost can be reduced.
- the device wafer W after joining the device wafer W and the reused wafer S, a desired process is performed on the device wafer W, so that these processes can be stably performed. Further, the device wafer W (first separated wafer W1) in a thin state can also be subjected to a desired process such as etching.
- the separation surface W1a of the first separation wafer W1 is formed in step A10. Since it is ground, the amount of grinding in the grinding can be reduced. That is, the grinding of the separation surface W1a can be simplified. Further, when the first separation wafer W1 is etched to a desired thickness in step A12, the grinding in step A10 can be omitted.
- the device wafer W was separated into the first separated wafer W1 and the second separated wafer W2 by performing steps A2 to A3, but the back surface Wb of the device wafer W was ground. May be good.
- step A10 is performed instead of steps A2 to A3 shown in FIG. 4, and subsequent steps A11 to A19 are further performed.
- steps A4 to A9 are omitted.
- the reforming module 131 and the separation module 132 can be omitted.
- FIG. 7 is a flow chart showing a main process of wafer processing according to the second embodiment.
- FIG. 8 is an explanatory diagram schematically showing each step of the wafer processing according to the second embodiment.
- the wafer processing system 1 shown in FIG. 1 is also used in the wafer processing according to the second embodiment.
- steps B1 to B9 of FIG. 7 are sequentially performed in the same manner as the wafer processing steps A1 to A9 of the first embodiment. That is, the joining of the device wafer W and the reused wafer S in step B1 shown in FIGS. 8A and 8B, and the modification layer M (peripheral modification) to the device wafer W in step B2 shown in FIG. 8C.
- the formation of the layer M1 and the internal surface modification layer M2) and the separation of the device wafer W in step B3 shown in FIG. 8D are sequentially performed.
- steps B4 to B9 are performed on the second separated wafer W2 after separation. That is, inversion of the second separation wafer W2 in step B4, scrubbing of the separation surface W2a in step B5, and etching of the separation surface W2a in step B6 shown in FIG. 8E are sequentially performed. Subsequently, grinding of the separation surface W2a in step B7 shown in FIG. 8 (f), scrubbing of the separation surface W2a in step B8, and etching of the separation surface W2a in step B9 shown in FIG. 8 (g) are sequentially performed. Then, the second separation wafer W2 that has been subjected to all the processing is conveyed to the cassette Cw2.
- steps B1 to B9 are the same as steps A1 to A9 of the first embodiment, so description thereof will be omitted.
- the difference between the wafer processing of the second embodiment and the wafer processing of the first embodiment is the processing of the separated first separated wafer W1 described below, specifically, the first separation.
- the timing of dicing the wafer W1 is different.
- the first separated wafer W1 is transferred to the grinding module 133 by the wafer transfer device 122.
- the separation surface W1a of the first separation wafer W1 is ground as shown in FIG. 8 (h) (step B10 in FIG. 7).
- the first separated wafer W1 is transferred to the dicing module 142 by the wafer transfer device 122.
- the dicing module 142 as shown in FIG. 8 (i), the first separation wafer W1 is irradiated with laser light, and the first separation wafer W1 is diced (step B11 in FIG. 7).
- the first separated wafer W1 is transferred to the etching module 136 by the wafer transfer device 122.
- the etching module 136 as shown in FIG. 8J, the separation surface W1a of the first separation wafer W1 is wet-etched by the etching solution (step B12 in FIG. 7).
- the first separated wafer W1 is transferred to the attachment module 141 by the wafer transfer device 122.
- the die attach film D is attached to the separation surface W1a of the first separation wafer W1 as shown in FIG. 8 (k) (step B13 in FIG. 7).
- the first separated wafer W1 is transferred to the dicing module 142 by the wafer transfer device 122.
- the die attach film D is irradiated with a laser beam as shown in FIG. 8 (l), and the die attach film D is diced (step B14 in FIG. 7).
- the first separated wafer W1 is transferred to the fixed module 143 by the wafer transfer device 122.
- the dicing tape P is further attached to the die attach film D attached to the surface Wa of the first separation wafer W1 as shown in FIG. 8 (m).
- the first separation wafer W1 is fixed to the dicing frame F via the dicing tape P (step B15 in FIG. 7).
- the first separated wafer W1 is transferred to the reversing module 134 by the wafer transfer device 122.
- the inversion module 134 the front and back surfaces of the first separation wafer W1 (polymerized wafer T) are inverted (step B16 in FIG. 7).
- the first separated wafer W1 is transferred to the peeling module 144 by the wafer transfer device 122.
- the peeling module 144 the reused wafer S is peeled from the first separated wafer W1 as shown in FIG. 8 (n) (step B17 in FIG. 7).
- the first separated wafer W1 is transferred to the adhesive layer removing module 145 by the wafer transfer device 122.
- the adhesive tape B is removed from the surface Wa of the first separation wafer W1 as shown in FIG. 8 (o) (step B18 in FIG. 7).
- Chip C is manufactured by the above steps. Then, outside the wafer processing system 1, the chip C is die-bonded as shown in FIG. 8 (p).
- the device wafer W is separated into the first separation wafer W1 and the second separation wafer W2 by performing steps B2 to B3, but the device wafer is the same as in the first embodiment.
- the back surface Wb of W may be ground.
- step B10 is performed instead of steps B2 to B3 shown in FIG. 7, and subsequent steps B11 to B18 are further performed. Further, since the device wafer W is ground, steps B4 to B9 are omitted.
- the dicing apparatus 150 shown in FIG. 9 is used.
- the dicing device 150 is provided in the wafer processing system 1 shown in FIG.
- the operation of the dicing device 150 is controlled by the control device 30.
- the dicing device 150 has a configuration in which the loading / unloading station 160 and the processing station 161 are integrally connected.
- the loading / unloading station 160 and the processing station 161 are arranged side by side from the negative direction side of the X axis to the positive direction side.
- cassettes Cw capable of accommodating a plurality of device wafers W are carried in / out from the outside.
- the processing station 161 is provided with various processing devices that perform desired processing on the device wafer W.
- the loading / unloading station 160 is provided with a cassette mounting stand 170.
- a cassette mounting stand 170 In the illustrated example, a plurality of cassettes Cw, for example, three cassettes Cw can be freely mounted in a row in the Y-axis direction on the cassette mounting table 170.
- the number of cassettes Cw mounted on the cassette mounting table 170 is not limited to this embodiment and can be arbitrarily determined.
- the loading / unloading station 160 is provided with a wafer transfer area 180 adjacent to the cassette mounting table 170 on the X-axis positive direction side of the cassette mounting table 170.
- the wafer transfer region 180 is provided with a wafer transfer device 182 that is movable on a transfer path 181 extending in the Y-axis direction.
- the wafer transfer device 182 has two transfer arms 183 and 183 that hold and transfer the device wafer W.
- Each transport arm 183 is configured to be movable in the horizontal direction, the vertical direction, the horizontal axis, and the vertical axis.
- the configuration of the transport arm 183 is not limited to this embodiment, and any configuration can be adopted.
- the wafer transfer device 182 is configured to transfer the device wafer W to the cassette Cw of the cassette mounting table 170, the protective layer forming module 190, the dicing module 191 and the protective layer removing module 192, which will be described later.
- the processing station 161 includes a protective layer forming module 190 as a protective layer forming portion, a dicing module 191 as a dicing portion, and a protective layer removing module 192 as a protective layer removing portion on the X-axis positive direction side of the wafer transfer region 180.
- a protective layer forming module 190 as a protective layer forming portion
- a dicing module 191 as a dicing portion
- a protective layer removing module 192 as a protective layer removing portion on the X-axis positive direction side of the wafer transfer region 180.
- the number and arrangement of these modules 190 to 192 are not limited to this embodiment and can be arbitrarily determined.
- a protective agent is spin-coated on the surface Wa of the device wafer W to form a protective film as a protective layer.
- a known device is used for the protective layer forming module 190.
- the device wafer W is diced using a laser beam.
- the configuration of the dicing module 191 is the same as the configuration of the dicing module 142 described above, and a known device is used.
- the protective film is removed from the surface Wa of the device wafer W, and the surface Wa is spin-cleaned.
- a known device is used for the protective layer removing module 192.
- FIG. 10 is a flow chart showing a main process of wafer processing according to the third embodiment.
- 11 and 12 are explanatory views schematically showing each step of the wafer processing according to the third embodiment. Note that FIG. 11 shows the wafer processing until the device wafer W is separated, and FIG. 12 shows the wafer processing after the device wafer W is separated.
- the cassette Cw containing a plurality of device wafers W shown in FIG. 11A is placed on the cassette mounting table 170 of the loading / unloading station 160.
- the device wafer W in the cassette Cw is taken out by the wafer transfer device 182 and transferred to the protective layer forming module 190.
- the protective agent is spin-coated on the surface Wa of the device wafer W to form the protective film L (step C1 in FIG. 10).
- the device wafer W is transferred to the dicing module 191 by the wafer transfer device 182.
- the dicing module 191 the device wafer W is irradiated with a laser beam as shown in FIG. 11C, and the device wafer W is diced (step C2 in FIG. 10).
- the protective film L protects the device layer formed on the device wafer W.
- the device wafer W is transferred to the protective layer removal module 192 by the wafer transfer device 182.
- the protective layer removing module 192 as shown in FIG. 11D, the solvent of the protective film L is supplied to the surface Wa of the device wafer W, and the protective film L is removed (step C3 in FIG. 10).
- the device wafer W is transferred to the cassette Cw of the cassette mounting table 170 by the wafer transfer device 182. In this way, a series of dicing processes in the dicing apparatus 150 is completed.
- the cassette Cw containing the plurality of device wafers W is carried out from the loading / unloading station 160 and transported to the joining device 10.
- the cassette Cw is placed on the cassette mounting table 50 of the loading / unloading station 40.
- cassettes Cs containing a plurality of reused wafers S shown in FIG. 11E are also mounted on the cassette mounting table 50 of the loading / unloading station 40.
- step C4 is the same as step A1 of the first embodiment, the description thereof will be omitted.
- steps C5 to C12 of FIG. 10 are sequentially performed in the same manner as the wafer processing steps A2 to A9 of the first embodiment. That is, the formation of the modified layer M (peripheral modified layer M1 and the internal surface modified layer M2) on the device wafer W in step C5 shown in FIG. 11 (g), and the device wafer in step C6 shown in FIG. 11 (h). Separation of W is performed in sequence.
- steps C7 to C12 are performed on the second separated wafer W2 after separation. That is, inversion of the second separation wafer W2 in step C7, scrubbing of the separation surface W2a in step C8, and etching of the separation surface W2a in step C9 shown in FIG. 12 (i) are sequentially performed. Subsequently, grinding of the separation surface W2a in step C10 shown in FIG. 12 (j), scrubbing of the separation surface W2a in step C11, and etching of the separation surface W2a in step C12 shown in FIG. 12 (k) are sequentially performed. Then, the second separation wafer W2 that has been subjected to all the processing is conveyed to the cassette Cw2.
- steps C5 to C12 are the same as steps A2 to A9 of the first embodiment, so description thereof will be omitted.
- the first separated wafer W1 is transferred to the grinding module 133 by the wafer transfer device 122.
- the separation surface W1a of the first separation wafer W1 is ground as shown in FIG. 12 (l) (step C13 in FIG. 10).
- the first separated wafer W1 is transferred to the etching module 136 by the wafer transfer device 122.
- the etching module 136 as shown in FIG. 12 (m), the separation surface W1a of the first separation wafer W1 is wet-etched by the etching solution (step C14 in FIG. 10).
- the first separated wafer W1 is transferred to the attachment module 141 by the wafer transfer device 122.
- the die attach film D is attached to the separation surface W1a of the first separation wafer W1 as shown in FIG. 12 (n) (step C15 in FIG. 10).
- the first separated wafer W1 is transferred to the dicing module 142 by the wafer transfer device 122.
- the die attach film D is irradiated with a laser beam as shown in FIG. 12 (o), and the die attach film D is diced (step C16 in FIG. 10).
- the first separated wafer W1 is transferred to the fixed module 143 by the wafer transfer device 122.
- the dicing tape P is further attached to the die attach film D attached to the surface Wa of the first separation wafer W1 as shown in FIG. 12 (p).
- the first separation wafer W1 is fixed to the dicing frame F via the dicing tape P (step C17 in FIG. 10).
- the first separated wafer W1 is transferred to the reversing module 134 by the wafer transfer device 122.
- the inverting module 134 the front and back surfaces of the first separation wafer W1 (polymerized wafer T) are inverted (step C18 in FIG. 10).
- the first separated wafer W1 is transferred to the peeling module 144 by the wafer transfer device 122.
- the peeling module 144 the reused wafer S is peeled from the first separated wafer W1 as shown in FIG. 12 (q) (step C19 in FIG. 10).
- the first separated wafer W1 is transferred to the adhesive layer removing module 145 by the wafer transfer device 122.
- the adhesive tape B is removed from the surface Wa of the first separation wafer W1 as shown in FIG. 12 (r) (step C20 in FIG. 10).
- Chip C is manufactured by the above steps. Then, outside the wafer processing system 1, the chip C is die-bonded as shown in FIG. 12 (s).
- the device wafer W was separated into the first separation wafer W1 and the second separation wafer W2 by performing steps C5 to C6, but the same as in the first and second embodiments.
- the back surface Wb of the device wafer W may be ground.
- step C13 is performed instead of steps C5 to C6 shown in FIG. 10, and subsequent steps C14 to C20 are further performed.
- steps C7 to C12 are omitted.
- the peripheral edge portion We is integrated with the second separated wafer W2, but the device wafer W
- the method of separating the wafers is not limited to this.
- the peripheral modification layer M1 is formed inside the device wafer W up to the outer edge of the device wafer W. Then, when the device wafer W is separated as shown in FIG. 13B, the first separation wafer W1, the second separation wafer W2, and the peripheral edge portion We are separated separately. Even in such a case, the second separation wafer W2 shown in FIG. 13C can be reused, and the chip C can be manufactured from the first separation wafer W1 shown in FIG. 13D. ..
- the adhesive tape B is used as the adhesive layer for joining the device wafer W and the reused wafer S, but an adhesive may be used, for example.
- the adhesive layer forming module 70 the adhesive is spin-coated on the surface Wa of the device wafer W.
- a known device is used for the adhesive layer forming module 70.
- the adhesive layer removing module 145 the adhesive remaining on the surface Wa of the first separation wafer W1 is removed, and the surface Wa is spin-cleaned.
- a known device is used for the adhesive layer removing module 145.
- the second separated wafer W2 subjected to the desired processing in the wafer processing system 1 is reused as the reused wafer S bonded to the device wafer W.
- the reuse destination is not limited to this.
- the thickness of the second separation wafer W2 after the desired treatment is 700 ⁇ m, it can be reused as a substrate of the device wafer W.
- the device wafer W as the substrate to be processed is separated into the first separation wafer W1 and the second separation wafer W2, and the second separation wafer W2 is re-used. It was reused as the used wafer S.
- the reused wafer S may be a wafer separated from the device wafer as another device substrate.
- the pretreatment performed before being transferred to the wafer processing system 1 includes a process of thinning the device wafer. In this thinning process, the device wafer is separated into a first separation wafer in which the device is formed and a second separation wafer in which the device is not formed. The second separated wafer thus separated may be reused as the reused wafer S of the present embodiment.
- Wafer processing system 10 Joining device 20 Wafer processing device 71 Joining module 132 Separation module W device wafer W1 First separation wafer W2 Second separation wafer
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
Description
10 接合装置
20 ウェハ処理装置
71 接合モジュール
132 分離モジュール
W デバイスウェハ
W1 第1の分離ウェハ
W2 第2の分離ウェハ
Claims (15)
- 表面にデバイスが形成された処理対象基板を処理する基板処理方法であって、
デバイス基板が分離された、デバイスがある側の第1の分離基板とデバイスがない側の第2の分離基板のうち、前記第2の分離基板を準備することと、
前記第2の分離基板を再利用して処理対象基板と接合することと、を有する、基板処理方法。 - 前記処理対象基板は前記デバイス基板として用いられ、
前記処理対象基板を、表面側の第1の分離基板と裏面側の第2の分離基板に分離することを有する、請求項1に記載の基板処理方法。 - 前記処理対象基板から分離された前記第2の分離基板の分離面を研削することと、
前記研削された前記第2の分離基板の分離面をエッチングすることと、を有する、請求項2に記載の基板処理方法。 - 前記処理対象基板から分離された前記第1の分離基板の分離面をエッチングすることと、
前記エッチングされた前記第1の分離基板をダイシングすることと、
前記ダイシングされた前記第1の分離基板をダイシングフレームに固定することと、
前記ダイシングフレームに固定された前記第1の分離基板から前記第2の分離基板を剥離することと、を有する、請求項2又は3に記載の基板処理方法。 - 前記エッチングされた前記第1の分離基板の分離面にダイアタッチフィルムを貼り付けることと、
前記ダイアタッチフィルムをダイシングすることと、を有する、請求項4に記載の基板処理方法。 - 前記ダイシングされた第1の分離基板の分離面にダイアタッチフィルムを貼り付けることと、
前記ダイアタッチフィルムをダイシングすることと、を有する、請求項4に記載の基板処理方法。 - 前記第2の分離基板に接合する前の前記処理対象基板の表面に保護層を形成することと、
前記保護層が形成された前記処理対象基板をダイシングすることと、
前記ダイシングされた前記処理対象基板から前記保護層を除去することと、
前記保護層が除去された前記処理対象基板に対して、前記第2の分離基板を再利用して接合することと、
前記処理対象基板を、表面側の第1の分離基板と裏面側の第2の分離基板に分離することと、
前記処理対象基板から分離された前記第1の分離基板の分離面をエッチングすることと、
前記エッチングされた前記第1の分離基板をダイシングフレームに固定することと、
前記ダイシングフレームに固定された前記第1の分離基板から前記第2の分離基板を剥離することと、を有する、請求項1に記載の基板処理方法。 - 前記エッチングされた第1の分離基板の分離面にダイアタッチフィルムを貼り付けることと、
前記ダイアタッチフィルムをダイシングすることと、を有する、請求項7に記載の基板処理方法。 - 前記第2の分離基板に接合された前記処理対象基板を研削することと、
前記研削された前記処理対象基板の研削面をエッチングすることと、
前記エッチングされた前記処理対象基板をダイシングすることと、
前記ダイシングされた前記処理対象基板をダイシングフレームに固定することと、
前記ダイシングフレームに固定された前記処理対象基板から前記第2の分離基板を剥離することと、を有する、請求項1に記載の基板処理方法。 - 表面にデバイスが形成された処理対象基板を処理する基板処理システムであって、
デバイス基板が分離された、デバイスがある側の第1の分離基板とデバイスがない側の第2の分離基板のうち、前記第2の分離基板を再利用して処理対象基板と接合する接合部を有する、基板処理システム。 - 前記処理対象基板は前記デバイス基板として用いられ、
前記処理対象基板を、表面側の第1の分離基板と裏面側の第2の分離基板に分離する分離部を有する、請求項10に記載の基板処理システム。 - 前記第2の分離基板の分離面を研削する研削部と、
前記第2の分離基板の分離面をエッチングするエッチング部と、を有する、請求項10又は11に記載の基板処理システム。 - 前記第1の分離基板をダイシングするダイシング部と、
前記第1の分離基板をダイシングフレームに固定する固定部と、
前記第1の分離基板から前記第2の分離基板を剥離する剥離部と、を有する、請求項10~12のいずれか一項に記載の基板処理システム。 - 前記第1の分離基板の分離面にダイアタッチフィルムを貼り付ける貼付部を有する、請求項10~13のいずれかに記載の基板処理システム。
- 前記第2の分離基板に接合される前の前記処理対象基板の表面に保護層を形成する保護層形成部と、
前記処理対象基板から前記保護層を除去する保護層除去部と、を有する、請求項10~14のいずれか一項に記載の基板処理システム。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202080035527.1A CN113811983A (zh) | 2019-05-23 | 2020-05-11 | 基板处理方法和基板处理*** |
KR1020217040979A KR20220011141A (ko) | 2019-05-23 | 2020-05-11 | 기판 처리 방법 및 기판 처리 시스템 |
JP2021520707A JP7224456B2 (ja) | 2019-05-23 | 2020-05-11 | 基板処理方法及び基板処理システム |
US17/595,658 US20220223475A1 (en) | 2019-05-23 | 2020-05-11 | Substrate processing method and substrate processing system |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2019096791 | 2019-05-23 | ||
JP2019-096791 | 2019-05-23 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2020235373A1 true WO2020235373A1 (ja) | 2020-11-26 |
Family
ID=73458441
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2020/018795 WO2020235373A1 (ja) | 2019-05-23 | 2020-05-11 | 基板処理方法及び基板処理システム |
Country Status (5)
Country | Link |
---|---|
US (1) | US20220223475A1 (ja) |
JP (1) | JP7224456B2 (ja) |
KR (1) | KR20220011141A (ja) |
CN (1) | CN113811983A (ja) |
WO (1) | WO2020235373A1 (ja) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP7332398B2 (ja) * | 2019-09-04 | 2023-08-23 | キオクシア株式会社 | 半導体ウェハ |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006108532A (ja) * | 2004-10-08 | 2006-04-20 | Disco Abrasive Syst Ltd | ウエーハの研削方法 |
JP2010263041A (ja) * | 2009-05-01 | 2010-11-18 | Nitto Denko Corp | ダイアタッチフィルム付きダイシングテープおよび半導体装置の製造方法 |
JP2011171382A (ja) * | 2010-02-16 | 2011-09-01 | Disco Corp | 分割方法 |
JP2016035965A (ja) * | 2014-08-01 | 2016-03-17 | リンテック株式会社 | 板状部材の分割装置および板状部材の分割方法 |
JP2017024039A (ja) * | 2015-07-21 | 2017-02-02 | 株式会社ディスコ | ウエーハの薄化方法 |
JP2017041481A (ja) * | 2015-08-18 | 2017-02-23 | 株式会社ディスコ | ウエーハの加工方法 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI241674B (en) | 2001-11-30 | 2005-10-11 | Disco Corp | Manufacturing method of semiconductor chip |
JP5645678B2 (ja) | 2011-01-14 | 2014-12-24 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
JP6486240B2 (ja) * | 2015-08-18 | 2019-03-20 | 株式会社ディスコ | ウエーハの加工方法 |
-
2020
- 2020-05-11 KR KR1020217040979A patent/KR20220011141A/ko unknown
- 2020-05-11 JP JP2021520707A patent/JP7224456B2/ja active Active
- 2020-05-11 CN CN202080035527.1A patent/CN113811983A/zh active Pending
- 2020-05-11 US US17/595,658 patent/US20220223475A1/en active Pending
- 2020-05-11 WO PCT/JP2020/018795 patent/WO2020235373A1/ja active Application Filing
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006108532A (ja) * | 2004-10-08 | 2006-04-20 | Disco Abrasive Syst Ltd | ウエーハの研削方法 |
JP2010263041A (ja) * | 2009-05-01 | 2010-11-18 | Nitto Denko Corp | ダイアタッチフィルム付きダイシングテープおよび半導体装置の製造方法 |
JP2011171382A (ja) * | 2010-02-16 | 2011-09-01 | Disco Corp | 分割方法 |
JP2016035965A (ja) * | 2014-08-01 | 2016-03-17 | リンテック株式会社 | 板状部材の分割装置および板状部材の分割方法 |
JP2017024039A (ja) * | 2015-07-21 | 2017-02-02 | 株式会社ディスコ | ウエーハの薄化方法 |
JP2017041481A (ja) * | 2015-08-18 | 2017-02-23 | 株式会社ディスコ | ウエーハの加工方法 |
Also Published As
Publication number | Publication date |
---|---|
US20220223475A1 (en) | 2022-07-14 |
CN113811983A (zh) | 2021-12-17 |
JP7224456B2 (ja) | 2023-02-17 |
JPWO2020235373A1 (ja) | 2020-11-26 |
TW202109638A (zh) | 2021-03-01 |
KR20220011141A (ko) | 2022-01-27 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR101561359B1 (ko) | 적층체, 및 그 적층체의 분리 방법 | |
TWI837149B (zh) | 基板處理系統及基板處理方法 | |
KR101579772B1 (ko) | 웨이퍼 레벨 싱귤레이션 방법 및 시스템 | |
JP7133633B2 (ja) | 処理システム及び処理方法 | |
US9595504B2 (en) | Methods and systems for releasably attaching support members to microfeature workpieces | |
CN110199379B (zh) | 半导体基板的处理方法和半导体基板的处理装置 | |
KR102061369B1 (ko) | 제품 기판을 캐리어 기판에 임시로 결합하기 위한 방법 | |
KR20150039685A (ko) | 웨이퍼의 가공 방법 | |
US7846776B2 (en) | Methods for releasably attaching sacrificial support members to microfeature workpieces and microfeature devices formed using such methods | |
WO2020235373A1 (ja) | 基板処理方法及び基板処理システム | |
JP2021103725A (ja) | 基板処理方法及び基板処理システム | |
JP2014017287A (ja) | ウエーハの加工方法 | |
JP7412131B2 (ja) | 基板処理方法及び基板処理システム | |
JP2007134510A (ja) | ウェーハマウンタ装置 | |
TWI845675B (zh) | 基板處理方法及基板處理系統 | |
JP2007005366A (ja) | 半導体装置の製造方法 | |
JP2021040077A (ja) | 基板処理装置及び基板処理方法 | |
CN111052313A (zh) | 基板处理方法 | |
CN114599479B (zh) | 基板处理方法和基板处理*** | |
JP2005116588A (ja) | チップ部品の製造方法 | |
JP2018064121A (ja) | 半導体の製造方法及び半導体製造装置 | |
JP7208062B2 (ja) | デバイスチップの形成方法 | |
JP5489784B2 (ja) | 半導体デバイスの製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 20810485 Country of ref document: EP Kind code of ref document: A1 |
|
DPE1 | Request for preliminary examination filed after expiration of 19th month from priority date (pct application filed from 20040101) | ||
ENP | Entry into the national phase |
Ref document number: 2021520707 Country of ref document: JP Kind code of ref document: A |
|
NENP | Non-entry into the national phase |
Ref country code: DE |
|
ENP | Entry into the national phase |
Ref document number: 20217040979 Country of ref document: KR Kind code of ref document: A |
|
122 | Ep: pct application non-entry in european phase |
Ref document number: 20810485 Country of ref document: EP Kind code of ref document: A1 |