WO2018225809A1 - セラミックス回路基板 - Google Patents
セラミックス回路基板 Download PDFInfo
- Publication number
- WO2018225809A1 WO2018225809A1 PCT/JP2018/021810 JP2018021810W WO2018225809A1 WO 2018225809 A1 WO2018225809 A1 WO 2018225809A1 JP 2018021810 W JP2018021810 W JP 2018021810W WO 2018225809 A1 WO2018225809 A1 WO 2018225809A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- silver
- circuit board
- silver plating
- ceramic
- ceramic circuit
- Prior art date
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- 239000000919 ceramic Substances 0.000 title claims abstract description 45
- 239000000758 substrate Substances 0.000 title claims abstract description 26
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims abstract description 55
- 229910052709 silver Inorganic materials 0.000 claims abstract description 55
- 239000004332 silver Substances 0.000 claims abstract description 55
- 238000007747 plating Methods 0.000 claims abstract description 50
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 35
- 229910052802 copper Inorganic materials 0.000 claims abstract description 33
- 239000010949 copper Substances 0.000 claims abstract description 33
- 239000004065 semiconductor Substances 0.000 claims abstract description 11
- 229910052581 Si3N4 Inorganic materials 0.000 claims abstract description 10
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims abstract description 10
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 claims abstract description 8
- 239000000463 material Substances 0.000 claims abstract description 8
- 230000003746 surface roughness Effects 0.000 claims abstract description 7
- 238000005219 brazing Methods 0.000 claims abstract description 6
- 238000004519 manufacturing process Methods 0.000 claims description 5
- FOIXSVOLVBLSDH-UHFFFAOYSA-N Silver ion Chemical compound [Ag+] FOIXSVOLVBLSDH-UHFFFAOYSA-N 0.000 claims description 3
- 239000011347 resin Substances 0.000 abstract description 14
- 229920005989 resin Polymers 0.000 abstract description 14
- 238000007789 sealing Methods 0.000 abstract description 6
- 239000002105 nanoparticle Substances 0.000 abstract description 3
- 229910052751 metal Inorganic materials 0.000 description 11
- 239000002184 metal Substances 0.000 description 11
- 238000000034 method Methods 0.000 description 10
- 239000004020 conductor Substances 0.000 description 7
- 230000005012 migration Effects 0.000 description 7
- 238000013508 migration Methods 0.000 description 7
- 238000011156 evaluation Methods 0.000 description 6
- 238000005530 etching Methods 0.000 description 5
- 230000017525 heat dissipation Effects 0.000 description 5
- 239000010408 film Substances 0.000 description 4
- 238000005304 joining Methods 0.000 description 4
- 238000002844 melting Methods 0.000 description 3
- 230000008018 melting Effects 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- LTPBRCUWZOMYOC-UHFFFAOYSA-N Beryllium oxide Chemical compound O=[Be] LTPBRCUWZOMYOC-UHFFFAOYSA-N 0.000 description 2
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 2
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 239000012670 alkaline solution Substances 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 238000007650 screen-printing Methods 0.000 description 2
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 2
- 229910010271 silicon carbide Inorganic materials 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- 229910021591 Copper(I) chloride Inorganic materials 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- NINIDFKCEFEMDL-UHFFFAOYSA-N Sulfur Chemical compound [S] NINIDFKCEFEMDL-UHFFFAOYSA-N 0.000 description 1
- 239000002390 adhesive tape Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 239000013590 bulk material Substances 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 239000011651 chromium Substances 0.000 description 1
- 229910017052 cobalt Inorganic materials 0.000 description 1
- 239000010941 cobalt Substances 0.000 description 1
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 description 1
- 230000000052 comparative effect Effects 0.000 description 1
- OXBLHERUFWYNTN-UHFFFAOYSA-M copper(I) chloride Chemical compound [Cu]Cl OXBLHERUFWYNTN-UHFFFAOYSA-M 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 238000007772 electroless plating Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 230000020169 heat generation Effects 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 229910052742 iron Inorganic materials 0.000 description 1
- 230000002427 irreversible effect Effects 0.000 description 1
- 229910052746 lanthanum Inorganic materials 0.000 description 1
- FZLIPJUXYLNCLC-UHFFFAOYSA-N lanthanum atom Chemical compound [La] FZLIPJUXYLNCLC-UHFFFAOYSA-N 0.000 description 1
- 239000002923 metal particle Substances 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 229910000510 noble metal Inorganic materials 0.000 description 1
- 229910052575 non-oxide ceramic Inorganic materials 0.000 description 1
- 239000011225 non-oxide ceramic Substances 0.000 description 1
- 229910052574 oxide ceramic Inorganic materials 0.000 description 1
- 239000011224 oxide ceramic Substances 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- RVTZCBVAJQQJTK-UHFFFAOYSA-N oxygen(2-);zirconium(4+) Chemical compound [O-2].[O-2].[Zr+4] RVTZCBVAJQQJTK-UHFFFAOYSA-N 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 239000011148 porous material Substances 0.000 description 1
- 230000009257 reactivity Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 229910052717 sulfur Inorganic materials 0.000 description 1
- 239000011593 sulfur Substances 0.000 description 1
- 230000008685 targeting Effects 0.000 description 1
- 229910001928 zirconium oxide Inorganic materials 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
- H05K3/244—Finish plating of conductors, especially of copper conductors, e.g. for pads or lands
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
- C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
- C23C18/31—Coating with metals
- C23C18/42—Coating with noble metals
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
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- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
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- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
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- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
- C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
- C23C18/1601—Process or apparatus
- C23C18/1603—Process or apparatus coating on selected surface areas
- C23C18/1605—Process or apparatus coating on selected surface areas by masking
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
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- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/29139—Silver [Ag] as principal constituent
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- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
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- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H01L2224/325—Material
- H01L2224/32501—Material at the bonding interface
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- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
- H01L23/15—Ceramic or glass substrates
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- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
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- H—ELECTRICITY
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
- H01L23/49844—Geometry or layout for devices being provided for in H01L29/00
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- H01L2924/35121—Peeling or delaminating
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/03—Metal processing
- H05K2203/0307—Providing micro- or nanometer scale roughness on a metal surface, e.g. by plating of nodules or dendrites
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
- H05K2203/0703—Plating
- H05K2203/072—Electroless plating, e.g. finish plating or initial plating
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
- H05K3/181—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating
Definitions
- the present invention relates to a ceramic circuit board.
- Ceramic substrates such as alumina, beryllia, silicon nitride, and aluminum nitride are used as circuit substrates used for power modules and the like from the viewpoint of thermal conductivity, cost, safety, and the like. These ceramic substrates are used as a circuit board by joining a metal circuit board such as copper or aluminum or a heat sink. Since these have excellent insulating properties and heat dissipation properties with respect to a resin substrate and a metal substrate having a resin layer as an insulating material, they are used as substrates for mounting high heat dissipation electronic components.
- a ceramic circuit board is used in which a metal circuit board is bonded to the surface of a ceramic board with a brazing material and a semiconductor element is mounted at a predetermined position of the metal circuit board.
- ceramic substrates of aluminum nitride sintered bodies and silicon nitride sintered bodies having high thermal conductivity in response to an increase in heat generation from semiconductor elements due to higher integration, higher frequency, higher output, etc. of semiconductor elements Is used.
- SiC which is expected as a future high-efficiency device, has a driving temperature of 250 ° C. or higher and is expected to be higher than Si, and further application of high-temperature compatible mounting technology is required.
- Patent Document 1 proposes a phenomenon in which the metal particles are several nm in size, the apparent melting point is lower than that of the bulk material, and it is irreversible to join below the melting point and further to the melting point of the particle material after joining. This is considered to be a phenomenon (Patent Document 1).
- a silver nanoparticle-bonded object can be easily bonded to a silver-plated surface from a solid copper surface and has a high bonding strength.
- silver has a very high reactivity with sulfur.
- the silver-plated surface is not excellent in adhesion with a power module sealing resin such as EMC, there is a possibility that the performance and reliability of the power module may be reduced.
- An object of the present invention is to provide a circuit board having improved migration resistance and adhesion with a module sealing resin.
- the present inventors have found that when the conductor side surface is silver-plated, a short circuit between conductors due to silver migration may occur. Since it has an inclined shape, it has been found that pores are likely to occur in the resin, and by establishing a structure in which the silver plating is removed from the side surface, a technology has been established that improves the migration resistance and adhesion to the sealing resin for modules. . That is, the present invention relates to a ceramic circuit in which a copper plate is bonded to both main surfaces of a ceramic substrate made of aluminum nitride or silicon nitride via a brazing material, and silver plating is performed on the copper plate of at least one main surface.
- the side surface of the copper plate is not silver-plated, the thickness of the silver plating is 0.1 ⁇ m to 1.5 ⁇ m, and the arithmetic average roughness Ra of the surface roughness of the circuit board after silver plating is 0
- the present invention provides a ceramic circuit board that is easy to join silver nanoparticles of a semiconductor element, has migration resistance, and has high adhesion to a module sealing resin.
- Example of sectional view of ceramic circuit board Example of sectional view of ceramic circuit board Plan view of ceramic circuit board (plan view of FIG. 1)
- the present invention relates to a ceramic circuit board in which a copper plate is joined to both main surfaces of a ceramic substrate using aluminum nitride or silicon nitride via a brazing material, and silver plating is applied to the copper plate of at least one main surface. Further, the side surface of the copper plate is not subjected to silver plating, the thickness of the silver plating is 0.1 ⁇ m to 1.5 ⁇ m, and the arithmetic average roughness Ra of the surface roughness of the circuit board after silver plating is 0.1 ⁇ m. To 1.5 ⁇ m, which is a ceramic circuit board.
- the ceramic substrate used for the ceramic circuit board of the present invention is not particularly limited, and nitride ceramics such as silicon nitride and aluminum nitride, oxide ceramics such as aluminum oxide and zirconium oxide, silicon carbide, etc. It can be used for carbide ceramics, boride ceramics such as lanthanum boride. However, since the metal plate is bonded to the ceramic substrate by the active metal method, non-oxide ceramics such as aluminum nitride and silicon nitride are suitable. Further, from the viewpoint of excellent mechanical strength and fracture toughness, the silicon nitride substrate is preferable.
- the thickness of the ceramic substrate is not particularly limited, but is generally about 0.1 to 3.0 mm, especially considering the reduction of the thermal resistivity of the entire circuit board. 0 mm or less is preferable.
- the metal used for the metal plate is particularly limited as long as it is a metal to which the active metal method can be applied, such as copper, aluminum, iron, nickel, chromium, silver, molybdenum, cobalt, or an alloy thereof.
- copper is particularly preferable from the viewpoint of conductivity and heat dissipation.
- the purity of the copper plate is preferably 90% or more.
- the purity is preferably 90% or more.
- the thickness of the copper plate is not particularly limited, but is generally 0.1 to 1.5 mm, particularly 0.3 mm or more, more preferably 0 from the viewpoint of heat dissipation. 0.5 mm or more, more preferably 0.8 mm or more.
- the thickness of the silver plating is preferably 0.1 ⁇ m to 1.5 ⁇ m, more preferably 0.3 ⁇ m to 1.0 ⁇ m.
- the thickness is less than 0.1 ⁇ m, a portion where silver is not plated is generated, and a gap is formed between the semiconductor and the copper body at the time of joining the semiconductor element, and the thermal resistance is lowered.
- the thickness is 1.5 ⁇ m or more, the adhesion of silver plating may be lowered.
- the arithmetic average roughness Ra of the silver plating surface is preferably 0.1 ⁇ m to 1.5 ⁇ m, more preferably 0.1 ⁇ m to 1.0 ⁇ m or less. If it is smaller than 0.1 ⁇ m, it is necessary to process the copper surface, and the manufacturing cost becomes high. If it exceeds 1.5 ⁇ m, the adhesion between the semiconductor element and the silver plating may be lowered.
- DC1 kV is 500 Hr in an atmosphere of 85 ° C. and 93% RH in a constant temperature and humidity chamber.
- the insulation resistance value between the patterns after application is preferably 1 ⁇ 10 6 ⁇ or less. Furthermore, the value of the shear stress measured with a tensile tester after sandwiching and hardening EMC resin between two circuit boards of the ceramic circuit board of one embodiment of the present invention is 20 kg / cm 2 or more. Preferably there is.
- the manufacturing method of the ceramic circuit board of the present invention is a manufacturing method including performing electroless silver plating.
- the silver plating can be formed into a thin film, but is preferably an electroless plating that can further reduce variations in the film thickness within the surface.
- the portion on which the silver plating is applied to the conductor surface may be the partial silver plating shown in FIG. 1 or the full silver plating shown in FIG. 2, but is preferably partial from the viewpoint of plating cost.
- a method for forming a structure in which the side surface of the conductor is not subjected to silver plating a method of forming a circuit after silver plating or a method of desilvering after forming a circuit can be employed.
- the EMC resin is excellent in adhesion to the metal surface oxide film, the copper surface is more intimately adhered than the noble metal such as silver which is difficult to form an oxide film.
- Example 10 A bonding material mainly composed of silver and copper was applied to both main surfaces of a silicon nitride substrate having a thickness of 0.32 mm and an outer size of 50 mm ⁇ 50 mm, and then sandwiched and laminated with oxygen-free copper C1020 plates. The laminated body was heated in a vacuum while being pressed to produce a copper-ceramic bonded body.
- An ultraviolet curable plating resist was applied to portions of the obtained joined body where the silver plating was not applied on the front and back copper plates.
- the surface roughness after silver plating was adjusted by performing silver plating pretreatment on the exposed copper part.
- the electroless silver plating was processed for a predetermined time to give a silver plating having a thickness of 0.1 ⁇ m to 1.5 ⁇ m.
- the plating resist was removed with an alkaline solution to produce a copper-ceramic bonding body in which silver was partially arranged.
- An ultraviolet curable etching resist was applied to the circuit pattern by screen printing on the front side copper plate of the obtained joined body. Moreover, about the back side copper plate, the etching resist was apply
- the obtained copper circuit board was immersed in an alkaline solution, and the etching resist was removed to produce a circuit board having a structure in which the conductor surface was silver-plated and the side surface was not silver-plated.
- the Si chip was joined with silver nanoparticles on the silver plating of the obtained ceramic circuit board, and then a copper base plate was soldered to the back side of the board to make a module.
- a circuit board was prepared by applying silver plating to the entire copper surface without applying the plating resist of the example.
- a silver plating process was performed to produce a circuit board with silver plating on the conductor side surface.
- the silver plating thickness was determined by measuring a plurality of thicknesses in the range of 50 ⁇ m in length by cross-sectional SEM observation at a magnification of 5000 to 10,000 times, and taking the average value.
- the arithmetic average roughness of the surface roughness was measured by using a device SJ-301 (manufactured by Mitutoyo Corporation), measuring a plurality of points on the silver plating surface with a reference length of 0.8 mm, and taking the average value.
- Adhesion to the silver plating is achieved by cutting with a sharp blade to make a 2mm square on the plating surface, applying adhesive tape, and peeling it quickly and strongly. The presence or absence was examined.
- ⁇ Migration evaluation> For migration evaluation, a substrate with a comb-shaped electrode having a distance between patterns of 0.5 mm was used, and DC 1 kV was applied for 500 hours in an atmosphere of 85 ° C. and 93% RH in a constant temperature and humidity chamber. Thereafter, the insulation resistance value between the patterns was measured and classified into the following two ranks. ⁇ : ⁇ 1 ⁇ 10 6 ⁇ , ⁇ : ⁇ 1 ⁇ 10 6 ⁇
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Abstract
Description
即ち、本発明は、窒化アルミニウムまたは窒化珪素を用いてなるセラミックス基板の両主面に、銅板がろう材を介して接合され、少なくとも一方の主面の銅板上に銀めっきが施されたセラミックス回路基板であって、銅板側面は銀めっきが施されておらず、銀めっきの厚みが0.1μmから1.5μmであり、銀めっき後の回路基板の表面粗さの算術平均粗さRaが0.1μmから1.5μmであることを特徴とするセラミックス回路基板である。
本発明は、窒化アルミニウムまたは窒化珪素を用いてなるセラミックス基板の両主面に、銅板がろう材を介して接合され、少なくとも一方の主面の銅板上に銀めっきが施されたセラミックス回路基板であって、銅板側面は銀めっきが施されておらず、銀めっきの厚みが0.1μmから1.5μmであり、銀めっき後の回路基板の表面粗さの算術平均粗さRaが0.1μmから1.5μmであることを特徴とするセラミックス回路基板である。
本発明のセラミックス回路基板に使用されるセラミックス基板としては、特に限定されるものではなく、窒化ケイ素、窒化アルミニウムなどの窒化物系セラミックス、酸化アルミニウム、酸化ジルコニウムなどの酸化物系セラミックス、炭化ケイ素等の炭化物系セラミックス、ほう化ランタン等のほう化物系セラミックス等で使用できる。但し、金属板を活性金属法でセラミックス基板に接合するため、窒化アルミニウム、窒化ケイ素等の非酸化物系セラミックスが好適であり、更に、優れた機械強度、破壊靱性の観点より、窒化ケイ素基板が好ましい。
また、本発明の一実施形態のセラミックス回路基板の、パターン間距離0.5mmから成るくし型電極付き基板を使用し、恒温恒湿槽にて85℃、93%RHの雰囲気下でDC1kVを500Hr印加した後のパターン間の絶縁抵抗値は、1×106Ω以下が好ましい。
さらに、本発明の一実施形態のセラミックス回路基板の、2枚の回路基板の間にEMC樹脂を挟みこみ硬化させた後の引張り試験器でせん断応力を測定した値は、20kg/cm2以上であることが好ましい。
本発明のセラミックス回路基板の製造方法は、無電解の銀めっきを行うことを含む、製造方法である。
銀めっきは薄膜成形が可能であるが、さらに表面内の膜厚ばらつきを低減できる無電解めっきであることが好ましい。
[実施例]
厚み0.32mm、外形サイズ50mm×50mmの窒化珪素基板の両主面に銀と銅を主成分とする接合材を塗布後、無酸素銅C1020の板で挟み積層した。この積層体を加圧しながら、真空中で加熱し、銅-セラミックス接合体を製造した。
実施例の無電解銀めっきの処理時間を短くすることにより、薄膜銀めっきを作製し、処理時間を長くすることにより厚膜銀めっきの回路基板を作製した。
銀めっき厚みは、5000倍から10000倍の倍率での断面SEM観察により長さ50μmの範囲で厚みを複数枚測定し、その平均値とした。
表面粗さの算術平均粗さは、装置SJ-301(株式会社ミツトヨ製)を使用し、基準長さ0.8mmで銀めっき表面について複数箇所測定し、その平均値とした。
銀めっき密着性は鋭利な刃物でめっき面に2mmの正方形ができるように素地まで達する切込みを入れて、粘着力のあるテープを貼り付け、これを急速に、且つ、強く引き剥がすことによって剥離の有無を調べた。
マイグレーション評価はパターン間距離0.5mmから成るくし型電極付き基板を使用し、恒温恒湿槽にて85℃、93%RHの雰囲気下でDC1kVを500Hr印加した。その後、パターン間の絶縁抵抗値を測定し、以下の2つにランク分けした。
○:≧1×106Ω、×:<1×106Ω
EMC樹脂との密着性評価は、2枚の回路基板の間にEMC樹脂を挟みこみ硬化させた後、引張り試験器でせん断応力を測定し、以下の2つにランク分けした。
○:≧20kg/cm2、×:<20kg/cm2
2 銅板
3 銀めっき
Claims (3)
- 窒化アルミニウムまたは窒化珪素を用いてなるセラミックス基板の両主面に、銅板がろう材を介して接合され、少なくとも一方の主面の銅板上に銀めっきが施されたセラミックス回路基板であって、銅板側面は銀めっきが施されておらず、銀めっきの厚みが0.1μmから1.5μmであり、銀めっき後の回路基板の表面粗さの算術平均粗さRaが0.1μmから1.5μmであることを特徴とするセラミックス回路基板。
- 無電解の銀めっきを行うことを含む、請求項1に記載のセラミックス回路基板の製造方法。
- 請求項1に記載のセラミックス回路基板の銀めっき上に銀ナノ粒子を用いて半導体素子が接合されたパワーモジュール。
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JP2019523959A JP7420555B2 (ja) | 2017-06-09 | 2018-06-07 | セラミックス回路基板 |
KR1020237015540A KR20230066662A (ko) | 2017-06-09 | 2018-06-07 | 세라믹스 회로 기판 |
CN201880037182.6A CN110731129B (zh) | 2017-06-09 | 2018-06-07 | 陶瓷电路基板 |
KR1020197035815A KR20200015519A (ko) | 2017-06-09 | 2018-06-07 | 세라믹스 회로 기판 |
EP18814130.3A EP3637964A4 (en) | 2017-06-09 | 2018-06-07 | CERAMIC CIRCUIT SUBSTRATE |
US16/619,414 US11430727B2 (en) | 2017-06-09 | 2018-06-07 | Ceramic circuit substrate |
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JP2017113946 | 2017-06-09 |
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EP (1) | EP3637964A4 (ja) |
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WO2020218193A1 (ja) * | 2019-04-26 | 2020-10-29 | デンカ株式会社 | セラミックス回路基板および電子部品モジュール |
WO2022138750A1 (ja) | 2020-12-24 | 2022-06-30 | 株式会社 東芝 | 絶縁性回路基板およびそれを用いた半導体装置 |
WO2024005150A1 (ja) * | 2022-06-29 | 2024-01-04 | 株式会社 東芝 | セラミックス銅回路基板およびそれを用いた半導体装置 |
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CN115551213A (zh) * | 2022-11-28 | 2022-12-30 | 江苏富乐华半导体科技股份有限公司 | 一种覆铜陶瓷基板图形侧壁无镀银层的方法 |
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US20200185320A1 (en) | 2020-06-11 |
EP3637964A1 (en) | 2020-04-15 |
JPWO2018225809A1 (ja) | 2020-04-09 |
CN110731129A (zh) | 2020-01-24 |
EP3637964A4 (en) | 2020-06-24 |
KR20230066662A (ko) | 2023-05-16 |
KR20200015519A (ko) | 2020-02-12 |
US11430727B2 (en) | 2022-08-30 |
JP7420555B2 (ja) | 2024-01-23 |
CN110731129B (zh) | 2024-01-09 |
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