CN107331345A - 一种像素补偿电路及显示装置 - Google Patents

一种像素补偿电路及显示装置 Download PDF

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CN107331345A
CN107331345A CN201710613403.7A CN201710613403A CN107331345A CN 107331345 A CN107331345 A CN 107331345A CN 201710613403 A CN201710613403 A CN 201710613403A CN 107331345 A CN107331345 A CN 107331345A
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transistor
module
compensation circuit
node
pixel compensation
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刘婕
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Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Priority to CN201710613403.7A priority Critical patent/CN107331345A/zh
Priority to US15/577,179 priority patent/US10192489B1/en
Priority to PCT/CN2017/100703 priority patent/WO2019019276A1/zh
Publication of CN107331345A publication Critical patent/CN107331345A/zh
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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
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    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
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    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
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    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of El Displays (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

本发明提供一种像素补偿电路及显示装置，其包括：发光器件、驱动模块、复位模块、参考电压写入模块、数据电压写入模块、电源电压写入模块以及发光控制模块。本发明的像素补偿电路及显示装置，通过发光控制模块控制发光器件的发光，并且通过参考电压写入模块对电源电压压降进行补偿，从而使得其不仅可以对阈值电压以及电源电压压降进行补偿，同时还可以解决发光器件偷亮的问题，延缓发光器件老化并提高显示画面对比度。

Description

一种像素补偿电路及显示装置
技术领域
本发明涉及显示技术领域，尤其涉及一种像素补偿电路及显示装置。
背景技术
有机发光二极管(OLED，Organic Light Emitting Display)色域广、对比度高、节能、并具有可折叠型，因而在现有的显示装置中具有强有力的竞争力。但是，由于OLED的发光亮度与流经OLED的电流大小有关，所以作为驱动的晶体管的电学性能会直接影响显示效果，尤其是晶体管的阈值电压经常会发生漂移，使得整个OLED显示装置出现亮度不均匀的问题。
为了改善OLED的显示效果，一般都要通过驱动电路对OLED进行像素补偿。图1是现有技术的像素补偿电路的示意图。如图1所示，该电路包括4个晶体管T0、T1、T2以及T3和1个存储电容Cst，该电路驱动过程依次为：复位阶段、阈值电压获取阶段以及发光阶段。然而，该电路存在OLED偷亮的问题，即，该电路在复位阶段时，OLED就开始发光。在数据电压Vdata没有完全写入，阈值电压未抓取完全时，OLED发光亮度会不均匀，并且补偿不完全，会导致画面不良。同时在像素电源线尺寸较长时，像素电路的电源电压Vdd会产生较大的电压下降(IR Drop)，造成OLED亮度不均。
故，有必要提供一种像素补偿电路及显示装置，以解决现有技术所存在的问题。
发明内容
本发明的目的在于提供一种像素补偿电路及显示装置，其不仅可以对阈值电压以及电源电压压降进行补偿，同时还可以解决OLED偷亮的问题。
本发明提供一种像素补偿电路，其包括:发光器件、驱动模块、复位模块、参考电压写入模块、数据电压写入模块、电源电压写入模块以及发光控制模块；
所述复位模块的控制端与复位信号端连接，输入端与第一节点连接，输出端接地；用于对所述第一节点进行复位；
所述参考电压写入模块的控制端与第一控制信号端连接，输入端与参考电压端连接，输出端与第二节点连接；用于对所述第二节点进行复位以及将所述参考电压端输出的参考电压写入所述第二节点；
所述数据电压写入模块的控制端与第二控制信号端连接，输入端与数据电压端连接，输出端与所述第一节点连接；用于将所述数据电压端输出的数据电压与阈值电压的差值写入所述第一节点；
所述电源电压写入模块的控制端与第三控制信号端连接，输入端与电源电压端连接，输出端与所述第二节点连接；用于将所述电源电压端输出的电源电压写入所述第二节点；
所述发光控制模块的控制端与所述第三控制信号端连接，输入端与所述驱动模块的输出端连接，输出端与所述发光器件的阳极连接；用于控制所述驱动模块驱动所述发光器件发光；
所述驱动模块的第一输入端与所述第一节点连接，第二输入端与所述第二节点连接；
所述发光器件的阴极接地。
在本发明的像素补偿电路中，所述驱动模块包括：驱动晶体管和存储电容；其中，
所述驱动晶体管的栅极与所述第一节点连接，所述驱动晶体管的源极与所述第二节点连接，所述驱动晶体管的漏极与所述发光控制模块的输入端连接；
所述存储电容连接于所述第一节点与所述第二节点之间。
在本发明的像素补偿电路中，所述复位模块包括：第一晶体管；其中，
所述第一晶体管的栅极与所述复位控制信号端连接，所述第一晶体管的源极与所述第一节点连接，所述第一晶体管的漏极接地。
在本发明的像素补偿电路中，所述参考电压写入模块包括：第二晶体管；其中，
所述第二晶体管的栅极与所述第一控制信号端连接，所述第二晶体管的源极与所述参考电压端连接，所述第二晶体管的漏极与所述第二节点连接。
在本发明的像素补偿电路中，所述数据电压写入模块包括：第三晶体管和第四晶体管；其中，
所述第三晶体管的栅极与所述第二控制信号端连接，所述第三晶体管的源极与所述数据电压端连接，所述第三晶体管的漏极与所述第四晶体管的源极连接；
所述第四晶体管的栅极和漏极均与所述第一节点连接。
在本发明的像素补偿电路中，所述电源电压写入模块包括：第五晶体管；其中，
所述第五晶体管的栅极与所述第三控制信号端连接，所述第五晶体管的源极与所述电源端连接，所述第五晶体管的漏极与所述第二节点连接。
在本发明的像素补偿电路中，所述发光控制模块包括：第六晶体管；其中，
所述第六晶体管的栅极与所述第三控制信号端连接，所述第六晶体管的源极与所述驱动模块的输出端连接，所述第六晶体管的漏极与所述发光器件的阳极连接。
依据本发明的上述目的，还提供一种显示装置，其包括以上所述的像素补偿电路。
本发明的像素补偿电路及显示装置，通过发光控制模块控制发光器件的发光，并且通过参考电压写入模块对电源电压压降进行补偿，从而使得其不仅可以对阈值电压以及电源电压压降进行补偿，同时还可以解决发光器件偷亮的问题，延缓发光器件老化并提高显示画面对比度。
为让本发明的上述内容能更明显易懂，下文特举优选实施例，并配合所附图式，作详细说明如下：
附图说明
下面结合附图，通过对本发明的具体实施方式详细描述，将使本发明的技术方案及其它有益效果显而易见。
图1是现有技术的像素补偿电路的示意图；
图2为本发明优选实施例提供的像素补偿电路的示意图；
图3为本发明优选实施例提供的像素补偿电路的时序图。
具体实施方式
为了使本发明的目的、技术方案及优点更加清楚明白，以下结合附图及实施例，对本发明进行进一步详细说明。应当理解，此处所描述的具体实施例仅用以解释本发明，并不用于限定本发明。
参阅图2，图2为本发明优选实施例提供的像素补偿电路的示意图。如图2所示，本发明优选实施例提供的像素补偿电路，包括：发光器件OLED、驱动模块101、复位模块102、参考电压写入模块103、数据电压写入模块104、电源电压写入模块105以及发光控制模块106。
需要说明的是，复位信号端用于输出复位信号Reset，第一控制信号端用于输出第一控制信号Xscan，第二控制信号端用于输出第二控制信号Scan，第三控制信号端用于输出第三控制信号EM，数据电压端用于输出数据电压Vdata，参考电压端用于输出参考电压Vsus，电源电压端用于输出电源电压Vdd。
其中，复位模块102的控制端与复位信号端连接，输入端与第一节点A连接，输出端接地；该复位模块102用于对第一节点A进行复位。
参考电压写入模块103的控制端与第一控制信号端连接，输入端与参考电压端连接，输出端与第二节点B连接；该参考电压写入模块103用于对第二节点B进行复位以及将参考电压端输出的参考电压Vsus写入第二节点B。
数据电压写入模块104的控制端与第二控制信号端连接，输入端与数据电压端连接，输出端与第一节点A连接；该数据电压写入模块104用于将数据电压端输出的数据电压Vdata与阈值电压的差值写入第一节点A。
电源电压写入模块105的控制端与第三控制信号端连接，输入端与电源电压端连接，输出端与第二节点B连接；该电源电压写入模块105用于将电源电压端输出的电源电压Vdd写入第二节点B。
发光控制模块106的控制端与第三控制信号端连接，输入端与驱动模块101的输出端连接，输出端与发光器件OLED的阳极连接；该发光控制模块106用于控制驱动模块101驱动发光器件OLED发光。
驱动模块101的第一输入端与第一节点A连接，第二输入端与第二节点B连接。发光器件OLED的阴极接地。
具体地，该驱动模块101包括：驱动晶体管T0和存储电容Cst；其中，驱动晶体管T0的栅极与第一节点A连接，驱动晶体管T0的源极与第二节点B连接，驱动晶体管T0的漏极与发光控制模块106的输入端连接；存储电容Cst连接于第一节点A与第二节点B之间。
该复位模块102包括：第一晶体管T1；其中，第一晶体管T1的栅极与复位控制信号端连接，第一晶体管T1的源极与第一节点A连接，第一晶体管T1的漏极接地。
该参考电压写入模块103包括：第二晶体管T2；其中，第二晶体管T2的栅极与第一控制信号端连接，第二晶体管T2的源极与参考电压端连接，第二晶体管T2的漏极与第二节点B连接。
该数据电压写入模块104包括：第三晶体管T3和第四晶体管T4；其中，第三晶体管T3的栅极与第二控制信号端连接，第三晶体管T3的源极与数据电压端连接，第三晶体管T3的漏极与第四晶体管T4的源极连接；第四晶体管T4的栅极和漏极均与第一节点A连接。
该电源电压写入模块105包括：第五晶体管T5；其中，第五晶体管T5的栅极与第三控制信号端连接，第五晶体管T5的源极与电源端连接，第五晶体管T5的漏极与所述第二节点B连接。
该发光控制模块106包括：第六晶体管T6；其中，第六晶体管T6的栅极与第三控制信号端连接，第六晶体管T6的源极与驱动模块101的输出端连接，第六晶体管T6的漏极与发光器件OLED的阳极连接。
需要说明的是，本优选实施例中的第一晶体管T1、第二晶体管T2、第三晶体管T3、第四晶体管T4、第五晶体管T5、第六晶体管T6以及驱动晶体管T0均为P型晶体管。
下面结合图3对图2所示的像素补偿电路驱动发光器件OLED发光的过程进行详细的描述。图3为本发明优选实施例提供的像素补偿电路的时序图。如图3所示，该像素补偿电路的工作时序图可分为三个阶段：复位阶段t0、补偿阶段t1以及发光阶段t2。
在复位阶段t0，该像素补偿电路对第一节点A和第二节点B进行复位。具体地，在该复位阶段t0，复位信号端输出的复位信号Reset为低电平，第一控制信号信号端输出的第一控制信号Xscan为低电平，使得第一晶体管T1和第二晶体管T2导通，参考电压端输出的参考电压Vsus依次经第二晶体管T2、存储电容Cst和第一晶体管T1到达接地端，形成一接地回路对存储电容Cst进行放电，进而拉低第一节点A和第二节点B的电位。需要说明的是，此时第三控制信号端输出的第三控制信号EM为高电平，使得第五晶体管T5和第六晶体管T6截止，进而避免由于此时第一节点A的电位下降造成驱动晶体管T0导通，进而避免发光器件OLED在复位阶段t0就发光。
在补偿阶段t1，第二控制信号端输出的第二控制信号Scan低电平，第一控制信号端输出的第一控制信号Xscan还是输出低电平，并且在该像素补偿电路中，第四晶体管T4的栅极与漏极短接在一起，此时可以捕捉第四晶体管T4的阈值电压，第二晶体管T2和第三晶体管T3导通，数据电压端输出的数据电压Vdata与第四晶体管T4的阈值电压Vth的差值传至第一节点A，从而第一节点A的电位为Vdata-Vth；参考电压端输出的参考电压Vsus传至第二节点B，从而第二节点B的电位为Vsus。需要说明的是，此时第三控制信号端输出的第三控制信号EM为高电平，使得第五晶体管T5和第六晶体管T6截止，避免由于此时驱动晶体管T0导通，进而避免发光器件OLED在补偿阶段t1就发光。
在发光阶段t2，第三控制信号端输出的第三控制信号EM为低电平，使得第第五晶体管T5和第六晶体管T6导通，电源电压端输出的电源电压Vdd传至第二节点B，从而使得第二节点B经历从补偿阶段t1的参考电压Vsus到发光阶段t2的电源电压Vdd的瞬时跳变，使得此时第一节点A的电位为Vdata-Vth+Vdd-Vsus。同时，驱动晶体管T0此时导通，并且流经驱动晶体管T0的电流满足以下函数关系：需要说明的是，本优选实施例提供的像素补偿电路中驱动晶体管T0与第四晶体管T4的阈值电压大致一致，故
从该函数关系的计算结果来看，该流经发光器件OLED的电流只与数据电压Vdata以及参考电压Vsus有关，而与驱动晶体管T0的阈值电压和容易产生压降的电源电压Vdd无关。该像素补偿电路不仅具有阈值电压补偿功能，同时还具有像素电源线上的压降补偿功能。
本优选实施例的像素补偿电路，通过发光控制模块控制发光器件的发光，并且通过参考电压写入模块对电源电压压降进行补偿，从而使得其不仅可以对阈值电压以及电源电压压降进行补偿，同时还可以解决发光器件偷亮的问题，延缓发光器件老化并提高显示画面对比度。
本发明还提供一种显示装置。在本实施方式中，该显示装置包括上述优选实施例提供的像素补偿电路，具体可参照上述优选实施例提供的像素补偿电路的描述，在此不做赘述。
本发明的像素补偿电路及显示装置，通过发光控制模块控制发光器件的发光，并且通过参考电压写入模块对电源电压压降进行补偿，从而使得其不仅可以对阈值电压以及电源电压压降进行补偿，同时还可以解决发光器件偷亮的问题，延缓发光器件老化并提高显示画面对比度。
综上，虽然本发明已以优选实施例揭露如上，但上述优选实施例并非用以限制本发明，本领域的普通技术人员，在不脱离本发明的精神和范围内，均可作各种更动与润饰，因此本发明的保护范围以权利要求界定的范围为准。

Claims (8)

1.一种像素补偿电路，其特征在于，包括：发光器件、驱动模块、复位模块、参考电压写入模块、数据电压写入模块、电源电压写入模块以及发光控制模块；
所述复位模块的控制端与复位信号端连接，输入端与第一节点连接，输出端接地；用于对所述第一节点进行复位；
所述参考电压写入模块的控制端与第一控制信号端连接，输入端与参考电压端连接，输出端与第二节点连接；用于对所述第二节点进行复位以及将所述参考电压端输出的参考电压写入所述第二节点；
所述数据电压写入模块的控制端与第二控制信号端连接，输入端与数据电压端连接，输出端与所述第一节点连接；用于将所述数据电压端输出的数据电压与阈值电压的差值写入所述第一节点；
所述电源电压写入模块的控制端与第三控制信号端连接，输入端与电源电压端连接，输出端与所述第二节点连接；用于将所述电源电压端输出的电源电压写入所述第二节点；
所述发光控制模块的控制端与所述第三控制信号端连接，输入端与所述驱动模块的输出端连接，输出端与所述发光器件的阳极连接；用于控制所述驱动模块驱动所述发光器件发光；
所述驱动模块的第一输入端与所述第一节点连接，第二输入端与所述第二节点连接；
所述发光器件的阴极接地。
2.根据权利要求1所述的像素补偿电路，其特征在于，所述驱动模块包括：驱动晶体管和存储电容；其中，
所述驱动晶体管的栅极与所述第一节点连接，所述驱动晶体管的源极与所述第二节点连接，所述驱动晶体管的漏极与所述发光控制模块的输入端连接；
所述存储电容连接于所述第一节点与所述第二节点之间。
3.根据权利要求1所述的像素补偿电路，其特征在于，所述复位模块包括：第一晶体管；其中，
所述第一晶体管的栅极与所述复位控制信号端连接，所述第一晶体管的源极与所述第一节点连接，所述第一晶体管的漏极接地。
4.根据权利要求1所述的像素补偿电路，其特征在于，所述参考电压写入模块包括：第二晶体管；其中，
所述第二晶体管的栅极与所述第一控制信号端连接，所述第二晶体管的源极与所述参考电压端连接，所述第二晶体管的漏极与所述第二节点连接。
5.根据权利要求1所述的像素补偿电路，其特征在于，所述数据电压写入模块包括：第三晶体管和第四晶体管；其中，
所述第三晶体管的栅极与所述第二控制信号端连接，所述第三晶体管的源极与所述数据电压端连接，所述第三晶体管的漏极与所述第四晶体管的源极连接；
所述第四晶体管的栅极和漏极均与所述第一节点连接。
6.根据权利要求1所述的像素补偿电路，其特征在于，所述电源电压写入模块包括：第五晶体管；其中，
所述第五晶体管的栅极与所述第三控制信号端连接，所述第五晶体管的源极与所述电源端连接，所述第五晶体管的漏极与所述第二节点连接。
7.根据权利要求1所述的像素补偿电路，其特征在于，所述发光控制模块包括：第六晶体管；其中，
所述第六晶体管的栅极与所述第三控制信号端连接，所述第六晶体管的源极与所述驱动模块的输出端连接，所述第六晶体管的漏极与所述发光器件的阳极连接。
8.一种显示装置，其特征在于，包括权利要求1-7任一项所述的像素补偿电路。
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