WO2017134826A1 - Système de commande et unité d'entrée analogique - Google Patents

Système de commande et unité d'entrée analogique Download PDF

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Publication number
WO2017134826A1
WO2017134826A1 PCT/JP2016/053551 JP2016053551W WO2017134826A1 WO 2017134826 A1 WO2017134826 A1 WO 2017134826A1 JP 2016053551 W JP2016053551 W JP 2016053551W WO 2017134826 A1 WO2017134826 A1 WO 2017134826A1
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Prior art keywords
signal
input unit
analog
analog input
control system
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PCT/JP2016/053551
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English (en)
Japanese (ja)
Inventor
中西　正人
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三菱電機株式会社
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Priority to PCT/JP2016/053551 priority Critical patent/WO2017134826A1/fr
Publication of WO2017134826A1 publication Critical patent/WO2017134826A1/fr

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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00—Programme-control systems
    • G05B19/02—Programme-control systems electric
    • G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/05—Programmable logic controllers, e.g. simulating logic interconnections of signals according to ladder diagrams or function charts

Definitions

  • the present invention relates to a control system including an analog input unit that converts an analog signal, which is a detection result of a detection means, into a digital signal and an analog input unit.
  • Equipment in the FA (Factory Automation) field is generally realized by combining multiple types of equipment.
  • a plurality of devices constituting equipment in the FA field are connected to a programmable controller that is a control system that integrates control processing and information processing.
  • the programmable controller may include an analog input unit that converts an analog signal, which is a detection result of the detection means, into a digital signal (see Patent Document 1).
  • Programmable controller may have multiple analog input units.
  • each analog input unit converts it into a digital signal at an independent timing.
  • the programmable controller has a problem that it is difficult to synchronize the conversion start time for starting the conversion of the analog signal, which is the detection result of the detection means of the plurality of analog input units, into a digital signal.
  • the present invention has been made in view of the above, and an object of the present invention is to obtain a control system that can synchronize the conversion start time for starting conversion to digital signals of a plurality of analog input units.
  • the present invention provides a control including a plurality of analog input units connected to the detection means, and an input unit connected to be able to communicate with the plurality of analog input units.
  • the analog input unit converts an analog signal, which is a detection result of the detection means, into a digital signal.
  • a digital signal determines the magnitude of an analog signal in more than two stages.
  • the input unit transmits a synchronization signal generated based on the signal received from the external device to the plurality of analog input units.
  • the plurality of analog input units start to convert analog signals into digital signals in synchronization with each other when a synchronization signal received from the input unit satisfies a predetermined trigger condition.
  • the control system according to the present invention has an effect that it is possible to synchronize the conversion start time for starting conversion into digital signals of a plurality of analog input units.
  • the figure which shows the structure of the hardware of the control system shown by FIG. The sequence diagram which shows an example of operation
  • movement of the control system shown by FIG. The figure which shows an example of the memory area of the memory of the analog input unit which hold
  • FIG. 1 is a diagram illustrating a configuration of a control system according to the first embodiment.
  • the control system 1 constitutes a transport apparatus 10 that is the equipment shown in FIG. 1 in the field of FA (Factory Automation).
  • the transport apparatus 10 that is equipment is related to the workpiece W that is a detection target.
  • the facility is the transport device 10 that transports the workpiece W, but is not limited to the transport device 10 and may be various devices related to the manufacture or processing of the workpiece W.
  • the detection target is the workpiece W conveyed by the facility, but is not limited to the workpiece W, and may be an apparatus or a component that configures the facility itself.
  • the conveying device 10 as equipment related to the workpiece W is separated from the driving roller 12 by a driving roller 12 that rotates around the axis by a motor 11 that is a driving source. And a driven roller 13 that is arranged in parallel and is provided so as to be rotatable around an axis.
  • the conveying device 10 includes an endless conveying belt 14 that is stretched between a driving roller 12 and a driven roller 13, and an encoder 15 that detects the rotation of the driven roller 13.
  • the motor 11 rotates the driving roller 12 around the axis, and the conveying belt 14 circulates between the driving roller 12 and the driven roller 13.
  • the conveyance device 10 arranges the workpiece W on the conveyance belt 14 and circulates the conveyance belt 14 to convey the workpiece W in the arrow A direction. Further, the transport device 10 grasps the position of the workpiece W based on the rotation of the driven roller 13 detected by the encoder 15.
  • the control system 1 includes a plurality of detection units 2 that detect the state quantity of the workpiece W, and a plurality of analogs that respectively convert analog signals that are detection results of the plurality of detection units 2 into digital signals DS. And an input unit 3.
  • the control system 1 includes an input unit 4 that simultaneously transmits a synchronization signal SS to a plurality of analog input units 3, and a control unit 5 that controls the analog input unit 3.
  • the plurality of analog input units 3, the input unit 4, and the control unit 5 are connected to each other via a communication bus B so as to communicate with each other. That is, the input unit 4 is communicably connected to the plurality of analog input units 3.
  • the detection unit 2 is configured by a laser sensor that detects the thickness T, which is a state quantity of the work W disposed on the conveyor belt 14, but is not limited thereto.
  • the detection means 2 is not limited to the thickness T of the workpiece W, and may be various sensors that detect various state quantities.
  • the plurality of detection means 2 are the same state quantities of the workpiece W. Although a certain thickness T is detected, it is not necessary to detect the same state quantity.
  • the detection means 2 configured by a laser sensor detects the thickness T of the workpiece W by irradiating the workpiece W with laser light and receiving the laser beam reflected by the workpiece W. .
  • the detection result of the detection means 2 is a current value or a voltage value whose magnitude changes according to the thickness T of the workpiece W. That is, the detection result of the detection means 2 is an analog signal whose magnitude changes according to the thickness T of the workpiece W.
  • eight detection means 2 are provided. However, the present invention is not limited to this, and any number of detection means 2 may be provided as long as a plurality of detection means 2 are provided. Further, the detection means 2 measures the thickness T at different positions of the workpiece W. In the first embodiment, the plurality of detection means 2 are arranged along the conveyance direction of the workpiece W of the conveyance apparatus 10, but the arrangement of the detection means 2 is not limited to this.
  • the detecting means 2 is connected to the analog input unit 3.
  • the detection means 2 always detects the thickness T, which is the state quantity of the workpiece W, and always transmits the detection result to the analog input unit 3.
  • T the thickness of the workpiece W
  • the detecting means 2 always detects the thickness T, which is the state quantity of the workpiece W, and always transmits the detection result to the analog input unit 3.
  • two analog input units 3 are provided, but any number of analog input units 3 may be provided as long as a plurality of analog input units 3 are provided.
  • each analog input unit 3 is connected to four detection means 2, but is not limited to this, and may be connected to one or more detection means 2.
  • the analog input units 3 each convert an analog signal that is a detection result received from the detection means 2 into a digital signal DS.
  • the digital signal DS converted from the analog signal by the analog input unit 3 is a digital signal DS that determines the size of the analog signal, that is, the thickness T of the workpiece W in more than two stages.
  • the thickness T of the work W is determined in 256 steps.
  • the work W The thickness T is determined in 65536 stages.
  • the input unit 4 is connected to the external device 7.
  • the input unit 4 receives the signal S transmitted from the external device 7, generates a synchronization signal SS based on the signal S received from the external device 7, and generates the generated synchronization signal SS from the plurality of analog input units 3 and the control unit.
  • Send to 5 The synchronization signal SS is a signal for starting to convert analog signals, which are detection results of the plurality of detection means 2, into digital signals DS in synchronization with the plurality of analog input units 3.
  • the external device 7 is a switch that transmits a signal S indicating ON / OFF to the input unit 4, but is not limited to the switch.
  • the signal S transmitted from the external device 7 to the input unit 4 is a signal indicating on / off, that is, a digital signal indicating “0” or “1”.
  • the input unit 4 receives a signal S indicating on / off from the external device 7, that is, a digital signal indicating “0” or “1”.
  • the control unit 5 is a device that, upon receiving the synchronization signal SS, acquires and stores a digital signal DS that defines the thickness T of the workpiece W converted by the analog input unit 3.
  • the control unit 5 is connected so that the computer 6 can communicate.
  • the computer 6 creates a control program to be executed by the control system 1 and transmits it to the control system 1.
  • the control system 1 acquires and stores the detection result of the detection means 2 by executing the control program.
  • the control system 1 is a programmable controller (Programmable Logic Controllers (PLC)).
  • PLC Programmable Logic Controllers
  • the programmable controller is defined by JIS (Japanese Industrial Standards) B 3502: 2011.
  • the computer 6 transmits setting information to each analog input unit 3 via the control unit 5 and transmits setting information of each analog input unit 3 to the input unit 4.
  • the setting information is information indicating whether or not to start converting the analog signal into the digital signal DS in synchronization with the reception of the synchronization signal SS.
  • the computer 6 transmits the synchronization signal SS to both of the two analog input units 3, and both of the two analog input units 3 start to convert the analog signal into the digital signal DS in synchronization.
  • the control system 1 may include an analog input unit 3 that does not synchronize with other analog input units 3 in addition to the analog input unit 3 that starts converting analog signals into digital signals DS in synchronization. good.
  • FIG. 2 is a diagram showing a hardware configuration of a computer connected to the control unit of the control system shown in FIG.
  • the computer 6 executes a computer program, and as shown in FIG. 2, a CPU (Central Processing Unit) 61, a RAM (Random Access Memory) 62, and a ROM (Read Only Memory). ) 63, a storage device 64, an input device 65, a display device 66, and a communication interface 67.
  • the CPU 61, RAM 62, ROM 63, storage device 64, input device 65, display device 66, and communication interface 67 are connected to each other via the bus B6.
  • the CPU 61 executes programs stored in the ROM 63 and the storage device 64 while using the RAM 62 as a work area.
  • the program stored in the ROM 63 is BIOS (Basic Input / Output System) or UEFI (Unified Extensible Firmware Interface), but the program stored in the ROM 63 is not limited to BIOS or UEFI.
  • the program stored in the storage device 64 is an operating system program and an engineering tool program.
  • the program stored in the storage device 64 is not limited to the operating system program and the engineering tool program.
  • the storage device 64 is an SSD (Solid State Drive) or an HDD (Hard Disk Drive), but the storage device 64 is not limited to an SSD or an HDD.
  • the input device 65 receives an operation input from the user.
  • the input device 65 is a keyboard or a mouse, but is not limited to a keyboard or a mouse.
  • the display device 66 displays characters and images.
  • the display device 66 is a liquid crystal display device, but is not limited to a liquid crystal display device.
  • the communication interface 67 communicates with the control unit 5.
  • FIG. 3 is a diagram showing a hardware configuration of the control system shown in FIG.
  • the input unit 4 of the control system 1 includes an input port 41 that is connected to the external device 7 and receives the signal S, an input circuit 42 that receives the signal S received by the input port 41, and a computer program
  • the CPU 43 for executing the above and a memory 44 for storing the computer program.
  • the input unit 4 includes a communication circuit 45 that generates a synchronization signal SS based on the signal S received by the input circuit 42, and a bus interface 46 that is connected to both the communication circuit 45 and the communication bus B.
  • the CPU 43, the memory 44, the communication circuit 45, and the input circuit 42 are connected via an internal bus B4.
  • the memory 44 stores setting information of each analog input unit 3.
  • the CPU 43 refers to the setting information of each analog input unit 3 stored in the memory 44 and synchronizes the analog signal to the digital signal DS when receiving the synchronization signal SS.
  • the synchronization signal SS is transmitted to the set analog input unit 3.
  • the function of the input unit 4 is realized by the CPU 43 reading and executing a computer program stored in the memory 44.
  • the computer program is realized by software, firmware, or a combination of software and firmware.
  • the memory 44 includes a storage area capable of storing a computer program or data readable by a computer.
  • the memory 44 is configured by a nonvolatile semiconductor memory or a volatile semiconductor memory.
  • a nonvolatile semiconductor memory or a volatile semiconductor memory a RAM, a ROM, a flash memory, an EPROM (Erasable Programmable Read Only Memory), or an EEPROM (Electrically / Erasable Programmable / Read Only Memory) can be used.
  • the memory 44 may be composed of at least one of a magnetic disk, an optical disk, and a magneto-optical disk.
  • the input circuit 42 and the communication circuit 45 may be a single circuit, a composite circuit, a programmed processor, a parallel programmed processor, an ASIC (Application Specific Integrated Circuit), an FPGA (Field-Programmable Gate Array), or two of them. It is realized by combining the above. Further, the input circuit 42 and the communication circuit 45 may be realized by a single ASIC or FPGA.
  • the control unit 5 includes a peripheral device interface 51 that is communicably connected to the computer 6 and a CPU 52 that executes a computer program.
  • the control unit 5 includes a memory 53 that stores a computer program, a communication circuit 54, and a bus interface 55.
  • the CPU 52, the memory 53, the communication circuit 54, and the peripheral device interface 51 are connected via the internal bus B5.
  • the communication circuit 54 is connected to the bus interface 55.
  • the communication circuit 54 receives the synchronization signal SS via the communication bus B.
  • the communication circuit 54 When receiving the synchronization signal SS, the communication circuit 54 generates an interrupt signal for operating the CPU 52 and transmits the interrupt signal to the CPU 52.
  • the CPU 52 that has received the interrupt signal stores a digital signal DS that defines the thickness T of the workpiece W converted by the analog input unit 3 in the storage area of the memory 53.
  • the communication circuit 54 transmits an interrupt signal to the CPU 52 at the rising timing of the synchronization signal SS that satisfies a predetermined trigger condition, and the CPU 52 stores the digital signal DS that determines the thickness T of the workpiece W as a memory.
  • the data is stored in 53 storage areas.
  • the predetermined trigger condition is satisfied at the rising timing of the synchronization signal SS.
  • the timing is not limited to this and may be the falling timing of the synchronization signal SS.
  • the function of the control unit 5 is realized by the CPU 52 reading and executing a computer program stored in the memory 53.
  • the computer program is realized by software, firmware, or a combination of software and firmware.
  • the memory 53 includes a storage area capable of storing a computer program or data that can be read by a computer.
  • the memory 53 is configured by a nonvolatile semiconductor memory or a volatile semiconductor memory.
  • a nonvolatile semiconductor memory or a volatile semiconductor memory a RAM, a ROM, a flash memory, an EPROM, or an EEPROM can be used.
  • the memory 53 may be composed of at least one of a magnetic disk, an optical disk, and a magneto-optical disk.
  • the communication circuit 54 is realized by a single circuit, a composite circuit, a programmed processor, a parallel programmed processor, an ASIC, an FPGA, or a combination of two or more thereof.
  • each of the analog input units 3 is connected to the detecting means 2 and receives an analog signal as a detection result, and converts the analog signal received by the input port 31 into a digital signal DS. And an A / D (Analog / Digital) converter 32 which is a digital conversion unit.
  • Each of the analog input units 3 includes a CPU 33 that executes a computer program, a memory 34 that stores the computer program, a communication circuit 35 that is an input unit, and a bus interface 36.
  • the CPU 33, the memory 34, and the communication circuit 35 are connected via an internal bus B3.
  • the input port 31 corresponds to the detection unit 2 on a one-to-one basis.
  • the input port 31 is connected to the A / D converter 32.
  • the A / D converter 32 is connected to the detection means 2 via the input port 31 and is connected to the CPU 33.
  • one A / D converter 32 is provided and connected to all the input ports 31, but the same number of input ports 31 are provided so as to correspond to the input ports 31 on a one-to-one basis. Also good.
  • the communication circuit 35 is connected to the bus interface 36.
  • the communication circuit 35 receives the synchronization signal SS via the communication bus B. When receiving the synchronization signal SS, the communication circuit 35 generates an interrupt signal for operating the CPU 33 and transmits the interrupt signal to the CPU 33.
  • the CPU 33 that has received the interrupt signal causes the A / D converter 32 to convert the analog signal, which is the detection result of the detection means 2, into a digital signal DS that defines the thickness T of the work W, and stores the converted digital signal DS in the memory 34. Keep in the area.
  • the memory 34 stores setting information of the own analog input unit 3.
  • the communication circuit 35 transmits an interrupt signal to the CPU 33 at the rising timing of the synchronization signal SS that the synchronization signal SS received from the input unit 4 satisfies a predetermined trigger condition. Then, the A / D converter 32 starts to convert analog signals, which are detection results of all the detection means 2, into a digital signal DS that determines the thickness T of the workpiece W. That is, the plurality of analog input units 3 synchronize with each other the analog signals that are the detection results of the detection means 2 to the digital signal DS at the rising timing when the synchronization signal SS received from the input unit 4 satisfies the trigger condition. Start converting.
  • the functions of the analog input unit 3 excluding the A / D converter 32 and the communication circuit 35 are realized by the CPU 33 reading and executing a computer program stored in the memory 34.
  • the computer program is realized by software, firmware, or a combination of software and firmware.
  • the memory 34 includes a storage area capable of storing a computer program or data that can be read by the computer.
  • the memory 34 is configured by a nonvolatile semiconductor memory or a volatile semiconductor memory.
  • a nonvolatile semiconductor memory or a volatile semiconductor memory a RAM, a ROM, a flash memory, an EPROM, or an EEPROM can be used.
  • the memory 34 may be configured by at least one of a magnetic disk, an optical disk, and a magneto-optical disk.
  • the communication circuit 35 is realized by a single circuit, a composite circuit, a programmed processor, a parallel programmed processor, an ASIC, an FPGA, or a combination of two or more thereof.
  • FIG. 4 is a sequence diagram showing an example of the operation of the control system shown in FIG.
  • FIG. 5 is a diagram showing an example of the storage area of the memory of the analog input unit that holds the digital signal in step ST15 shown in FIG.
  • FIG. 6 is a diagram showing an example of the storage area of the memory of the control unit that stores the digital signal in step ST21 shown in FIG.
  • FIG. 7 is a time chart showing an example of the operation of the control system shown in FIG.
  • the CPU 43 of the input unit 4 of the control system 1 grasps that the input circuit 42 has received the signal S shown in FIG. 7 transmitted from the external device 7 via the input port 41 (step ST1).
  • the CPU 43 of the input unit 4 determines whether or not the received signal S satisfies a condition for generating the synchronization signal SS (step ST2).
  • the CPU 43 of the input unit 4 determines that the condition for generating the synchronization signal SS is satisfied when the strength of the received signal S continues for a preset time or longer, and the received signal S is If the duration is less than the preset time, it is determined that the condition for generating the synchronization signal SS is not satisfied, but the present invention is not limited to this.
  • step ST2 When the CPU 43 of the input unit 4 determines that the received signal S does not satisfy the condition for generating the synchronization signal SS (step ST2: No), the CPU 43 returns to step ST1.
  • the CPU 43 of the input unit 4 repeats step ST1 and step ST2 until it determines that the received signal S satisfies the condition for generating the synchronization signal SS.
  • step ST2: Yes the setting information of each analog input unit 3 stored in the memory 44 is referred to. Then, the analog input unit 3 set when the analog signal is converted into the digital signal DS in synchronization is specified (step ST3).
  • the CPU 43 of the input unit 4 causes the communication circuit 45 to generate the synchronization signal SS based on the signal S and converts the analog signal into the digital signal DS in synchronization through the communication bus B.
  • a synchronization signal SS is transmitted (step ST4).
  • the CPU 43 of the input unit 4 transmits the synchronization signal SS to both of the two analog input units 3 set to convert the analog signal into the digital signal DS in synchronization.
  • the CPU 43 of the input unit 4 ends the operation.
  • the CPU 33 of the analog input unit 3 acquires the reception status of the synchronization signal SS of the bus interface 36 (step ST11).
  • the CPU 33 of the analog input unit 3 set to convert the analog signal into the digital signal DS in synchronization determines whether or not the communication circuit 35 has received the synchronization signal SS via the bus interface 36 (step ST12). .
  • step ST12 When the CPU 33 of the analog input unit 3 set to convert the analog signal into the digital signal DS in synchronization determines that the communication circuit 35 has received the synchronization signal SS via the bus interface 36 (step ST12: Yes).
  • the A / D converter 32 starts to convert the analog signal into the digital signal DS at the rising timing of the synchronization signal SS (step ST13).
  • the CPU 33 of the analog input unit 3 set to convert the analog signal into the digital signal DS in synchronization causes the A / D converter 32 to acquire the analog signal from each input port 31 (step ST14).
  • the CPU 33 of the analog input unit 3 that is set to convert the analog signal into the digital signal DS in synchronism causes the A / D converter 32 to convert the analog signal that is the detection result of each detection means 2 into the digital signal DS.
  • a digital signal DS for determining the thickness T of the signal is generated (step ST15).
  • the CPU 33 of the analog input unit 3 which is set to convert the analog signal into the digital signal DS in synchronism is converted into the digital signal DS in the conversion result holding area 34a in the storage area of the memory 34 as shown in FIG.
  • the conversion start time when the conversion is started and a plurality of converted digital signals DS are held.
  • the conversion start time is a time when the trigger condition is satisfied.
  • the conversion result holding area 34a of the memory 34 holds the conversion start time at which the conversion of the analog signal, which is the detection result of the plurality of detection means 2, into the digital signal DS is performed for the number of times converted.
  • the A / D converter 32 of the analog input unit 3 set to convert the analog signal into the digital signal DS in synchronization with the analog signal as the detection result of the plurality of detection means 2 is converted into the digital signal. Since conversion to DS is performed, the conversion result holding area 34a of the memory 34 holds the same number of digital signals DS as the detection means 2 in association with the conversion start time.
  • the CPU 33 of the analog input unit 3 which is set to convert the analog signal into the digital signal DS in synchronism is stored in the conversion result holding area 34a in the storage area of the memory 34 as shown in FIG.
  • the four digital signals DS (T) that are the conversion start time T are held in correspondence with the conversion start time T, and the four digital signals DS (T + 1) that are the conversion start time (T + 1) are stored as the conversion start time (T + 1). Hold correspondingly.
  • the conversion start time and the plurality of digital signals DS held in the conversion result holding area 34a of the memory 34 are not limited to the example shown in FIG.
  • the CPU 33 of the analog input unit 3 that is set to convert the analog signal into the digital signal DS synchronously transmits information indicating that the digital signal DS has been generated to the control unit 5 through the communication bus B.
  • the CPUs 33 of the two analog input units 3 which are set to convert the analog signal into the digital signal DS in synchronization transmit information indicating that the digital signal DS has been generated to the control unit 5, respectively. .
  • the CPU 33 of the analog input unit 3 set to convert the analog signal into the digital signal DS in synchronization determines that the communication circuit 35 has not received the synchronization signal SS via the bus interface 36 (step ST12: No), or after the information indicating that the digital signal DS is generated by holding the conversion start time and the plurality of digital signals DS in the conversion result holding area 34a of the memory 34 is transmitted to the control unit 5, the operation is finished. .
  • the analog input unit set to convert the analog signal into the digital signal DS synchronously through the communication bus B.
  • the conversion start time and the plurality of digital signals DS held in the conversion result holding area 34a of the third memory 34 are acquired.
  • the CPU 52 of the control unit 5 associates the acquired conversion start time with a plurality of digital signals DS and stores them in the storage area of the memory 53 (step ST21).
  • the storage area of the memory 53 of the control unit 5 is provided with a corresponding storage area 53 a corresponding to the analog input unit 3.
  • the correspondence storage area 53a has a one-to-one correspondence with the analog input unit 3.
  • the correspondence storage area 53 a-1 corresponds to one analog input unit 3
  • the correspondence storage area 53 a-2 corresponds to the other analog input unit 3.
  • the memory 53 stores the digital signal DS acquired from the memory 34 of the analog input unit 3 corresponding to each corresponding storage area 53a in the corresponding storage area 53a.
  • the memory 53 stores the digital signals DS acquired from the memory 34 and associated with each other in the corresponding storage area 53a at the same time by the analog input unit 3 starting conversion.
  • the memory 53 stores four digital signals DS (T), which are conversion start times T acquired from one analog input unit 3 in the corresponding storage area 53a-1.
  • the four digital signals DS (T + 1) that are the conversion start time (T + 1) are stored in association with each other.
  • the memory 53 stores four digital signals DS (T), which are conversion start times T acquired from one analog input unit 3 in the corresponding storage area 53a-2.
  • the four digital signals DS (T + 1) that are the conversion start time (T + 1) are stored in association with each other.
  • the control system 1 performs steps ST1 to ST21 shown in FIG. 4, whereby the signal that the input unit 4 satisfies the synchronization signal generation condition from the external device 7 as shown in FIG. 7.
  • the input unit 4 When S is received, the input unit 4 generates a synchronization signal SS and transmits it to the analog input unit 3.
  • the A / D converter 32 of the analog input unit 3 converts the analog signal into the digital signal DS.
  • the memory 34 of the analog input unit 3 holds the conversion start time and the converted digital signal DS.
  • FIG. 8 is a diagram showing a setting information setting screen of the computer shown in FIG.
  • the user when setting information is set, the user operates the input device 65 of the computer 6 to display the setting information setting screen 100 shown in FIG.
  • the setting information setting screen 100 corresponds to a target unit display area 101 indicating “each analog input unit” to which setting information is connected and connected to the control unit 5, and a target unit display area 101.
  • the target unit display area 101 has a one-to-one correspondence with the analog input unit 3 connected to the control unit 5.
  • the setting area 102 has a one-to-one correspondence with the target unit display area 101.
  • the setting area 102 can display “synchronous conversion execution” and “synchronous conversion non-execution” as setting information.
  • “Synchronous conversion execution” is setting information that is set when an analog signal is converted into a digital signal DS in synchronization.
  • “Synchronous conversion non-execution” is setting information set when an analog signal is not converted into a digital signal DS in synchronization.
  • the analog input unit 3 for which “synchronous conversion execution” is selected converts the analog signal into the digital signal DS in synchronization.
  • the analog input unit 3 for which “Synchronous conversion not executed” is selected executes the control program received from the control unit 5. In the first embodiment, the analog input unit 3 for which “synchronous conversion non-execution” is selected executes the original operation of the equipment related to the workpiece W.
  • the user operates the input device 65 to perform an input operation for selecting either “synchronous conversion execution” or “synchronous conversion non-execution”, which is setting information that can be displayed in the setting area 102,
  • the determination operation for determining the setting information is performed, the determined setting information is transmitted to the control unit 5 through the communication interface 67 of the computer 6.
  • the determined setting information is transmitted to the communication circuit 54 of the control unit 5, the communication bus B, the communication circuit 35 of each analog input unit 3, and the communication circuit 45 of the input unit 4, and the memory of the analog input unit 3 34 storage areas and the storage area of the memory 44 of the input unit 4 are written.
  • the setting information setting screen 100 is not limited to the example shown in FIG.
  • the control system 1 includes the input unit 4 that transmits the synchronization signal SS generated based on the signal S received from the external device 7 to the plurality of analog input units 3, and the analog input unit 3 includes Conversion of the analog signal to the digital signal DS is started at the rising timing of the synchronization signal SS. For this reason, the control system 1 starts the conversion of each analog input unit 3 at the rising timing of the synchronization signal SS transmitted from the input unit 4, and therefore synchronizes the timing of starting the conversion of the analog input unit 3. Can do. As a result, the control system 1 can synchronize the conversion start time for starting the conversion to the digital signals DS of the plurality of analog input units 3, and can detect the thickness T of the desired position of the workpiece W.
  • the signal S indicating ON / OFF is received from the external device 7, and the synchronization signal SS generated by receiving the signal S is sent to the analog input unit 3 through the communication bus B.
  • An input unit 4 is provided. That is, the input unit 4 of the control system 1 is an input unit that has been conventionally used to receive a digital signal DS indicating “0” or “1”.
  • the analog input unit 3 receives the synchronization signal SS through the communication bus B. Therefore, the control system 1 can use the input unit 4 that receives the digital signal DS that has been used conventionally, and the analog input unit 3 is equipped with a dedicated synchronization detection circuit that detects the synchronization signal SS.
  • the analog input unit 3 can detect the synchronization signal SS.
  • the control system 1 can synchronize the conversion start times at which the plurality of analog input units 3 start conversion, while suppressing an increase in cost caused by mounting the synchronization detection circuit.
  • the analog input unit 3 starts the A / D converter 32 converting the analog signal into the digital signal DS at the rising timing of the synchronization signal SS. For this reason, the analog input unit 3 starts the conversion of each analog input unit 3 at the rising timing of the synchronization signal SS transmitted from the input unit 4, and therefore the timing of starting the conversion with the other analog input unit 3 Can be synchronized. As a result, the analog input unit 3 can synchronize the conversion start time for starting the conversion to the digital signal DS with the other analog input units 3, and can detect the thickness T of the desired position of the workpiece W.
  • control system 1 constitutes the transfer device 10 which is equipment, but may be configured independently of the equipment and may not constitute the equipment.
  • the control system 1 may be connected to another control system 1 via a network (not shown) to communicate with the other control system 1.
  • the network is a computer network that connects the control systems 1 so that they can communicate with each other.
  • the network can be configured by a LAN (Local Area Network) installed in the FA facility.
  • FIG. 9 is a diagram illustrating a configuration of a control system according to the second embodiment.
  • the same parts as those of the first embodiment are denoted by the same reference numerals, and the description thereof is omitted.
  • the transport apparatus 10-2 that is a facility includes a control apparatus 70 that is an external device, as shown in FIG.
  • the control system 1-2 according to the second embodiment has the same configuration as that of the first embodiment except that the input unit 4 receives the signal S transmitted by the control device 70 which is an external device.
  • the control device 70 is connected to the motor 11 and the encoder 15.
  • the control device 70 executes a numerical control program and controls the operation of each part of the transport device 10-2.
  • the control device 70 transmits a signal S to the input unit 4 when the transport device 10-2 is in a predetermined state based on the detection result of the encoder 15.
  • the predetermined state is a state in which the entire workpiece W is located within the detection range H shown in FIG. 9, but this state is an example.
  • the operation after the input unit 4 of the control system 1-2 according to the second embodiment receives the signal S is the same as the operation of the first embodiment.
  • the control device 70 is a computer that executes a computer program. As shown in FIG. 9, the control device 70 is a CPU 71, a RAM 72, a ROM 73, a storage device 74, an input device 75, a display device 76, a communication interface 77, and the like. ,including.
  • the CPU 71, RAM 72, ROM 73, storage device 74, input device 75, display device 76, and communication interface 77 are connected to each other via a bus B70.
  • the CPU 71 executes the numerical control program stored in the ROM 73 and the storage device 74 while using the RAM 72 as a work area.
  • the numerical control program is realized by software, firmware, or a combination of software and firmware.
  • the storage device 74 is an SSD or an HDD, but the storage device 74 is not limited to an SSD or an HDD.
  • the control system 1-2 includes the input unit 4 that transmits the synchronization signal SS generated based on the signal S received from the control device 70 to the plurality of analog input units 3, and includes the analog input unit. 3 starts to convert the analog signal to the digital signal DS at the rising timing of the synchronization signal SS.
  • the control system 1-2 can synchronize the conversion start time for starting the conversion to the digital signals DS of the plurality of analog input units 3 as in the first embodiment, and the thickness of the desired position of the workpiece W can be synchronized. T can be detected.
  • the analog input unit 3 is similar to the first embodiment in that the A / D converter 32 starts converting the analog signal into the digital signal DS at the rising timing of the synchronization signal SS.
  • the analog input unit 3 and the conversion start time for starting the conversion to the digital signal DS can be synchronized.
  • control system 1-2 since the control device 70 that controls the transport device 10-2 transmits the signal S to the input unit 4, the operation and detection of the transport device 10-2GH that is equipment is detected.
  • the conversion start time for starting the conversion of the analog signal as the detection result of the means 2 into the digital signal DS can be linked.
  • the control system 1-2 can reliably detect the thickness T, which is a state quantity at a desired position of the workpiece W.
  • the configuration described in the above embodiment shows an example of the contents of the present invention, and can be combined with another known technique, and can be combined with other configurations without departing from the gist of the present invention. It is also possible to omit or change the part.
  • control system 1 control system, 2 detection means, 3 analog input unit, 4 input unit, 7 external device, 10 transport device (equipment), 32 A / D converter (digital conversion unit), 35 communication circuit (input unit), 70 control Device (external device), S signal, SS synchronization signal, T thickness (state quantity), W work (detection target).

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
  • Programmable Controllers (AREA)

Abstract

La présente invention concerne un système de commande (1) équipé d'une pluralité d'unités d'entrée analogique (3) qui sont connectées à des moyens de détection (2), et d'une unité d'entrée (4)qui est connectée pour pouvoir communiquer avec la pluralité d'unités d'entrée analogique (3). Les unités d'entrée analogique (3) convertissent un signal analogique, qui est le résultat de détection des moyens de détection (2), en un signal numérique. Le signal numérique détermine l'amplitude du signal analogique avec au moins deux niveaux. L'unité d'entrée (4) transmet un signal de synchronisation (SS) généré sur la base d'un signal (S) reçu depuis un dispositif externe, (7) vers la pluralité d'unités d'entrée analogique (3). Lors du temps de montée du signal de synchronisation (SS) reçu depuis l'unité d'entrée (4), la pluralité d'unités d'entrée analogique (3), mutuellement synchronisées, déclenchent la conversion du signal analogique en un signal numérique.
PCT/JP2016/053551 2016-02-05 2016-02-05 Système de commande et unité d'entrée analogique WO2017134826A1 (fr)

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002268741A (ja) * 2001-03-09 2002-09-20 Mitsubishi Electric Corp 信号監視制御装置
JP5661953B1 (ja) * 2013-06-25 2015-01-28 三菱電機株式会社 プログラマブルコントローラ

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002268741A (ja) * 2001-03-09 2002-09-20 Mitsubishi Electric Corp 信号監視制御装置
JP5661953B1 (ja) * 2013-06-25 2015-01-28 三菱電機株式会社 プログラマブルコントローラ

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