WO2016171244A1 - 角形チップ抵抗器及びその製造法 - Google Patents
角形チップ抵抗器及びその製造法 Download PDFInfo
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- WO2016171244A1 WO2016171244A1 PCT/JP2016/062724 JP2016062724W WO2016171244A1 WO 2016171244 A1 WO2016171244 A1 WO 2016171244A1 JP 2016062724 W JP2016062724 W JP 2016062724W WO 2016171244 A1 WO2016171244 A1 WO 2016171244A1
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- resistor
- insulating substrate
- contact
- surface electrode
- trimming groove
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C13/00—Resistors not provided for elsewhere
- H01C13/02—Structural combinations of resistors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C1/00—Details
- H01C1/14—Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors
- H01C1/142—Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors the terminals or tapping points being coated on the resistive element
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
- H01C17/006—Apparatus or processes specially adapted for manufacturing resistors adapted for manufacturing resistor chips
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
- H01C17/06—Apparatus or processes specially adapted for manufacturing resistors adapted for coating resistive material on a base
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
- H01C17/06—Apparatus or processes specially adapted for manufacturing resistors adapted for coating resistive material on a base
- H01C17/065—Apparatus or processes specially adapted for manufacturing resistors adapted for coating resistive material on a base by thick film techniques, e.g. serigraphy
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
- H01C17/22—Apparatus or processes specially adapted for manufacturing resistors adapted for trimming
- H01C17/24—Apparatus or processes specially adapted for manufacturing resistors adapted for trimming by removing or adding resistive material
- H01C17/242—Apparatus or processes specially adapted for manufacturing resistors adapted for trimming by removing or adding resistive material by laser
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
- H01C7/003—Thick film resistors
Definitions
- the present invention relates to a rectangular chip resistor that can suppress current concentration caused by a trimming groove for adjusting a resistance value and is excellent in resistance to an overload such as a surge current, and a manufacturing method thereof.
- a method of forming a trimming groove in a resistor is well known.
- a trimming groove 93a formed by cutting in a straight line or a trimming groove 93b formed by cutting in an L shape is known.
- the current flow 94 is disturbed in the vicinity of the tip or in an L-shaped bent portion, and local heat generation due to current concentration or fluctuation in resistance value due to progress of microcrack development occurs.
- Patent Documents 1 to 4 and the like various techniques for suppressing such problems caused by current concentration have been proposed (Patent Documents 1 to 4 and the like).
- the trimming grooves in these conventional techniques are formed in a straight line shape, an L shape, or the like by first cutting the trimming groove so as to be substantially perpendicular to the direction of the current flowing through the resistor. For this reason, it is difficult to sufficiently suppress the disturbance of the current flow caused by the trimming grooves.
- Patent Document 5 proposes a method of forming a trimming groove that is cut linearly over the entire length in the length direction of the resistor in parallel with the direction of the current flowing through the resistor. In this method, in order to suppress microcracks generated at the tip of the trimming groove, it is necessary to form the trimming groove up to the electrode portion in contact with the resistor.
- An object of the present invention is to provide a rectangular chip resistor that can suppress current concentration caused by a trimming groove and exhibits excellent resistance against an overload such as a surge current. Another problem of the present invention is that the resistance value can be set with high accuracy and a wide range of resistance values can be set, and fine adjustment of the resistance value can be easily handled, so that current concentration caused by the trimming groove can be effectively suppressed. Another object of the present invention is to provide a method of manufacturing a rectangular chip resistor that can efficiently manufacture a rectangular chip resistor exhibiting excellent resistance to an overload of current. Another object of the present invention is to provide a rectangular chip resistor capable of sufficiently suppressing the influence on current concentration, current overload, and the like caused by microcracks generated when trimming a resistor, and a method of manufacturing the same. is there.
- the present invention includes an insulating substrate, a pair of first and second upper surface electrodes provided at both longitudinal ends of the upper surface of the insulating substrate, and a resistor that is in electrical contact with the upper surface electrode.
- the second upper surface electrode has a notch portion and a protruding portion that protrudes with respect to the notch portion on the inner side opposite to each other, and the notch portion of the first upper surface electrode extends in the longitudinal direction of the insulating substrate.
- the notch portion of the second upper surface electrode is substantially point-symmetric with respect to the notch portion of the first upper surface electrode and the center of the insulating substrate.
- the resistor has a contact portion that contacts the projecting portions of the first and second upper surface electrodes, and a non-contact portion that does not contact the upper surface electrode of each of the cutout portions. Extending in the longitudinal direction of the insulating substrate starting from at least one point on the edge Chip resistors, characterized in that it comprises a trimming groove comprising a line shape is provided.
- the resistor includes a trimming groove including a linear shape extending in the longitudinal direction of the insulating substrate starting from at least one point on one end of the non-contact portion on the first upper surface electrode side, and the second upper surface electrode side
- At least two trimming grooves can be provided so as to have a trimming groove including a linear shape extending in the longitudinal direction of the insulating substrate starting from at least one point on the edge of the non-contact portion.
- At least one shape of the trimming groove may be, for example, an L-shape that is bent outwardly in the transverse direction of the insulating substrate at the tip thereof following a linear shape extending in the longitudinal direction of the insulating substrate.
- Each of the protrusions of the first and second upper surface electrodes may have a shape having two vertices, and the resistor has contact points that contact the vertices, and the resistor has the contact points.
- the first and second upper surface electrodes other than the rectangular area are divided by dividing the virtual area into two types of virtual areas, which are a rectangular area surrounded by a straight line and an area other than the rectangular area.
- a region that is not in contact can be a trimming groove forming region. By setting such a trimming groove forming region, it is possible to more easily form a trimming groove for setting the resistance value without disturbing the current flow in the rectangular region.
- the step (A) of forming a pair of first and second upper surface electrodes on both ends in the longitudinal direction of the upper surface of the insulating substrate is in electrical contact with the first and second upper surface electrodes.
- the first upper surface electrode is the second upper surface electrode.
- the second upper surface electrode is formed on the inner side opposite to the first upper surface electrode, and the notch portion of the first upper surface electrode and the notch portion are substantially point-symmetric with respect to the center of the insulating substrate. And having a protrusion that protrudes relative to the notch
- the resistor is in contact with the protrusions of the first and second upper surface electrodes, and at least one non-contact of the notch portions that does not contact the upper surface electrode.
- the trimming groove includes a linear shape extending in the longitudinal direction of the insulating substrate starting from at least one point on the non-contact portion end side of the resistor.
- a method of manufacturing a rectangular chip resistor is provided, which is formed by laser trimming from the start end side.
- At least one trimming groove is formed by performing laser trimming from the starting end of the non-contact portion in the longitudinal direction of the insulating substrate, and subsequently bending outward in the transverse direction of the insulating substrate.
- the ratio of the microcrack generation direction toward the longitudinal direction of the insulating substrate is increased, it is possible to sufficiently suppress the influence of the generated microcrack on current concentration, current overload, and the like.
- step (C) when forming a plurality of trimming grooves extending in the longitudinal direction of the insulating substrate starting from a plurality of points on the edge of the non-contact portion of the resistor, a region to be trimmed is aligned along that direction.
- Laser trimming can be performed to partially overlap. By performing laser trimming in this way, the next trimming can be performed while removing the resistor cuts generated by the previous trimming.
- the rectangular chip resistor of the present invention (hereinafter sometimes abbreviated as the resistor of the present invention) has the above-described configuration, in particular, a portion where the first and second upper surface electrodes are in contact with the resistor and a portion where it is not in contact.
- the resistor has a trimming groove including a linear shape extending in the longitudinal direction starting from at least one point on the non-contact portion edge of the resistor that is not in contact with the resistor. It is possible to secure a sufficient current region that flows without being received, and to suppress current concentration by making the trimming groove formation direction substantially coincide with the current flowing direction even in the region where the trimming groove is formed. it can.
- the length of the contact portion of the resistor in contact with the first and second upper surface electrodes and the length of the non-contact portion of the non-contact portion are appropriately controlled, and the length and number of trimming grooves are controlled.
- the length and number of trimming grooves are controlled.
- the manufacturing method of the present invention performs the above-described configuration, particularly the step of forming the notch and the protrusion in step (A), and completely separates the contact portion and the non-contact portion into the resistor in step (B). Therefore, it is possible to secure a sufficient current flowing region without being affected by the trimming groove and to clarify the region where the trimming groove is formed. Therefore, it is easy to control the resistance value setting with high accuracy, and it is possible to set a wide adjustment range of the resistance value and to easily perform fine adjustment of the resistance value. Furthermore, since the ratio of the microcracks that may be generated by trimming in the step (C) to the longitudinal side of the insulating substrate is increased, the influence of the generated microcracks on current concentration and current overload is sufficiently suppressed. can do.
- FIG. 1A and FIG. 1B are plan views showing an embodiment for explaining the relationship between the first and second upper surface electrodes and the resistor in the resistor of the present invention.
- FIGS. 2A and 2B are plan views showing another embodiment for explaining the relationship between the first and second upper surface electrodes and the resistor in the resistor of the present invention.
- 3A and 3B are plan views showing another embodiment for explaining the relationship between the first and second upper surface electrodes and the resistor in the resistor of the present invention.
- the resistor of this invention it is a top view which shows one Embodiment for demonstrating the shape and formation location of a trimming groove
- FIG. 7A and FIG. 7B are schematic diagrams for explaining two examples of a method for forming a trimming groove in the resistor of the present invention. It is sectional drawing for demonstrating the structure of one Embodiment which concerns on the resistor of this invention.
- FIG. 9A and FIG. 9B are plan views of a chip resistor for explaining an example of a trimming groove generally formed in the chip resistor and a current flow in the resistor at that time, respectively. is there.
- FIG. 1 (a) and 1 (b), FIG. 2 (a) and FIG. 2 (b), and FIG. 3 (a) and FIG. 3 (b) are the first and second in the resistor of the present invention. It is a top view which shows a respectively different example of embodiment of the resistor before forming a trimming groove
- 10, 20 and 30 are insulating substrates, and the insulating substrates are a pair of first upper surfaces provided by screen printing at both longitudinal ends of the upper surface.
- the first upper surface electrodes (11x, 21x, 31x) are inward from the two sides in the longitudinal direction of the insulating substrate (10, 20, 30) in the transverse direction of the insulating substrate. It has two notches (11a, 21a, 31a) toward the front, and has one projecting portion (11b, 21b, 31b) projecting from these.
- the second upper surface electrodes (11y, 21y, 31y) are provided with notches (11a, 21a, 31a) and protrusions (11b, 21b, 31b) of the first upper surface electrode and the insulating substrates (10, 20, 30)
- Notch portions (11a, 21a, 31a) and projecting portions (11b, 21b, 31b) are provided at positions substantially symmetrical with respect to the center so as to face the first upper surface electrode as shown.
- the first and second upper surface electrodes have two notches and one protrusion, respectively, and have substantially the same shape substantially in point symmetry.
- the term “substantially point symmetrical” used in the present invention means that the shape of the first upper surface electrode and the shape of the second upper surface electrode are substantially the same shape, in addition to the case where they are completely the same shape. It means to include some cases. For example, in the case where the first and second upper surface electrodes are formed by printing or the like, there may be a case where it is difficult to completely match the shapes due to some distortion even if they are printed in the same shape by design. In addition, the problem solving feature of the present invention does not mean that the first and second upper surface electrodes can only be obtained if they have the same shape. Therefore, the expression “substantially point symmetrical” has the above meaning, and the shape of the first upper surface electrode and the shape of the second upper surface electrode are within the range in which the problem of the present invention can be solved. Differences are allowed.
- the first upper surface electrodes (11x, 21x, 31x) are inward in the transverse direction of the insulating substrate from one of the two sides in the longitudinal direction of the insulating substrate (10, 20, 30). It has one notch part (11a, 21a, 31a) toward the front, and has a protrusion part (11b, 21b, 31b) which protrudes with respect to this.
- the second upper surface electrodes (11y, 21y, 31y) are provided with notches (11a, 21a, 31a) and protrusions (11b, 21b, 31b) of the first upper surface electrode and the insulating substrates (10, 20, 30)
- Notch portions (11a, 21a, 31a) and projecting portions (11b, 21b, 31b) are provided at positions substantially symmetrical with respect to the center so as to face the first upper surface electrode as shown.
- the first and second upper surface electrodes each have one notch and one protrusion, and have substantially the same shape substantially in point symmetry.
- the resistor 12 has a rectangular shape, and two contact points of the resistor 12 in contact with the two vertices of the protrusions 11b of the first and second upper surface electrodes, respectively.
- the two contact portions 12b including 12a are in electrical contact with the first and second upper surface electrodes.
- One notch 11a forms a gap so that the first and second upper surface electrodes (11x, 11y) do not contact the resistor 12 as shown in the figure.
- the resistor 12 is provided with a non-contact portion 12c that does not contact the first and second upper surface electrodes (11x, 11y).
- the resistor 22 has an octagonal shape having six 90 ° convex inner angles and two 270 ° concave inner angles, as shown in the figure, and the first and second upper surfaces.
- the two contact portions 22b including the two contact points 22a of the resistor 22 in contact with the two vertices of the protruding portions 21b of the electrodes are in electrical contact with the first and second upper surface electrodes.
- the first and second upper surface electrodes (21x, 21y) do not contact the resistor 22, as shown in the figure.
- a non-contact portion 22c where the resistor 22 is not in contact with the first and second upper surface electrodes (21x, 21y) is provided by the notch portion 21a or the like that forms such a gap.
- the resistor 32 has a hexagonal shape having two 90 ° inner angles and four 135 ° inner angles, as shown, and each of the first and second upper surface electrodes is shown in FIG.
- the two contact portions 32b including the two contact points 32a of the resistor 32 in contact with the two apexes of the protruding portion 31b are in electrical contact with the first and second upper surface electrodes.
- the first and second upper surface electrodes (31x, 31y) are formed of one notch 31a and four 135 ° notch-shaped portions of the hexagonal resistor 32, as shown in the figure. Each gap is formed so as not to contact 32.
- a non-contact portion 32c where the resistor 32 does not contact the first and second upper surface electrodes (31x, 31y) is provided by the notch portion 31a or the like that forms such a gap.
- FIG. 2 is a plan view for explaining an example of a formation place, where the same components as those in FIG. 1A are denoted by the same reference numerals, and detailed description thereof is omitted.
- FIGS. 7A and 7B are schematic views showing an example of a method of forming a trimming groove in the resistor of the present invention.
- the resistor 12 includes a rectangular region surrounded by connecting four contact points 12a with straight lines, that is, two contact portions 12b having two sides and two dotted lines in the figure.
- a virtual parallelogram region (41, 51, 61) surrounded by, and a region not in contact with the first and second upper surface electrodes (11x, 11y) other than the parallelogram region, that is, And two trimming groove forming regions (42, 52, 62) which are resistor regions outside the dotted line in the figure.
- the parallelogram-shaped regions (41, 51, 61) are preferably regions where trimming grooves are not formed, and current flow from the first and second upper surface electrodes (11x, 11y) may be disturbed. Absent.
- the angle ⁇ shown in the figure is preferably 70 ° to 90 °, more preferably 75 ° to 90 °, and particularly preferably 80 ° to 90 °.
- FIG. 4 is a plan view showing an embodiment of the resistor of the present invention in which the trimming groove 43 is formed only in one of the two trimming groove forming regions 42.
- the trimming groove 43 is formed as two linear shapes having different lengths in the longitudinal direction of the insulating substrate 10, starting from two points on the end side of the non-contact portion 12 c.
- the number, length, width, and the like of the trimming grooves can be appropriately determined in consideration of a desired resistance value, rated power, and the like.
- the trimming groove can be formed by, for example, a known method in which a probe needle is brought into contact with a resistor and laser cutting is performed while measuring a resistance value.
- the resistor of the present invention for example, as shown in FIG.
- the end side of the non-contact portion 12 c that is not in contact with the second upper surface electrode 11 y is used as the starting end when the trimming groove 43 is formed, and the Since the trimming groove 43 is formed in a linear shape along the longitudinal direction of the insulating substrate 10 from the starting end, that is, along the direction of current flowing through the resistor 12, current concentration in the trimming groove 43 is sufficiently suppressed.
- FIG. 5 is a plan view showing an embodiment of the resistor of the present invention in which trimming grooves (53a, 53b) are formed in two trimming groove forming regions 52, respectively.
- the trimming grooves (53a, 53b) are formed in a straight line shape in the longitudinal direction of the insulating substrate 10 with two points and one point on the end side of the non-contact portion 12c as the start ends.
- FIG. 6 is a plan view showing an embodiment of the resistor of the present invention in which the trimming groove 63 is formed in only one of the two trimming groove forming regions 62.
- the trimming groove 63 is cut into a linear shape in the longitudinal direction of the insulating substrate 10, starting from one point on the edge of the non-contact portion 12 c, and then bent at right angles outward in the transverse direction of the insulating substrate 10. And cut to form an L shape.
- the trimming groove is first formed as described above.
- FIG. 7A and FIG. 7B are schematic diagrams for explaining a method of forming a trimming groove in the resistor of the present invention.
- FIG. 7A shows an example in which trimming grooves 70 having the same width are formed so as to be in contact with adjacent grooves from the same length to different lengths. Thus, by providing a plurality of trimming grooves with the same width, fine adjustment of the resistance value can be easily performed.
- FIG. 7B shows an example in which trimming grooves 71 having the same width are formed from the same length to different lengths so as to overlap the adjacent grooves.
- the resistance value can be easily finely adjusted, and by forming the next trimming groove so as to overlap with the previously formed trimming groove, The next trimming can be performed while removing the cuttings of the resistor generated by the trimming.
- the shape of the trimming groove can be variously selected as long as it includes a linear shape extending in the longitudinal direction of the insulating substrate, and in order to obtain a desired resistance value, the number thereof, The length, width, etc. can be appropriately formed at the above-mentioned predetermined locations.
- FIG. 8 is a cross-sectional view for explaining the configuration of one embodiment of the resistor of the present invention, in which 80 is an insulating substrate.
- the upper surface of the insulating substrate 80 includes a pair of first upper surface electrodes 81x and second upper surface electrodes 81y at both ends thereof, and a resistor 82 so as to be in electrical contact with the first and second upper surface electrodes. .
- the relationship between the upper surface electrode and the resistor is as described with reference to FIGS.
- the lower surface of the insulating substrate 80 includes a pair of lower surface electrodes 81z at both ends thereof.
- the resistor 82 is protected as shown in the figure by a glass-based protective film 83a and a resin-based protective film 83b. Further, although not shown, the resistor 82 is formed with a trimming groove as described with reference to FIGS.
- the first and second upper surface electrodes (81x, 81y) and the lower surface electrode 81z are connected by an end surface electrode 84.
- the upper surface, the lower surface, and the end surface electrodes are covered with a nickel plating layer 85, and a tin plating layer 86 is applied thereon as an overcoat.
- the configuration shown in FIG. 8 is an example, and the resistor of the present invention is not limited to this.
- the material used for each structure can be suitably selected with a well-known material etc.
- the step (A) of forming a pair of first and second upper surface electrodes at both longitudinal ends of the upper surface of the insulating substrate is in electrical contact with the first and second upper surface electrodes.
- a notch or the like is formed by a screen printing method.
- other formation methods such as a laser patterning method and an etching method may be used. Included in the range.
- the upper electrode and the resistor can be formed on the insulating substrate by ordinary screen printing or the like so as to have the desired shape as described above.
- the first upper surface electrode has a notch on the inner side facing the second upper surface electrode from at least one of the two sides in the longitudinal direction of the insulating substrate inward in the transverse direction of the insulating substrate.
- the second upper surface electrode is formed on the inner side facing the first upper surface electrode and the notch portion of the first upper surface electrode.
- the insulating substrate is formed so as to have a notch at a substantially point-symmetrical position with respect to the center of the insulating substrate, and to have a protruding portion protruding from the notch.
- the notch portion has been described as an example of being formed by a screen printing method. However, it is also possible to form the notch portion by a patterning method using a laser or an etching method after forming the upper surface electrode.
- the resistor includes a contact portion that contacts the protrusions of the first and second upper surface electrodes, and at least one non-contact portion that does not contact the upper surface electrode of the notch portions. Shape. The desired shapes of the upper surface electrode and the resistor are as described with reference to FIGS.
- the trimming groove can be formed by a known method of laser cutting while measuring the resistance value of the resistor as described above.
- a point that is formed by laser trimming from the starting end side so as to include a linear shape extending in the longitudinal direction of the insulating substrate starting from at least one point on the non-contact portion of the resistor end side Is as described in FIGS. 4 to 6 above.
- the lower and end electrodes, the protective film, and the plating layer are formed by a known method, for example.
- the resistor of the present invention can be manufactured.
- Examples 1-1 to 1-3 In the resistor shown in FIG. 8, rated resistors of 0.1 W, 0.25 W, and 0.33 W are used as the resistors having the first and second upper surface electrodes and the trimming grooves, with the configuration shown in FIG. 5. And a 0.4 W resistor was manufactured. A 96% alumina substrate is used as the insulating substrate, a silver-palladium metal film is used as the upper electrode, a silver metal film is used as the lower electrode, and a resistance film using a ruthenium oxide special resistance material is used as the resistor.
- the electrode is a nickel-chromium metal film formed by sputtering
- the protective film 83a is a glass film
- the protective film 83b is a silver palladium film
- the plating layer 85 is a nickel plating layer
- the plating layer 86 is a tin plating layer.
- Each manufactured resistor has a voltage 2.5 times the rated voltage, that is, a resistor with a rated power of 0.1 W, 14.14 V, a resistor with a rated power of 0.25 W, 22.36 V, and a rated power of 0.
- a voltage of 25.69V is applied to a resistor of .33 W and a voltage of 28.28 V is applied to a resistor of rated power of 0.4 W for 5 seconds, and the maximum value, minimum value and average of the resistance value change rate ( ⁇ R / R) are applied.
- a short time overload test was performed by measuring the value. The results are shown in Table 1.
- the resistance value change rate was within ⁇ 1.0%.
- the blank in Table 1 means that measurement is impossible.
- Comparative Example 1 As the upper surface electrode and the resistor, the one shown in FIG. 9A is used, and the trimming grooves formed in the resistor are replaced with the two shown in FIG. A resistor was manufactured in the same manner as in Example 1-1 except for the above. Using the obtained resistor, a short-time overload test was conducted in the same manner as in Example 1-1. The results are shown in Table 1.
- Examples 2-1 to 2-3 and Comparative Example 2 Resistors with rated power of 0.1 W, 0.25 W, and 0.33 W were manufactured in the same manner as in Examples 1-1 to 1-3 and Comparative Example 1. A voltage that is 2.5 times the rated voltage is applied to each manufactured resistor for 1 second, and a cycle that is not applied for 25 seconds is performed 10,000 times, and the resistance value change rate ( ⁇ R / R) maximum value, minimum value, and average value The intermittent overload test was conducted by measuring The results are shown in Table 2. The resistance value change rate was within ⁇ 1.0%. Moreover, the blank in Table 2 means that measurement is impossible.
- Examples 3-1 to 3-3 and Comparative Example 3 Resistors were manufactured in the same manner as in Examples 1-1 to 1-3 and Comparative Example 1.
- the results are shown in Table 3.
- the limiting power is assumed to have a resistance value change rate within ⁇ 1.0%.
- Examples 4-1 to 4-3 and Comparative Example 4 Resistors were manufactured in the same manner as in Examples 1-1 to 1-3 and Comparative Example 1. For each manufactured resistor, perform a current noise test of the fixed resistor according to JIS C 5201-1, measure the noise voltage generated from the resistor, and calculate the maximum value of the noise voltage calculated by the specified formula The minimum value and the average value were obtained. Furthermore, noise was obtained from the maximum value to the minimum value. The results are shown in Table 4. The result is the ratio of the noise voltage to the DC applied voltage, and the larger the negative value, the better the result.
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Abstract
Description
そこで、このような電流集中による問題を抑制するための技術が種々提案されている(特許文献1~4等)。
しかし、これら従来技術におけるトリミング溝は、いずれも抵抗体に流れる電流の方向に対して、まず、ほぼ直角方向となるようにトリミング溝をカットして、直線状やL字状等に形成されるため、トリミング溝による電流の流れの乱れを十分に抑制することが困難である。
特許文献5には、抵抗体に流れる電流方向に対して平行に、抵抗体長さ方向全長にわたって直線状にカットしたトリミング溝の形成方法が提案されている。この方法では、トリミング溝の先端に生じるマイクロクラックを抑制するために、抵抗体に接する電極部分にまでトリミング溝を形成する必要がある。この場合、抵抗体はトリミング溝により電極と確実に切断されないため、該トリミング溝形成時における抵抗値設定を精度良く行うことが困難である。加えて、抵抗体がトリミング溝により通電可能状態で完全に分割されるため、該分割された狭い方の抵抗体領域において電流の負荷集中が生じるおそれがある。
本発明の別の課題は、精度に優れた抵抗値設定、及び広範囲にわたる抵抗値設定が可能であり、抵抗値の微調整も容易に対応できるため、トリミング溝により生じる電流集中を有効に抑制でき、電流の過負荷に対して優れた耐性を示す角形チップ抵抗器を効率良く製造することが可能な角形チップ抵抗器の製造法を提供することにある。
本発明の他の課題は、抵抗体をトリミングする際に生じるマイクロクラックによる電流集中や電流の過負荷等に対する影響を十分抑制することが可能な角形チップ抵抗器及びその製造法を提供することにある。
前記トリミング溝の少なくとも1つの形状は、絶縁基板の長手方向に延長した直線形状に続いてその先端で絶縁基板横断方向外方に屈曲した、例えばL字状の形状とすることができる。このような形状のトリミング溝の形成を可能にすることにより、抵抗値設定をより広範囲で制御することができる。
本発明の製造法は、上記構成、特に、工程(A)における切欠き部及び突出部の形成工程を行い、工程(B)において抵抗体に上記接触部及び非接触部を完全に分離して設けることができるので、トリミング溝に影響を受けずに流れる電流の領域を十分確保することが可能になるとともに、トリミング溝の形成領域を明確にすることができる。従って、精度の良い抵抗値設定の制御が容易となり、しかも抵抗値の調整範囲を広く設定することができ、抵抗値の微調整も容易に行うことができる。更に、工程(C)におけるトリミングにより生じる場合があるマイクロクラックも、絶縁基板の長手方向側に向く割合が高くなるので、生じたマイクロクラックにおける電流集中や電流の過負荷等に対する影響も十分に抑制することができる。
図1(a)及び図1(b)、図2(a)及び図2(b)、並びに図3(a)及び図3(b)は、本発明の抵抗器において、第1及び第2の上面電極と抵抗体との関係及びこれらの形状等を説明するための、トリミング溝を形成する前の抵抗器の実施形態のそれぞれ異なる一例を示す平面図である。
ここで、本発明において用いる「実質的に点対称」という意味は、第1の上面電極の形状と第2の上面電極の形状とが、完全に同一形状である場合の他、略同一形状である場合をも含むことを意味する。例えば、第1及び第2の上面電極を印刷等により形成する場合、設計上は同一形状に印刷しても、多少のひずみが生じて形状を完全に一致させることが困難である場合がある。また、本発明の特徴とする課題解決も、第1及び第2の上面電極が完全に同一形状でなければ得られないというものではない。従って、「実質的に点対称」という表現は、上記のような意味であって、本発明の課題が解決しうる範囲であれば、第1の上面電極の形状と第2の上面電極の形状との相違は許容される。
図1(a)において第1及び第2の上面電極(11x,11y)のそれぞれ2つの切欠き部11a、又は図1(b)において第1及び第2の上面電極(11x,11y)のそれぞれ1つの切欠き部11aは、図示するように第1及び第2の上面電極(11x,11y)が抵抗体12に接触しないようにそれぞれ間隙を形成している。このような間隙を形成する切欠き部11aにより、抵抗体12に、第1及び第2の上面電極(11x,11y)に接触しない非接触部12cを設けている。
図2(a)において第1及び第2の上面電極(21x,21y)のそれぞれ2つの切欠き部21a、又は図2(b)において第1及び第2の上面電極(21x,21y)のそれぞれ1つの切欠き部21a、及び八角形状の上記抵抗体22における凹部内角外側の切欠き形状部分は、図示するように第1及び第2の上面電極(21x,21y)が抵抗体22に接触しないようにそれぞれ間隙を形成している。このような間隙を形成する切欠き部21a等により、抵抗体22が、第1及び第2の上面電極(21x,21y)に接触しない非接触部22cを設けている。
図3(a)において第1及び第2の上面電極(31x,31y)のそれぞれ2つの切欠き部31a、又は図3(b)において第1及び第2の上面電極(31x,31y)のそれぞれ1つの切欠き部31a、及び六角形状の上記抵抗体32における135°の4つの内角外側の切欠き形状部分は、図示するように第1及び第2の上面電極(31x,31y)が抵抗体32に接触しないようにそれぞれ間隙を形成している。このような間隙を形成する切欠き部31a等により、抵抗体32が、第1及び第2の上面電極(31x,31y)に接触しない非接触部32cを設けている。
前記平行四辺形の領域(41,51,61)は、好ましくはトリミング溝が形成されない領域であり、第1及び第2の上面電極(11x,11y)からの電流の流れが乱されることがない。従って、このような領域を広範囲で確保することにより、本発明における所望の目的が得られ易くなる。この点を考慮した場合、図中に示す角度θは、好ましくは70°~90°、より好ましくは75°~90°、特に好ましくは80°~90°である。このような領域(41,51,61)をより広範囲に確保し、かつトリミング溝形成領域(42,52,62)において特定方向にトリミング溝を形成する構成を採用することにより、トリミング溝における電流集中の不具合をより十分に緩和することができるとともに、抵抗器の定格電力を高くした場合であっても過負荷電圧に対して抵抗値変化率をより低く抑えることが可能となり、更には限界電力を更に上げることが可能になる。
本発明の抵抗器においては、例えば、図4に示されるとおり、第2の上面電極11yに接触していない非接触部12cの端辺を、トリミング溝43を形成する際の始端とし、かつ該始端から絶縁基板10の長手方向、即ち、抵抗体12を流れる電流方向に沿うように、直線形状にトリミング溝43を形成するので、該トリミング溝43における電流集中が十分抑制される。
図7(b)は、同一幅のトリミング溝71を同一長さから異なる長さに隣の溝に重なるように形成した例を示す。このように同一幅で複数のトリミング溝を設けることにより、抵抗値の微調整を容易に行うことができ、しかも先に形成したトリミング溝に重なるように次のトリミング溝を形成することにより、先のトリミングにより生じた抵抗体の切り滓を除去しながら次のトリミングを行うことができる。
本発明の抵抗器において、トリミング溝の形状は、上述の絶縁基板の長手方向に延長する直線形状を含む形状であれば種々選択することができ、所望の抵抗値を得るために、その本数、長さ、幅等も上述の所定の箇所に適宜形成することが可能である。
図8は、本発明の抵抗器に係る一実施形態の構成を説明するための断面図であって、80は絶縁基板である。絶縁基板80の上面は、その両端に一対の第1の上面電極81x及び第2の上面電極81yを備え、これら第1及び第2の上面電極に電気的に接触するように抵抗体82を備える。これら上面電極及び抵抗体の関係は、図1~図3において説明したとおりである。
絶縁基板80の下面は、その両端に一対の下面電極81zを備える。抵抗体82はガラス系の保護膜83a及び樹脂系保護膜83bにより図示するように保護されている。また、抵抗体82には、図示しないが図4~図7において説明したとおり、トリミング溝が形成されている。
第1及び第2の上面電極(81x,81y)並びに下面電極81zは、端面電極84により接続されている。上面、下面及び端面電極は、ニッケルめっき層85に覆われており、その上にオーバーコートとしてスズめっき層86が施されている。
以上の図8に示す構成は一例であって、本発明の抵抗器はこれに限定されない。また各構成に用いる材料は、公知の材料等により適宜選択することができる。
工程(A)において第1の上面電極は、第2の上面電極に対向する内側に、絶縁基板の長手方向の2つの辺の少なくとも一方から絶縁基板横断方向内方に向かって切欠き部を有するように、かつ該切欠き部に対して突出する突出部を有するように形成し、第2の上面電極は、第1の上面電極に対向する内側に、第1の上面電極の切欠き部と絶縁基板中央に対して実質的に点対称の位置に切欠き部を有するように、かつ該切欠き部に対して突出する突出部を有するように形成する。この際、切欠き部はスクリーン印刷法で形成する例で説明したが、上面電極を形成後に、レーザーによるパターニング法やエッチング法により形成することも可能である。
工程(B)において抵抗体は、第1及び第2の上面電極の上記各突出部に接触する接触部と、各上記切欠き部における上面電極に接触しない少なくとも各1つの非接触部とを有する形状とする。
このような上面電極及び抵抗体の所望形状については、図1~図3等において説明したとおりである。
工程(C)において、抵抗体端辺の非接触部上の少なくとも1点を始端として、絶縁基板の長手方向に延長する直線形状を含むように、前記始端側からレーザートリミングして形成する点については、上述の図4~図6において説明したとおりである。
実施例1-1~1-3
図8に示す抵抗器において、第1及び第2の上面電極、並びにトリミング溝を備える抵抗体として、図5に示す形態のものを用いて、定格電力0.1W、0.25W、0.33W及び0.4Wの抵抗器を製造した。絶縁基板としては96%アルミナ基板を、上面電極としては銀パラジウム系金属膜を、下面電極としては銀系金属膜を、抵抗体としては酸化ルテニウム系の特殊抵抗材を用いた抵抗膜を、端面電極はスパッタにより形成したニッケル-クロム系金属膜を、保護膜83aはガラス系膜を、保護膜83bは銀パラジウム系膜を、めっき層85はニッケルめっき層を、めっき層86はスズめっき層をそれぞれ用いた。
図5に示すθを70°に設定したものを実施例1-1、79°に設定したものを実施例1-2、及び87°に設定したものを実施例1-3とした。
上面電極及び抵抗体として、図9(a)に示す形態のものとし、抵抗体に形成されるトリミング溝を図9(a)に示される2本に代えて、異なる長さの3本とした以外は実施例1-1と同様に抵抗器を製造した。得られた抵抗器を用いて、実施例1-1と同様に短時間過負荷試験を行った。結果を表1に示す。
実施例1-1~1-3及び比較例1と同様に、定格電力0.1W、0.25W及び0.33Wの抵抗器を製造した。
製造した各抵抗器に、定格電圧の2.5倍の電圧を1秒間印加し、25秒間印加しないサイクルを10000回行い、抵抗値変化率(ΔR/R)の最大値、最小値及び平均値を測定することにより、断続過負荷試験を行った。結果を表2に示す。なお、抵抗値変化率が±1.0%以内を合格とした。また、表2中の空欄は測定不能を意味する。
実施例1-1~1-3及び比較例1と同様に抵抗器を製造した。
製造した抵抗器に、電圧Vを印加時間1ms印加してワンパルス限界電力(電圧V×印加時間t=限界電力(W))を測定した。結果を表3に示す。なお、限界電力は抵抗値変化率が±1.0%以内のものとした。
実施例1-1~1-3及び比較例1と同様に抵抗器を製造した。
製造した各抵抗器について、JIS C 5201-1 にしたがって固定抵抗器の電流雑音試験を行い、抵抗器から発生する雑音(ノイズ)電圧を測定し、規定された式により算出した雑音電圧の最大値、最小値及び平均値を求めた。更に最大値から最小値まで雑音を求めた。結果を表4に示す。なお、結果は、直流印加電圧に対する雑音電圧の比となり、マイナスの値が大きいほど良い結果を示す。
11x,21x,31x,81x:第1の上面電極
11y,21y,31y,81y:第2の上面電極
12,22,32,82:抵抗体
11a,21a,31a:切欠き部
11b,21b,31b:突出部
12b,22b,32b:接触部
12c,22c,32c:非接触部
43,53a,53b,63,70,71:トリミング溝
41,51,61:平行四辺形の領域
42,52,62:トリミング溝形成領域
Claims (9)
- 絶縁基板、該絶縁基板上面の長手方向両端部に設けた一対の第1及び第2の上面電極、及び該上面電極に電気的に接触する抵抗体を含み、
第1及び第2の上面電極は、相対向する内側に、切欠き部及び該切欠き部に対して突出する突出部をそれぞれ有し、第1の上面電極の切欠き部は、絶縁基板の長手方向の2つの辺の少なくとも一方から絶縁基板横断方向内方に向かっており、第2の上面電極の切欠き部は、第1の上面電極の切欠き部と絶縁基板中央に対して実質的に点対称の位置にあり、
抵抗体は、第1及び第2の上面電極の各上記突出部において接触する接触部と、各上記切欠き部における上面電極に接触しない非接触部とを有し、該非接触部端辺上の少なくとも1点を始端として、絶縁基板の長手方向に延長した直線形状を含むトリミング溝を有することを特徴とする角形チップ抵抗器。 - 抵抗体は、第1の上面電極側の1つの前記非接触部端辺の少なくとも1点を始端として絶縁基板の長手方向に延長した直線形状を含むトリミング溝、及び第2の上面電極側の1つの前記非接触部端辺の少なくとも1点を始端として絶縁基板の長手方向に延長した直線形状を含むトリミング溝を有する請求項1記載の角形チップ抵抗器。
- トリミング溝の少なくとも1つの形状は、絶縁基板の長手方向に延長した直線形状に続いてその先端で絶縁基板横断方向外方に屈曲した形状である請求項1又は2記載の角形チップ抵抗器。
- トリミング溝が、マイクロクラックを有する請求項1~3のいずれかに記載の角形チップ抵抗器。
- 第1及び第2の上面電極の突出部はそれぞれ2つの頂点を有し、上記抵抗体はこれら頂点に接触する接触点を有し、上記抵抗体は、これら接触点を直線で連結して囲まれた矩形状領域と該矩形状領域以外の領域とからなり、該矩形状領域以外の、第1及び第2の上面電極に接していない領域をトリミング溝形成領域とした請求項1~4のいずれか1項記載の角形チップ抵抗器。
- 上記矩形状領域において、2組の対向する角の一方の組の角度が70°~90°である請求項5記載の角形チップ抵抗器。
- 絶縁基板上面の長手方向両端部に、一対の第1及び第2の上面電極を形成する工程(A)、第1及び第2の上面電極と電気的に接触するように抵抗体を形成する工程(B)、及び抵抗値調整のために抵抗体にトリミング溝を設ける工程(C)を含み、
工程(A)において、第1の上面電極は、第2の上面電極に対向する内側に、絶縁基板の長手方向の2つの辺の少なくとも一方から絶縁基板横断方向内方に向かって切欠き部を有するように、かつ該切欠き部に対して突出する突出部を有するように形成し、第2の上面電極は、第1の上面電極に対向する内側に、第1の上面電極の切欠き部と絶縁基板中央に対して実質的に点対称の位置に切欠き部を有するように、かつ該切欠き部に対して突出する突出部を有するように形成し、
工程(B)において抵抗体は、第1及び第2の上面電極の上記各突出部に接触する接触部と、各上記切欠き部における上面電極に接触しない少なくとも各1つの非接触部とを有する形状とし、
工程(C)においてトリミング溝は、抵抗体の上記非接触部端辺上の少なくとも1点を始端として、絶縁基板の長手方向に延長する直線形状を含むように、前記始端側からレーザートリミングして形成することを特徴とする角形チップ抵抗器の製造法。 - 工程(C)において、少なくとも1つのトリミング溝を、上記非接触部の始端から、絶縁基板の長手方向にレーザートリミングし、続いて絶縁基板横断方向外方に屈曲させてレーザートリミングすることにより形成する請求項7記載の製造法。
- 工程(C)において、抵抗体の上記非接触部端辺上の複数点を始端として、絶縁基板の長手方向に延長する複数のトリミング溝を形成するにあたり、トリミングする領域をその方向に沿って一部重なるようにレーザートリミングする請求項7又は8記載の製造法。
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WO2022153638A1 (ja) * | 2021-01-15 | 2022-07-21 | Koa株式会社 | チップ抵抗器およびチップ抵抗器の製造方法 |
CN115206609A (zh) * | 2021-04-05 | 2022-10-18 | Koa株式会社 | 片式电阻器和片式电阻器的制造方法 |
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KR102157476B1 (ko) * | 2018-02-14 | 2020-09-21 | (주)알파플러스 | 진공 증발원용 히터 및 절연체 어셈블리 |
JP7085378B2 (ja) * | 2018-03-23 | 2022-06-16 | Koa株式会社 | チップ抵抗器 |
JP7152184B2 (ja) * | 2018-05-17 | 2022-10-12 | Koa株式会社 | チップ抵抗器およびチップ抵抗器の製造方法 |
CN110021465A (zh) * | 2019-04-11 | 2019-07-16 | 深圳市杰普特光电股份有限公司 | 电阻板的修调方法、装置、电阻板及存储介质 |
JP2022109674A (ja) * | 2021-01-15 | 2022-07-28 | Koa株式会社 | チップ抵抗器およびその製造方法 |
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CN115206609B (zh) * | 2021-04-05 | 2023-12-19 | Koa株式会社 | 片式电阻器和片式电阻器的制造方法 |
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CN107533889B (zh) | 2019-11-05 |
KR102391738B1 (ko) | 2022-04-28 |
US10242776B2 (en) | 2019-03-26 |
US20180108462A1 (en) | 2018-04-19 |
TWI701687B (zh) | 2020-08-11 |
TW201643903A (zh) | 2016-12-16 |
CN107533889A (zh) | 2018-01-02 |
JPWO2016171244A1 (ja) | 2018-02-15 |
JP6822947B2 (ja) | 2021-01-27 |
KR20170139594A (ko) | 2017-12-19 |
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