WO2014021077A1 - Substrat multicouche et module d'alimentation utilisant un substrat multicouche - Google Patents

Substrat multicouche et module d'alimentation utilisant un substrat multicouche Download PDF

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Publication number
WO2014021077A1
WO2014021077A1 PCT/JP2013/069045 JP2013069045W WO2014021077A1 WO 2014021077 A1 WO2014021077 A1 WO 2014021077A1 JP 2013069045 W JP2013069045 W JP 2013069045W WO 2014021077 A1 WO2014021077 A1 WO 2014021077A1
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Prior art keywords
wiring
metal
multilayer substrate
power
power supply
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PCT/JP2013/069045
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English (en)
Japanese (ja)
Inventor
要一 守屋
悟志 伊藤
山本　祐樹
幸弘 八木
安隆 杉本
高田　隆裕
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株式会社村田製作所
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Priority to JP2014528060A priority Critical patent/JPWO2014021077A1/ja
Publication of WO2014021077A1 publication Critical patent/WO2014021077A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49822—Multilayer substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49861—Lead-frames fixed on or encapsulated in insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0263—High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49113—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1203—Rectifying Diode
    • H01L2924/12032—Schottky diode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09054—Raised area or protrusion of metal substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09118—Moulded substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007—Types of components
    • H05K2201/10166—Transistor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
    • H05K3/202—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern using self-supporting metal foil pattern
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits

Definitions

  • the present invention relates to a multilayer substrate and a power module using the multilayer substrate, and more particularly to a multilayer substrate for mounting electronic components such as a large capacity power semiconductor that processes a large current of 50 amperes or more.
  • Patent Document 1 discloses a switching power semiconductor mounting substrate in which a low resistance thick copper wiring is integrally formed on a ceramic insulator.
  • FIG. 22 is a schematic cross-sectional view of a conventional switching power semiconductor mounting substrate 110 described in Patent Document 1. In FIG. In FIG.
  • 101 is an insulating substrate
  • 102 is a switching power semiconductor
  • 103 is a metal wiring
  • 104 is an electrode terminal
  • 105 is a connection wire.
  • insulating substrate 101 a ceramic substrate such as alumina (Al 2 O 3 ) or aluminum nitride (AlN) is used.
  • the metal wiring 103 is made of copper (Cu) or molybdenum (Mo) bonded to the insulating substrate 101.
  • the switching power semiconductor 102 is brazed to the metal wiring 103.
  • connection wire 105 an aluminum (Al) wire is generally used.
  • the conventional switching power semiconductor mounting substrate 110 disclosed in Patent Document 1 is used for high power, and a large current flows. Therefore, the conduction resistance of the metal wiring 103 is reduced as much as possible to reduce power loss. It is necessary to suppress the amount of heat generated. Therefore, a metal having a small specific resistance must be used for the metal wiring 103 and its thickness must be increased. From the above viewpoint, copper is used for the metal wiring 103. However, since alumina or aluminum nitride is used for the insulating substrate 101, there is a restriction that the thickness of the metal wiring 103 cannot be increased.
  • the thermal expansion coefficient of copper is 16 to 17 ppm / K
  • the thermal expansion coefficient of alumina is 7 to 8 ppm / K
  • the thermal expansion coefficient of aluminum nitride is 4 to 5 ppm / K. This is because warpage occurs in the process of bonding and cooling these ceramic substrates and copper, the bonding interface is peeled off, or the metal wiring 103 is broken. Even if the bonding can be made, the bonding interface peels off under a high temperature state due to heat generated from the switching power semiconductor 102 or heat generated from the metal wiring 103 and a heat cycle due to cooling when not in use. The problem of breaking occurs.
  • the thickness of metal wiring such as copper and aluminum that can be formed on these substrates is limited to 0.5 mm.
  • the switching power semiconductor 102 is a silicon (Si) semiconductor
  • the above-described high-temperature state may be assumed to be a maximum of 150 ° C., but silicon carbide (which is a wide band gap semiconductor expected as a future power semiconductor)
  • SiC silicon carbide
  • Patent Document 1 when a metal wiring 103 made of copper is joined to an insulating substrate (ceramic substrate) 101, molybdenum having a thermal expansion coefficient of 4 to 5 ppm / K is interposed between the joints.
  • This molybdenum is understood to have the purpose of relieving the thermal stress generated by the difference in thermal expansion coefficient between the insulating substrate (ceramic substrate) 101 and the metal wiring 103, but its effectiveness is limited, and the thickness of the metal wiring 103 is limited. It cannot be a means to fundamentally solve the restrictions on.
  • the main object of the present invention is to provide a metal wiring having a low conduction resistance that is not subject to the restrictions on the thickness of the metal wiring as in the prior art, even if the power loss is small, that is, the thickness of the metal wiring is 1 mm or more. It is an object to provide a multilayer board capable of supporting a large current and having a structure capable of maintaining high thermal reliability, and a power module using the multilayer board.
  • the multilayer substrate according to the present invention is a multilayer substrate in which an insulating resin is provided on the upper and lower surfaces of the metal thick wiring layer, and has a plurality of metal thick wiring layers in the inner layer portion.
  • a metal pillar wiring that is integrated with the metal thick wiring layer and extends in the thickness direction is formed.
  • the top surface of the metal pillar wiring is exposed on the upper surface of the multilayer substrate, and the exposed surface is a terminal for electronic component mounting or wire bonding bonding.
  • the horizontal cross section of the metal column wiring used as a terminal for the electronic component and the exposed surface used as the electronic component mounting terminal is larger than the outer shape of the electronic component mounted on the metal column wiring, and is formed in the metal thick wiring layer.
  • the metal column wiring is a multilayer substrate characterized by having a structure that penetrates without contacting another metal thick wiring layer.
  • the multilayer substrate according to the present invention has, for example, a protruding portion formed to extend from the metal thick wiring layer to the outside of the side portion of the multilayer substrate.
  • the multilayer substrate according to the present invention has, for example, a metal column terminal formed to extend from the metal thick wiring layer to the upper surface of the multilayer substrate.
  • a power module according to the present invention is mounted on an exposed surface of a metal column wiring used as a multilayer substrate and an electronic component mounting terminal according to the present invention, and has a smaller outer shape than a horizontal section of the metal column wiring. It is a power module including the electronic parts for use.
  • the power module electronic component includes, for example, a power transistor and a power diode.
  • the power module according to the present invention includes, for example, a power module electronic component and a wire bonded to a metal pillar wiring used as a wire bonding bonding terminal.
  • the inner layer portion has a plurality of metal thick wiring layers, the metal thick wiring layers are formed with metal column wirings that are integrated with the metal thick wiring layers and extend in the thickness direction, and the exposed surface is an electron.
  • the horizontal cross section of the metal pillar wiring used as a component mounting terminal is larger than the outer shape of the electronic component mounted on the metal pillar wiring, and the metal pillar wiring formed on the metal thick wiring layer is made of other metal. Since it has a structure that penetrates without contacting the thick wiring layer, the horizontal cross section of the metal pillar wiring used for the conventional power semiconductor mounting substrate and the exposed surface as the electronic component mounting terminal is the metal pillar wiring.
  • the overall mechanical strength is improved, and resistance due to wiring such as metal column wiring is reduced.
  • the metal wiring has a low conduction resistance, the power loss is small, that is, the thermal reliability is high even when the thickness of the metal wiring is 1 mm or more.
  • the multilayer substrate corresponding to a large current and the power module using the multilayer substrate can be obtained.
  • (A) is a top view which shows an example of the multilayer substrate concerning this invention
  • (B) is the cross-sectional illustration figure.
  • (A) is a plan view showing a lower insulating plate used in the multilayer substrate shown in FIG. 1, and (B) is a cut end view taken along line BB in (A).
  • (A) is a plan view showing a first power supply system wiring used in the multilayer substrate shown in FIG. 1, and (B) is a sectional end view taken along line BB in (A).
  • (A) is a plan view showing a second power supply system wiring used in the multilayer substrate shown in FIG. 1, and (B) is a sectional end view taken along line BB in (A).
  • (A) is a plan view showing a third power supply system wiring used in the multilayer substrate shown in FIG. 1, and (B) is a sectional end view taken along line BB in (A).
  • (A) is a plan view showing a surface circuit board used in the multilayer substrate shown in FIG. 1, and (B) is a sectional end view taken along line BB in (A).
  • (A) is a top view which shows the block body which manufactures the 1st power supply system wiring shown in FIG. 3, (B) is the front view.
  • (A) is a top view which shows the block body which manufactures the 2nd power supply system wiring shown in FIG. 4, (B) is the front view.
  • FIG. 2 is an illustrative sectional view showing a process for manufacturing the multilayer substrate shown in FIG. 1.
  • A) is a top view which shows an example of the power module using the multilayer substrate shown in FIG. 1,
  • B) is the cross-sectional solution figure.
  • (A) is a top view which shows the process of manufacturing the power module shown in FIG. 13, (B) is the sectional solution figure. It is a circuit diagram which shows the three-phase alternating current inverter using the power module shown in FIG. (A) is a top view which shows the other example of the multilayer substrate concerning this invention, (B) is the cross-sectional solution figure.
  • (A) is a top view which shows the further another example of the multilayer substrate concerning this invention, (B) is the sectional solution figure.
  • (A) is a top view which shows the further another example of the multilayer substrate concerning this invention, (B) is the sectional solution figure.
  • (A) is a plan view showing a first power supply system wiring used in the multilayer substrate shown in FIG.
  • (B) is a cut end view taken along line BB of (A).
  • (A) is a plan view showing a second power supply system wiring used in the multilayer substrate shown in FIG. 18, and (B) is a cut end view taken along line BB in (A).
  • (A) is a plan view showing a surface circuit board used for the multilayer substrate shown in FIG. 18, and (B) is a sectional end view taken along line BB in (A). It is typical sectional drawing of the board
  • FIG. 1 (A) is a plan view showing an example of a multilayer substrate according to the present invention
  • FIG. 1 (B) is a sectional schematic view thereof.
  • a multilayer substrate 10 shown in FIG. 1 is a multilayer substrate corresponding to a large current and includes, for example, a rectangular lower insulating plate 20 as shown in FIG.
  • the material of the lower insulating plate 20 is appropriately selected from ceramic and resin.
  • ceramic may be selected as the material of the lower insulating plate 20.
  • resins if a resin excellent in heat resistance, for example, a polyimide resin, a bismaleimide resin, a silicone resin, or the like is selected, the heat resistance requirement can be met.
  • an epoxy resin or the like may be selected as the material of the lower insulating plate 20.
  • a rectangular heat sink 22 is installed on the lower surface of the lower insulating plate 20.
  • heat radiating plate 22 heat accumulated in the multilayer substrate 10 is released to the outside due to heat generated by electronic components mounted on electronic component mounting terminals, which will be described later, and heat generated by a large current flowing in power supply system wiring, which will be described later. be able to.
  • the material of the heat sink 22 is appropriately selected from metals such as iron, aluminum, and copper, alloys containing these, or carbon-based materials having high thermal conductivity.
  • a first power supply wiring 30 is provided on the upper surface of the lower insulating plate 20 via an insulating resin 24.
  • the insulating resin 24 is for insulating the first power supply wiring 30, the second power supply wiring 40, which will be described later, and the third power supply wiring 50, and includes the first power supply wiring 30 and the second power supply wiring 30.
  • the first power system wiring 30, the second power system wiring 40, and the third power system wiring 50 including the space between the power system wiring 40 and the third power system wiring 50 are provided on the upper and lower surfaces. Insulating the first power supply wiring 30, the second power supply wiring 40, and the third power supply wiring 50 with ceramic is applied for the reason described in the problem to be solved by the above-described invention. should not do.
  • the elastic modulus of ceramic is as high as 200 to 400 GPa for alumina and 150 to 250 GPa for aluminum nitride, and cannot absorb the thermal stress generated by the difference in thermal expansion coefficient between the insulator and the power supply system wiring. Therefore, when the multilayer substrate 10 is used in a heat cycle environment, there arises a problem that a crack occurs at the interface between the insulator and the power supply system wiring, or the power supply system wiring breaks.
  • the elastic modulus of the insulating resin 24 is generally as low as 50 GPa or less, and many of them have a value of 20 GPa or less.
  • the insulator can absorb the thermal stress generated due to the difference in thermal expansion coefficient between the insulator and the power supply system wiring, so that the above-described problems do not occur and a highly reliable high current. It becomes a corresponding multilayer substrate.
  • a polyimide resin, a bismaleimide resin, a silicone resin, or the like may be selected.
  • an epoxy resin may be used.
  • the first power supply system wiring 30 includes a first metal thick wiring layer 32 having a rectangular plate shape, for example.
  • a first protrusion 34 having a rectangular plate shape is formed in the center of the left end of the first thick metal wiring layer 32.
  • the first protruding portion 34 is a portion that is not covered with the insulating resin 24 and protrudes outward from the left side portion of the multilayer substrate 10. From this first protrusion 34, the power of the power source processed by the electronic component mounted on the electronic component mounting terminal is output.
  • the first metal thick wiring layer 32 of the first power supply system wiring 30 extends in the thickness direction of the multilayer substrate 10 and reaches the surface of a surface circuit board 60 to be described later and is exposed to, for example, two rectangular pillars.
  • Metal column wirings 36a and 36b are formed at an interval. The exposed surfaces of the metal column wirings 36a and 36b are used as an electronic component mounting terminal for mounting an electronic component and a wire bonding bonding terminal for bonding a wire for supplying power to the electronic component, respectively.
  • a second power supply system wiring 40 is provided above the first power supply system wiring 30 via an insulating resin 24.
  • the second power supply system wiring 40 includes, for example, a second metal thick wiring layer 42 having a rectangular plate shape having the same size as that of the first metal thick wiring layer 32.
  • a second protrusion 44 having a rectangular plate shape is formed.
  • the second protruding portion 44 is a portion that is not covered with the insulating resin 24 and protrudes outward from the right side portion of the multilayer substrate 10. From the second projecting portion 44, power supply power is input.
  • the second metal thick wiring layer 42 of the second power system wiring 40 extends in the thickness direction of the multilayer substrate 10 and reaches, for example, a surface of a surface circuit board 60 described later, and is exposed, for example, a rectangular columnar metal column.
  • a wiring 46 is formed.
  • the exposed surface of the metal pillar wiring 46 is used as an electronic component mounting terminal for mounting an electronic component.
  • two rectangular openings 48a and 48b are formed in the second metal thick wiring layer 42 of the second power supply system wiring 40 with a gap therebetween.
  • One opening 48 a is for exposing the metal column wiring 36 a of the first power supply system wiring 30 to the surface of the surface circuit board 60.
  • the opening 48 a is formed larger than the metal column wiring 36 a, and the metal column wiring 36 a is passed through the opening 48 a so as not to contact the second power supply system wiring 40.
  • the other opening 48 b is for exposing the metal column wiring 36 b of the first power supply system wiring 30 to the surface of the surface circuit board 60. Therefore, the opening 48b is formed larger than the metal column wiring 36b, and the metal column wiring 36b is passed through the opening 48b so as not to contact the second power supply system wiring 40.
  • a third power supply wiring 50 is provided on the second power supply wiring 40 via an insulating resin 24.
  • the third power supply system wiring 50 includes a third metal thick wiring layer 52 having a rectangular plate shape having the same size as the first metal thick wiring layer 32, for example.
  • a third protrusion 54 having a rectangular plate shape is formed.
  • the third protruding portion 54 is a portion that is not covered with the insulating resin 24 and protrudes outward from the right side portion of the multilayer substrate 10. Therefore, the third protrusion 54 does not overlap with the second protrusion 44 in plan view.
  • the power supply is input from the third protrusion 54.
  • the third metal thick wiring layer 52 of the third power supply system wiring 50 extends in the thickness direction of the multilayer substrate 10 and reaches, for example, a surface of a surface circuit board 60 described later and is exposed, for example, a quadrangular columnar metal column.
  • a wiring 56 is formed.
  • the exposed surface of the metal pillar wiring 56 is used as a wire bonding bonding terminal for bonding a wire for supplying power to an electronic component.
  • two rectangular openings 58a and 58b are formed at an interval.
  • One opening 58 a is for exposing the metal column wiring 36 a of the first power supply system wiring 30 to the surface of the surface circuit board 60.
  • the opening 58 a is formed larger than the metal column wiring 36 a, and the metal column wiring 36 a is passed through the opening 58 a so as not to contact the third power supply system wiring 50.
  • the other opening 58 b is for exposing the metal column wiring 36 b of the first power supply system wiring 30 and the metal column wiring 46 of the second power supply system wiring 40 to the surface of the surface circuit board 60. Therefore, the opening 58b is formed larger than the metal column wirings 36b and 46, and the metal column wirings 36b and 46 do not contact each other and the third power supply system wiring 50 does not contact the opening 58b. Passed through.
  • the materials of the first power supply wiring 30, the second power supply wiring 40, and the third power supply wiring 50 are appropriately selected from metals such as iron, aluminum, and copper, or alloys containing them.
  • Aluminum and copper with low specific resistance are optimal for handling large currents.
  • Metals or alloys with high specific resistance may be used, but in this case, it is necessary to reduce the wiring resistance by increasing the area and thickness of the power supply wiring in order to handle a large current. In terms of miniaturization of the multilayer substrate, aluminum and copper having low specific resistance are advantageous.
  • the metal column wirings 36a and 36b of the first power supply system wiring 30, the metal column wiring 46 of the second power supply system wiring 40 and the metal column wiring 56 of the third power supply system wiring 50 are respectively the first metal.
  • the thick wiring layer 32, the second metal thick wiring layer 42, and the third metal thick wiring layer 52 are integrated.
  • the state of integration may be any state.
  • the power supply system wiring and the metal column wiring may be joined by a joining material such as a metal brazing material (welding material) or a conductive adhesive material.
  • a joining material such as a metal brazing material (welding material) or a conductive adhesive material.
  • the state integrated without using such a joining material may be sufficient.
  • a metal block body is processed into a state shown in FIGS.
  • the surfaces exposed on the surface of the surface circuit board 60 of the metal pillar wirings 36a, 36b, 46, 56, that is, the terminals for mounting the electronic components and the wires for supplying power to the electronic components are bonded.
  • the surface used as the wire bonding bonding terminal is not necessarily the same surface as the surface of the surface circuit board 60. If there is no problem in mounting electronic components, the surface of the electronic component mounting terminal or wire bonding bonding terminal may be on the lower surface or the upper surface of the surface wiring board surface.
  • the external shape of the electronic component mounting terminals must be larger than the external shape of the electronic components to be mounted. Therefore, the metal column wiring extending in the thickness direction from the power supply system wiring, the exposed surface of which is used as an electronic component mounting terminal, the cross-sectional shape in the plane direction is larger than the outer shape of the electronic component to be mounted. Will have to be formed.
  • increasing the cross-sectional shape of the metal pillar wiring in the planar direction is important for reducing the resistance of the metal pillar wiring, and is an essential component for a multilayer substrate capable of handling a large current.
  • a surface circuit board 60 is provided above the third power supply wiring 50 via an insulating resin 24. As shown in FIG. 6, the surface circuit board 60 is formed, for example, in the same size as the first metal thick wiring layer 32.
  • the material of the surface circuit board 60 is appropriately selected from ceramic and resin. If heat resistance is required, ceramic may be selected. Among the resins, if a resin excellent in heat resistance, for example, a polyimide resin, a bismaleimide resin, a silicone resin, or the like is selected, the heat resistance requirement can be met. When the heat resistance of the surface circuit board 60 is not required, an epoxy resin or the like may be used.
  • two rectangular openings 62a and 62b are formed at an interval.
  • One opening 62 a is for exposing the metal pillar wiring 36 a of the first power supply wiring 30 and the metal pillar wiring 56 of the third power supply wiring 50 to the surface of the surface circuit board 60. Therefore, the opening 62a is formed larger than the metal column wirings 36a and 56, and the metal column wirings 36a and 56 are passed through the opening 62a so as not to contact each other and to the surface circuit board 60.
  • the exposed surfaces of the metal column wirings 36a and 56 are used as an electronic component mounting terminal for mounting an electronic component and a wire bonding bonding terminal for bonding a wire for supplying power to the electronic component, respectively.
  • the other opening 62 b is for exposing the metal pillar wiring 36 b of the first power supply wiring 30 and the metal pillar wiring 46 of the second power supply wiring 40 to the surface of the surface circuit board 60. Therefore, the opening 62b is formed larger than the metal column wirings 36b and 46, and the metal column wirings 36b and 46 are passed through the opening 62b so as not to contact each other and to the surface circuit board 60.
  • the exposed surfaces of the metal column wirings 36b and 46 are used as a wire bonding joining terminal for bonding a wire for supplying power to the electronic component and an electronic component mounting terminal for mounting the electronic component, respectively.
  • two L-shaped signal wires 64a and 64b are formed, for example, as shown in FIG.
  • One signal wiring 64a is formed in the vicinity of the openings 62a and 62b, and both ends serve as signal terminals.
  • One end of the signal wiring 64a is formed as, for example, a rectangular signal introduction terminal 66a, and the other end of the signal wiring 64a is formed as, for example, a rectangular signal input terminal 68a.
  • the other signal wiring 64b is formed in the vicinity of the opening 62b, and both ends serve as signal terminals.
  • One end of the signal wiring 64b is formed as, for example, a rectangular signal introduction terminal 66b, and the other end of the signal wiring 64b is formed as, for example, a rectangular signal input terminal 68b.
  • the signal introduction terminals 66a and 66b are for sending signals from the outside into the multilayer substrate 10, respectively.
  • the signal input terminals 68a and 68b are for sending signals to the electronic components mounted on the multilayer substrate 10, respectively.
  • a resin plate made of polyimide resin is prepared as the lower insulating plate 20.
  • a heat radiating plate 22 made of copper is installed on the lower surface of the lower insulating plate 20.
  • a block body 31 shown in FIG. 7, a block body 41 shown in FIG. 8, and a block body 51 shown in FIG. 9 are prepared. These block bodies 31, 41 and 51 are each made of copper (C1100) or aluminum (A1050).
  • the first power supply system wiring 30, the second power supply system wiring 40, and the third power supply system wiring 50 are produced from the block bodies 31, 41, and 51 by cutting.
  • the thickness of the first metal thick wiring layer 32 of the first power supply system wiring 30 is, for example, 2.0 mm.
  • the metal column wiring 36a of the first power supply system wiring 30 is formed to have a height of, for example, 8.1 mm, a width of, for example, 4.0 mm, and a length of, for example, 10.0 mm.
  • the metal column wiring 36b of the first power supply system wiring 30 is formed with a height of, for example, 8.1 mm, a width of, for example, 3.0 mm, and a length of, for example, 10.0 mm.
  • the thickness of the second metal thick wiring layer 42 of the second power supply system wiring 40 is formed to be 2.0 mm, for example.
  • the metal column wiring 46 of the second power supply system wiring 40 has a height of, for example, 5.6 mm, a width of, for example, 4.0 mm, and a length of, for example, 10.0 mm.
  • the opening 48a of the second power supply system wiring 40 is formed with a width of, for example, 5.0 mm and a length of, for example, 11.0 mm.
  • the opening 48b of the second power supply system wiring 40 is formed with a width of, for example, 4.0 mm and a length of, for example, 11.0 mm.
  • the thickness of the third metal thick wiring layer 52 of the third power supply system wiring 50 is formed to, for example, 2.0 mm.
  • the metal column wiring 56 of the third power supply system wiring 50 has a height of, for example, 3.1 mm, a width of, for example, 3.0 mm, and a length of, for example, 10.0 mm.
  • the opening 58a of the third power supply system wiring 50 is formed to have a width of, for example, 6.0 mm and a length of, for example, 11.0 mm.
  • the opening 58b of the third power supply system wiring 50 is formed to have a width of, for example, 9.0 mm and a length of, for example, 11.0 mm.
  • a single-sided copper foil plate is prepared in which a copper foil 65 is provided on one side of a polyimide resin plate 61 made of polyimide resin.
  • the polyimide resin plate 61 is formed with a thickness of, for example, 9.0 mm
  • the copper foil 65 is formed with a thickness of, for example, 0.035 mm.
  • the copper foil 65 of the single-sided copper foil plate shown in FIG. 10 is photo-etched to form two signal wirings 64a and 64b on one side of the polyimide resin plate 61 as shown in FIG.
  • openings 62a and 62b are formed with a laser in the polyimide resin plate 61 on which the signal wirings 64a and 64b are formed, and the surface circuit board 60 is produced.
  • the openings 62a and 62b are each formed to have a width of 9.0 mm and a length of 11.0 mm.
  • the lower insulating plate 20, the first power system wiring 30, the second power system wiring 40, the third power system wiring 50, and the surface circuit board 60 are arranged at predetermined intervals in that order, for example, It arrange
  • the silicone resin is filled between the lower insulating plate 20, the first power supply wiring 30, the second power supply wiring 40, the third power supply wiring 50, and the surface circuit board 60 and cured, and the insulating resin is cured.
  • the multilayer substrate 10 shown in FIG. 1 has a first metal thick wiring layer 32, a second metal thick wiring layer 42, and a third metal thick wiring layer 52 in the inner layer portion.
  • 42 and 52 are respectively formed with metal column wirings 36a, 36b, 46 and 56 which are integrated with the metal thick wiring layer and extend in the thickness direction, and the exposed surfaces of the metal column wirings 36a and 46 used as electronic component mounting terminals.
  • the horizontal cross-section is larger than the outer shape of the electronic component mounted on the metal column wirings 36a and 46, respectively, and the metal column wirings 36a, 36b, 46 and 46 formed on the metal thick wiring layers 32, 42 and 52, respectively.
  • the metal pillar wirings 36a, 36b, 46 and 56 are used. Resistance decreases. Therefore, according to the multilayer substrate 10 shown in FIG. 1, the metal wiring having a low conduction resistance is not affected by the conventional metal wiring thickness limitation, the power loss is small, that is, the metal wiring thickness is 1 mm or more.
  • the multilayer substrate 10 shown in FIG. 1 it is possible to form metal wirings, particularly metal wirings for input / output power supplies with a thickness of millimeters, so that there is no thickness limitation as in the past, and power loss is reduced. It becomes a multi-layer substrate that can handle a small amount of current.
  • first metal thick wiring layer 32 has a first metal thick wiring layer 32, a second metal thick wiring layer 42, and a third metal thick wiring layer 52 in the inner layer portion, and these metal thick wiring layers.
  • 32, 42 and 52 are respectively formed with metal column wirings 36a, 36b, 46 and 56 which are integrated with the metal thick wiring layer and extend in the thickness direction, so that the size can be reduced as compared with the single-layer substrate. And has a function as a structure.
  • the range of selection of the resin used as the material of the insulating resin 24 is widened.
  • FIG. 13 (A) is a plan view showing an example of a power module 70 using the multilayer substrate 10 shown in FIG. 1, and FIG. 13 (B) is an illustrative sectional view thereof.
  • a power module 70 shown in FIG. 13 includes the multilayer substrate 10 shown in FIG.
  • a power transistor 72a and a power diode 74a are mounted as electronic components using, for example, a brazing material or a conductive adhesive. .
  • the emitter of the power transistor 72 a and the anode of the power diode 74 a are electrically connected to the metal column wiring 36 a of the first metal thick wiring layer 32.
  • the collector of the power transistor 72 a and the cathode of the power diode 74 a are electrically connected to the metal column wiring 56 of the third metal thick wiring layer 52 via a plurality of wires 76, respectively.
  • the base of the power transistor 72 a is electrically connected to the signal input terminal 68 a of the signal wiring 64 a through the wire 76.
  • the material of the wire 76 is appropriately selected from aluminum, copper, gold and the like.
  • a power transistor 72b and a power diode 74b are mounted on the exposed surface of the metal column wiring 46 of the second metal thick wiring layer 42 of the multilayer substrate 10 as electronic components.
  • the emitter of the power transistor 72 b and the anode of the power diode 74 b are electrically connected to the metal column wiring 46 of the second metal thick wiring layer 42.
  • the collector of the power transistor 72 b and the cathode of the power diode 74 b are electrically connected to the metal column wiring 36 b of the first metal thick wiring layer 32 via a plurality of wires 76, respectively.
  • the base of the power transistor 72 b is electrically connected to the signal input terminal 68 b of the signal wiring 64 b through the wire 76.
  • the multilayer substrate 10 shown in FIG. 1 is manufactured as described above.
  • a power transistor 72a made of a MOS-FET (field effect transistor) having an outer dimension of 3 mm ⁇ 3 mm and an outer dimension of 3 mm ⁇ 3 mm are provided on the metal column wiring 36a of the first metal thick wiring layer 32.
  • a power diode 74a made of SBD (Schottky barrier diode) is mounted with Bi-0.15Cu solder having a melting point of 271 ° C.
  • a power transistor 72b made of a MOS-FET (field effect transistor) having an outer dimension of 3 mm ⁇ 3 mm and an SBD (Schottky barrier diode) having an outer dimension of 3 mm ⁇ 3 mm are provided on the metal column wiring 46 of the second metal thick wiring layer 42. Is mounted with Bi-0.15Cu solder having a melting point of 271 ° C.
  • the mounted power transistor 72a and power diode 74a are electrically connected to the metal column wiring 56 by a large number of wires 76 made of aluminum wires by wire bonding.
  • the mounted power transistor 72b and power diode 74b and the metal column wiring 36b are electrically connected by a large number of wires 76 made of aluminum wires by wire bonding.
  • the power transistors 72a and 72b and the signal input terminals 68a and 68b are electrically connected by wire bonding with wires 76 made of aluminum wires, respectively.
  • the power module 70 shown in FIG. 13 has a power obtained by mounting two power transistors 72a and 72b as switching semiconductors and two power diodes 74a and 74b as rectifying semiconductors on the multilayer substrate 10 corresponding to a large current of FIG. It is an example of a module.
  • a three-phase AC inverter 80 shown in the circuit diagram of FIG. 15 can be formed. That is, the power module 70 shown in FIG. 13 is an example of a power module corresponding to the broken line 71 in the circuit diagram of FIG.
  • the configuration of the multilayer substrate 10 and the power module 70 using the multilayer substrate 10 shown in FIG. 1 has been described as an example.
  • the multilayer substrate and the power module according to the present invention use the configuration and the configuration shown in FIG. It is not limited to things.
  • FIG. 16 (A) is a plan view showing another example of the multilayer substrate according to the present invention
  • FIG. 16 (B) is a cross-sectional view thereof.
  • the heat sink 22 is formed on the lower surface of the insulating resin 24.
  • the signal wirings 64 a and 64 b are formed on the upper surface of the insulating resin 24.
  • the heat sink 22 does not need to be formed in each multilayer substrate 10 shown in FIG. 1 and FIG.
  • FIG. 17 (A) is a plan view showing still another example of the multilayer substrate according to the present invention
  • FIG. 17 (B) is a sectional schematic view thereof.
  • the multilayer substrate 10 shown in FIG. 17 is different from the multilayer substrate 10 shown in FIG. 1 in that the protrusion 34 of the first power supply wiring 30, the protrusion 44 of the second power supply wiring 40, and the third power supply wiring.
  • the first power wiring 30 extends from the first metal thick wiring layer 32 in the thickness direction of the multilayer substrate 10 and reaches the surface of the surface circuit board 60 to be exposed.
  • a rectangular pillar-shaped metal pillar terminal 37 for power supply power output is formed.
  • a quadrangular prism-shaped power supply power input extending from the second metal thick wiring layer 42 of the second power supply system wiring 40 in the thickness direction of the multilayer substrate 10 and reaching the surface of the surface circuit board 60 is exposed.
  • the metal column terminal 47 is formed.
  • the metal column terminal 57 is formed.
  • the metal power terminal 37 for power supply power output is a terminal for outputting power supply power processed by the electronic component mounted on the electronic component mounting terminal.
  • the metal column terminals 47 and 57 for power supply power input are terminals for inputting power supply power from the outside.
  • the side portions of the metal column terminal 37 for power supply power output and the metal column terminals 47 and 57 for power supply power input are surrounded by an insulating resin 24.
  • the power supply wiring has a three-layer configuration, but the multilayer substrate according to the present invention can be applied to a configuration in which the power supply wiring has two or more layers.
  • FIG. 18 shows an example of a multilayer board that can handle a large current and has a power supply system wiring structure of two layers.
  • FIG. 18 (A) is a plan view showing still another example of the multilayer substrate according to the present invention
  • FIG. 18 (B) is an illustrative sectional view thereof.
  • a multilayer substrate 10 shown in FIG. 18 is a multilayer substrate for mounting, for example, one power transistor and one power diode surrounded by a rectangular solid line 11 in the circuit diagram of FIG.
  • the multilayer substrate 10 shown in FIG. 18 has a metal pillar wiring in the first metal thick wiring layer 32 of the first power supply wiring 30 as shown in FIG. 19. Only one metal pillar wiring 36 is formed. Further, as shown in FIG. 20, only one opening 48 is formed in the second metal thick wiring layer 42 of the second power supply system wiring 40. Further, the surface circuit board 60 is formed with only one opening 62 and one signal wiring 64 for the opening and the signal wiring. Further, the third power supply wiring 50 is not formed on the multilayer substrate 10 shown in FIG.
  • the layer configuration of the multilayer substrate 10 varies depending on the number and type of electronic components to be mounted and the functions required as a multilayer substrate for large currents, and is designed according to the purpose.
  • connection of the electronic components mounted on the multilayer substrate 10 is not limited to wire bonding, and any connection method can be used as long as it can be electrically connected.
  • the power module according to the present invention is expected as a power semiconductor capable of high power processing.
  • the present invention is sufficiently applicable to silicon carbide (SiC) semiconductors and gallium nitride (GaN) semiconductors.
  • the multilayer substrate according to the present invention is particularly suitably used for a large current multilayer substrate used in, for example, a power module.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

La présente invention concerne un substrat multicouche pouvant être appliqué à un courant fort, qui ne présente pas les limites habituelles concernant l'épaisseur de ligne de câblage métallique, et qui comporte une ligne de câblage métallique de faible résistance à la conduction, et à faible perte de puissance, à savoir, qui a une structure capable de conserver une haute fiabilité thermique même lorsque l'épaisseur de la ligne de câblage métallique est de 1 mm au minimum. Selon l'invention, un substrat multicouche (10) comporte une pluralité de couches de lignes de câblage métalliques épaisses (32, 42, 52) dans une section de couche interne. Les couches de lignes de câblage métalliques épaisses (32, 42, 52) comportent des lignes de câblage métalliques colonnaires (36a, 36b, 46, 56) respectivement formées en leur sein, lesdites lignes de câblage métalliques colonnaires s'étendant intégralement dans la direction d'épaisseur conjointement avec les couches de lignes de câblage métalliques épaisses. Les sections transversales dans la direction horizontale des lignes de câblage métalliques colonnaires (36a, 46), dont les surfaces exposées doivent être utilisées comme bornes de montage de composants électroniques, sont plus grandes que les formes extérieures des composants électroniques à monter sur les lignes de câblage métalliques colonnaires (36a, 46). Les lignes de câblage métalliques colonnaires (36a, 36b, 46, 56), respectivement formées dans les couches de lignes de câblage métalliques épaisses, sont formées de façon à assurer une pénétration sans être en contact avec d'autres couches de lignes de câblage métalliques épaisses.
PCT/JP2013/069045 2012-08-01 2013-07-11 Substrat multicouche et module d'alimentation utilisant un substrat multicouche WO2014021077A1 (fr)

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JPWO2016080521A1 (ja) * 2014-11-20 2017-08-17 日本精工株式会社 電子部品搭載用放熱基板
JP6191784B2 (ja) * 2014-11-20 2017-09-06 日本精工株式会社 電子部品搭載用放熱基板
FR3069405A1 (fr) * 2017-07-24 2019-01-25 Elvia Printed Circuit Boards Circuit imprime dual et procede de fabrication.
US10283454B2 (en) 2015-05-22 2019-05-07 Abb Schweiz Ag Power semiconductor module
JP2020092152A (ja) * 2018-12-04 2020-06-11 板橋精機株式会社 プリント基板及びその製造方法

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JP2004006993A (ja) * 2003-08-28 2004-01-08 Denso Corp 多層基板
JP2004047866A (ja) * 2002-07-15 2004-02-12 Renesas Technology Corp 半導体装置
JP2006351738A (ja) * 2005-06-15 2006-12-28 Renesas Technology Corp 半導体装置およびその製造方法

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JP2001111237A (ja) * 1999-10-04 2001-04-20 Mitsubishi Electric Corp 多層プリント基板及び電子機器
JP2004047866A (ja) * 2002-07-15 2004-02-12 Renesas Technology Corp 半導体装置
JP2004006993A (ja) * 2003-08-28 2004-01-08 Denso Corp 多層基板
JP2006351738A (ja) * 2005-06-15 2006-12-28 Renesas Technology Corp 半導体装置およびその製造方法

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Publication number Priority date Publication date Assignee Title
JPWO2016080521A1 (ja) * 2014-11-20 2017-08-17 日本精工株式会社 電子部品搭載用放熱基板
JP6191784B2 (ja) * 2014-11-20 2017-09-06 日本精工株式会社 電子部品搭載用放熱基板
JPWO2016080520A1 (ja) * 2014-11-20 2017-09-07 日本精工株式会社 電子部品搭載用放熱基板
JP2018011063A (ja) * 2014-11-20 2018-01-18 日本精工株式会社 電子部品搭載用放熱基板
JP2019041110A (ja) * 2014-11-20 2019-03-14 日本精工株式会社 電子部品搭載用放熱基板
US10283454B2 (en) 2015-05-22 2019-05-07 Abb Schweiz Ag Power semiconductor module
FR3069405A1 (fr) * 2017-07-24 2019-01-25 Elvia Printed Circuit Boards Circuit imprime dual et procede de fabrication.
JP2020092152A (ja) * 2018-12-04 2020-06-11 板橋精機株式会社 プリント基板及びその製造方法

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