WO2011161967A1 - 多階調の画像を生成する信号を供給する装置 - Google Patents
多階調の画像を生成する信号を供給する装置 Download PDFInfo
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- WO2011161967A1 WO2011161967A1 PCT/JP2011/003590 JP2011003590W WO2011161967A1 WO 2011161967 A1 WO2011161967 A1 WO 2011161967A1 JP 2011003590 W JP2011003590 W JP 2011003590W WO 2011161967 A1 WO2011161967 A1 WO 2011161967A1
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- unit
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- control data
- dot
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
- B41J—TYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
- B41J2/00—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
- B41J2/315—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of heat to a heat sensitive printing or impression-transfer material
- B41J2/32—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of heat to a heat sensitive printing or impression-transfer material using thermal heads
- B41J2/35—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of heat to a heat sensitive printing or impression-transfer material using thermal heads providing current or voltage to the thermal head
- B41J2/355—Control circuits for heating-element selection
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K15/00—Arrangements for producing a permanent visual presentation of the output data, e.g. computer output printers
- G06K15/02—Arrangements for producing a permanent visual presentation of the output data, e.g. computer output printers using printers
- G06K15/028—Arrangements for producing a permanent visual presentation of the output data, e.g. computer output printers using printers by thermal printers
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K15/00—Arrangements for producing a permanent visual presentation of the output data, e.g. computer output printers
- G06K15/02—Arrangements for producing a permanent visual presentation of the output data, e.g. computer output printers using printers
- G06K15/18—Conditioning data for presenting it to the physical printing elements
- G06K15/1894—Outputting the image data to the printing elements
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
- H04N1/40—Picture signal circuits
- H04N1/40025—Circuits exciting or modulating particular heads for reproducing continuous tone value scales
Definitions
- the present invention relates to an apparatus for supplying a signal for generating a multi-tone image.
- Japanese Unexamined Patent Application Publication No. 2009-61747 can arbitrarily select the number of gradation bits of gradation data, and can increase the speed by performing data processing according to the number of gradation bits.
- the driver IC includes a shift register unit having a reset function, a latch circuit unit to which gradation data is transferred from the shift register unit, an SCLK counter having a reset function and counting a strobe clock signal, And a gradation control circuit unit that controls the light emission time of the LED element in accordance with the gradation value indicated by the gradation data based on the count number of the SCLK counter.
- Many head units that output multi-tone images by controlling the lighting time and heat generation time of not only optical print heads but also line thermal heads including a plurality of heat generating elements have a shift register and a latch circuit. Including.
- the head unit outputs a multi-tone image by activating the latched signal with a strobe signal (strobe clock).
- strobe clock strobe clock
- the number of times of transferring data to the head unit increases as the number of gradations increases. For this reason, the use of a high-speed (high-frequency) clock or an increase in the number of times of data switching increases the power consumption.
- One aspect of the present invention is a control device that expresses multiple gradations by outputting dot control data a plurality of times in units of lines to a head unit including a plurality of dot generation elements arranged in a line.
- This control device provides a signal supply unit that supplies the head unit with a signal that latches the dot control data for each time together with the dot control data for each time, and supplies the signal when the current dot control data is the same as the previous dot control data.
- This control device is provided as an LSI, ASIC, printed circuit board, control unit, controller, and may be provided as a device including a head unit and the like.
- the signal supply unit generates information (multi-gradation information) for generating one line forming a multi-gradation image in units of lines, basically binary dot control data (dot control data set). Supply in multiple batches.
- the signal supply unit tries to repeatedly supply the same dot control data when there is a non-existing gradation in the multi-gradation information of one line.
- the erasing unit erases the same dot control data, the same dot control data is not supplied to the head unit. For this reason, it is possible to reduce the number of data transfers from the control device to the head unit, and power consumption in the control device and / or the head unit can be reduced.
- the erasing unit may include a unit that outputs dot control data of the signal supply unit and / or an erasing signal for stopping generation or supply of a signal to be latched.
- the erasing unit may include a mask unit for erasing dot control data and / or a signal to be latched on the way from the signal supply unit to the head unit. By erasing both the dot control data and the latched signal, the power consumption can be further reduced.
- the erasing unit may include a clock erasing unit for erasing a head clock signal used for transferring dot control data. By eliminating the clock signal, power consumption can be further reduced.
- the clock erasing unit may include a clock mask unit that masks and erases the head clock signal on the way from the signal supply unit to the head unit.
- the signal supply unit includes a first unit that generates dot control data for each time and a second unit that generates a signal to be latched, and the erasing unit is the first unit and / or the second unit.
- a clock control unit for stopping the supply of the operation clock to the computer may be included.
- the operation clock to the first unit that generates dot control data and / or the second unit that generates a signal to be latched is turned on / off by an erase signal, and the dot control data and / or the signal to be latched is erased in the signal supply unit it can.
- the erasing unit may include a clock control unit that stops supply of an operation clock to a head clock generation unit that generates a head clock used for transfer of dot control data.
- the head clock can be erased by turning on and off the operation clock to the head clock generation unit by the erase signal.
- Another aspect of the present invention is an image generation apparatus having the above-described control device and a head unit.
- An example of the plurality of dot generation elements is a plurality of heating elements, and the head unit includes a line thermal head.
- Another aspect of the present invention is a control method for an image generation apparatus having a control apparatus that supplies dot control data to a head unit including a plurality of dot generation elements arranged in a line.
- the control device includes outputting dot control data a plurality of times in units of lines to express multiple gradations.
- Multi-gradation can be expressed by supplying the head unit with a signal to latch the dot control data for each time together with the dot control data for each time, and when the current dot control data is the same as the previous dot control data.
- this apparatus further includes a head clock generation unit that generates a head clock used for transfer of dot control data
- expressing the multiple gradations means that the current dot control data is different from the previous dot control data.
- FIG. 2 is a diagram illustrating a schematic configuration of an example of a printer.
- the block diagram which shows schematic structure of a thermal head and a control unit. 2 is a timing chart for explaining signals input to and output from a mask circuit of a control unit of the printer in FIG. 2 is a flowchart illustrating a method for controlling the printer in FIG. 1.
- FIG. 1 shows a schematic configuration of an example (printer) of an image generation apparatus according to the present invention.
- the image generating apparatus (printer) 1 is a sublimation type thermal printer.
- the printer 1 includes a line-type thermal head (thermal print head) 10 having n dot generating heat generating elements (heat generating elements, dot generating elements) 11 arranged in a line, and a recording medium (paper) 31. It has a platen roller 32 for feeding, a multi-sublimation ribbon 35 for multi-color printing on the paper 31, a motor 33 for driving the platen roller 32, and a control unit (control device) 20 for controlling them. .
- the control unit 20 acquires data (print data) 29 for printing an image including various contents such as pictures and characters from a host device 90 such as a personal computer, and based on the print data 29, the thermal head 10 Is used to print on the recording medium (paper) 31.
- a sublimation type (thermal transfer, sublimation transfer) printer image generation apparatus 1
- an ink ribbon (sublimation ribbon) 35 is heated as a medium by the heat energy of the heating element 11, and a recording medium 31 is discharged by ink discharged from the ribbon 35. Dots are formed (generated).
- Another example of media on which an image can be generated by the thermal head 10 is thermal paper.
- the medium is thermal paper
- dots for forming an image on the surface of the thermal paper are formed (generated) by the thermal energy supplied from the heating elements 11 arranged in a line. That is, in this case, the thermal paper serves as both a medium and a recording medium.
- the control unit 20 includes a printed circuit board 21 on which an LSI 50 or the like is mounted.
- the LSI 50 includes a print data buffer 59 that stores the print data 29 acquired from the host device 90, a thermal head control circuit 60 that converts the print data 29 stored in the buffer 59 into data for each line, and supplies the data to the thermal head 10.
- a mask unit (mask circuit) 70 for masking data and signals output from the thermal head control circuit 60 and a CPU 51 for controlling them are included.
- the printed circuit board 21 further includes a voltage level conversion IC 25 that converts the voltage levels of various data and signals output from the LSI 50 into voltages for driving the thermal head 10.
- the voltage level conversion IC 25 also includes a function as a buffer IC.
- the thermal head control circuit 60 has (m ⁇ 1) binary values for expressing multiple gradations (m gradations) for each of the n heating elements (dot generation elements) 11 constituting the line.
- Dot control data (energization data) ⁇ 1 including a signal is generated and serially transferred (m ⁇ 1) times per line to the thermal head 10 to express multiple gradations.
- the thermal head control circuit 60 performs gradation expression in dot units by controlling the energization data ⁇ 1 by the thermal head 10 and the energization data ⁇ 1 to control the energization data ⁇ 1 and the latch signal ⁇ 2 for the thermal head 10 to latch.
- the strobe signal ⁇ 3 is output.
- FIG. 2 is a block diagram showing a schematic configuration of the thermal head 10 and the control unit 20.
- the thermal head 10 is a line thermal head, and can form a plurality of dots arranged in the width direction (sub-scan direction) of the paper 31 in units of lines (units in the scan direction).
- the thermal head 10 may simultaneously form dots included in a plurality of lines. That is, the thermal head 10 may be capable of forming a plurality of dots arranged in the sub-scan direction simultaneously or in parallel as one line. In the following, an example of printing (forming dots) for each line will be described. Therefore, the thermal head 10 has a plurality (n) of heating elements 11 arranged in a line in a line. Each heating element 11 is supplied with electric power from a power source 19.
- the thermal head 10 includes a drive circuit 15 that controls the heating elements 11 on and off.
- the drive circuit 15 includes a plurality (n) of shift registers (data holding elements) 12 for receiving binary dot control data (hereinafter referred to as energization data) ⁇ 1, a plurality (n) of latch circuits 13, A plurality (n) of gate circuits 14.
- the shift register (data holding element) 12 is a circuit that receives the energization data ⁇ 1 supplied together with the head clock signal ⁇ c from the control unit 20 and performs serial-parallel conversion.
- the latch circuit 13 is a circuit that latches the energization data ⁇ 1 converted in parallel by the shift register 12 in accordance with the heating element 11 by the latch signal ⁇ 2.
- the gate circuit 14 supplies power to each heating element 11 by the energization data ⁇ 1 latched in each latch circuit 13 and the strobe signal ⁇ 3 supplied in units of lines, and causes each heating element 11 to generate heat. Circuit.
- the thermal head control circuit 60 of the control unit 20 supplies energization data ⁇ 1, head clock signal ⁇ c, latch signal ⁇ 2, and strobe signal ⁇ 3 to the print head 10. Therefore, the thermal head control circuit 60 includes functions as a signal supply unit and a head clock generation unit.
- the thermal head control circuit 60 that functions as a signal supply unit includes an energization data generation unit (first unit, communication data generation circuit) 61 that generates and outputs energization data ⁇ 1.
- the print data 29 for each line for printing in this example is 3 bits ⁇ n (0 to n ⁇ 1) pieces of data for realizing 8 gradations of 0 to 7.
- “N” indicates an integer related to the number of dots constituting one line.
- the energization data generation circuit 61 generates energization data ⁇ 1 including on / off (“0, 1”) n signals 7 times (7 sets) from the print data 29 of 8 gradations for each line.
- the thermal head control circuit 60 includes a head clock generation circuit (head clock generation unit) 62.
- the head clock generation circuit 62 generates a head clock signal ⁇ c for outputting a set of energization data ⁇ 1, and cooperates with the energization data generation unit 61 to transmit energization data ⁇ 1 including n binary signals from the LSI 50. Output. For example, by periodically outputting n head clock signals ⁇ c, one set (one line) of energization data ⁇ 1 including n binary signals can be serially transferred.
- the thermal head control circuit 60 further includes a latch generation circuit (second unit) 63.
- the latch generation circuit 63 When the energization data ⁇ 1 for one line is output from the thermal head control circuit 60, the latch generation circuit 63 outputs a signal (latch signal) ⁇ 2 for latching the energization data ⁇ 1 from the thermal head control circuit 60.
- the thermal head control circuit 60 further includes a strobe signal generation circuit 64.
- the strobe signal generation circuit 64 outputs the strobe signal ⁇ 3 from the thermal head control circuit 60 following the latch signal ⁇ 2.
- the strobe signal ⁇ 3 is a signal for controlling the heat generation time of the heat generating element 11 of the thermal head 10, and may be a signal having a constant cycle.
- the strobe signal ⁇ 3 may be a signal having a variable period in consideration of a thermal history and the like.
- a strobe signal ⁇ 3 having a constant cycle will be described as an example.
- the latch signal ⁇ 2 and the strobe signal ⁇ 3 are output as inverted signals, but they may not be inverted signals.
- the CPU 51 of the control unit 20 includes a data output unit (data output function) 52 and an erase signal output unit (erase signal generation function) 53 that outputs an erase signal (erase signal) ⁇ 9.
- the data output unit 52 obtains the latch completion signal ⁇ 21 from the thermal head control circuit 60
- the data output unit 52 causes the thermal head control circuit 60 to start generating and outputting the next energization data ⁇ 1.
- the erase signal output unit masks the current energization data ⁇ 1 and erases it.
- An erase signal (erase signal) ⁇ 9 to be output is output.
- the erase signal output unit 53 buffers the previous energization data ⁇ 1 output from the thermal head control circuit 60, and compares the current energization data ⁇ 1 with a comparator or the like to determine whether the current energization data ⁇ 1 is necessary. It may be a circuit. Even in such a circuit, the erase signal ⁇ 9 can be output. In this example, the erase signal ⁇ 9 is output as an inverted signal (negative logic), but it may not be an inverted signal.
- the control unit 20 determines at least the current energization data ⁇ 1 and / or the latch signal ⁇ 2 supplied to the head unit 10.
- An erasing unit 70 for erasing either one is included.
- the erasing unit 70 of this example is a mask circuit, and the mask circuit 70 erases the energization data ⁇ 1, the head clock signal ⁇ c, and the latch signal ⁇ 2 output from the thermal head control circuit 60 by the erase signal ⁇ 9.
- Mask circuit 70 includes gate circuits (AND circuits) 71a, 71b and 71c for masking energization data ⁇ 1, head clock signal ⁇ c and latch signal ⁇ 2 with erase signal ⁇ 9, respectively.
- the mask circuit 70 is incorporated in the LSI 50, and the same energization data ⁇ 1 as in the previous time is not output from the LSI 50 and is not output from the printed circuit board (PCB) 21.
- FIG. 3A and 3B show energization data ⁇ 1, head clock signal ⁇ c, latch signal ⁇ 2, and strobe signal ⁇ 3.
- the energization data ⁇ 1, the head clock signal ⁇ c, and the latch signal ⁇ 2 shown in FIG. 3A are output from the thermal head control circuit 60, that is, are input to the mask circuit 70.
- FIG. 3A shows a signal supplied from the control unit 20 to the thermal head 10 in an apparatus without the mask circuit 70.
- the fifth energization data ⁇ 1 expressing the gray level and the sixth energization data ⁇ 1 expressing the seventh gray level are sequentially generated and output.
- the 0th energization data ⁇ 1 represents the 0th and 1st gradations from 0 to 7 gradations.
- the thermal head control circuit 60 outputs the 0th energization data ⁇ 1 together with the head clock ⁇ c at time t1, and outputs the signal ⁇ 2 for latching the 0th energization data ⁇ 1 at time t2.
- the strobe signal ⁇ 3 is output at time t3.
- the first to sixth energization data ⁇ 1 are repeatedly output. In this way, the energization data ⁇ 1 for forming one line is divided into 0th to 6th energization data ⁇ 1 and is output in 7 times (7 cycles).
- the 0th to 6th energization data ⁇ 1 is different when the print data 29 of the line to be printed includes dots indicating all gradations from 0 to 7 gradations.
- the common energization data ⁇ 1 may be generated. For example, when the gradation existing on a certain line is 0, 4, 5 and 7, or only 4, 5 and 7, the third to third energization data ⁇ 1 is common.
- the fifth and sixth energization data ⁇ 1 are also common.
- the energization data ⁇ 1 output in the first time, the second time, the third time, the fourth time (1, 2, 3, 4 cycles) is common, and the energization data output in the sixth time and the seventh time (6, 7 cycles).
- Data ⁇ 1 is also common.
- the erase signal output unit 53 inverts the erase signal ⁇ 9 at time t11 when the second energization data ⁇ 1 (first energization data ⁇ 1) is output, and the erase unit The first energization data ⁇ 1 is masked and erased by the mask circuit 70. Similarly, the erasing signal output unit 53 outputs the erasing signal ⁇ 9 while the third (second) and fourth (third) energization data ⁇ 1 common to the first (0th) energization data ⁇ 1 is output. The mask circuit 70 erases the first through third energization data ⁇ 1.
- the signal ⁇ 2 for latching the third to third) energization data ⁇ 1 is masked and erased.
- the erased signal is indicated by a broken line.
- the erase signal output unit 53 releases the erase signal ⁇ 9 before time t41.
- the mask circuit 70 transfers the fifth (fourth) and sixth (fifth) energization data ⁇ 1 and the fourth and fifth energization data ⁇ 1 which are not common to the previous energization data ⁇ 1.
- the head clock signal ⁇ c and the signal ⁇ 2 for latching the fourth and fifth energization data ⁇ 1 are passed without being erased.
- the erasing signal output unit 53 inverts the erasing signal ⁇ 9 at the time t61 when the seventh (sixth) energization data ⁇ 1 common to the sixth (fifth) energization data ⁇ 1 is output.
- the mask circuit 70 as an erasing unit latches the seventh (sixth) energization data ⁇ 1, the head clock signal ⁇ c for transferring the sixth energization data ⁇ 1, and the sixth energization data ⁇ 1.
- the signal ⁇ 2 for masking is masked and erased.
- FIG. 4 is a flowchart showing a process (control method) for expressing multiple gradations in the control of the printer 1 performed by the control unit 20.
- the 0th density that is, the white or off dot, is represented by “0” in the first energization data ⁇ 1, and the other density dots are represented by “1”.
- the 0th energization data ⁇ 1 is output from the control unit 20 at time t1.
- step 102 the latch signal ⁇ 2 is output from the control unit 20 at time t1.
- step 103 a strobe signal ⁇ 3 is output from the control unit 20, and a dot indicating the first gradation is printed (printed) on the recording medium 31 by the thermal head 10.
- step 104 “i” is set to “1”.
- step 105 the energization data generation circuit 61 generates energization data ⁇ 1 for the second gradation.
- the zeroth and first density dots are represented by “0”, and the other density dots are represented by “1”. Therefore, when there is no dot of the first density, the 0th energization data ⁇ 1 and the 1st energization data ⁇ 1 are common.
- the erase signal output unit 53 outputs the erase signal ⁇ 9 in step 109 and the mask circuit 70 causes the current energization data ⁇ 1 to be present.
- Data ⁇ 1 and head clock signal ⁇ c are masked.
- the latch signal ⁇ 2 is masked by the mask circuit 70 in step 110. Therefore, when there is no dot of the first density, the first energization data ⁇ 1 is masked together with the head clock signal ⁇ c, the latch signal ⁇ 2 is also masked, and is not output from the control unit 20.
- the erase signal output unit 53 does not output the erase signal ⁇ 9, and in step 107 the current energization data ⁇ 1 and the head clock signal ⁇ c. Is output from the control unit 20, and the latch signal ⁇ 2 is also output in step 108.
- step 111 the first strobe signal ⁇ 3 is output regardless of whether the energization data ⁇ 1 is supplied to the thermal head 10 or not.
- the second gradation dot is recorded on the recording medium 31 using the 0th energization data ⁇ 1. To be printed.
- Steps 112 and 113 the condition of the parameter “i” is determined, and Steps 105 to 111 are repeated.
- the second and third energization data ⁇ 1 are masked after the first, and the thermal head 10 uses the 0th energization data ⁇ 1 to mask the third and fourth energies. Tone dots are printed on the recording medium 31.
- the fourth and fifth energization data ⁇ 1 are not masked.
- the fifth gradation dot is printed on the recording medium 31 using the fourth energization data ⁇ 1, and the fifth energization data ⁇ 1.
- the dot of the sixth gradation is printed on the recording medium 31 using.
- the sixth energization data ⁇ 1 is masked, and in the thermal head 10, the seventh gradation dot is printed on the recording medium 31 using the fifth energization data ⁇ 1.
- the mask circuit 70 masks all of the head clock signal ⁇ c, the energization data ⁇ 1, and the latch signal ⁇ 2, thereby stopping the data transfer. ing. However, by stopping the transfer of any of the head clock signal ⁇ c, energization data ⁇ 1, and latch signal ⁇ 2, the LSI 50, the thermal head 10, and the voltage level conversion IC 25 existing between the LSI 50 and the thermal head 10 In either case, a power saving effect can be obtained.
- the transfer of the energization data ⁇ 1 can be stopped simply by stopping the transfer of the head clock signal ⁇ c, and the power consumed in the LSI 50, the thermal head 10, and the voltage level conversion IC 25 can be reduced.
- the power consumed in the latch operation in the thermal head 10 can be reduced.
- FIG. 5 is a block diagram of the printer 1 including the control unit 20 having a different configuration.
- a mask circuit 70 as an erasing unit is configured independently of the LSI 50 and is mounted on the printed circuit board 21 configuring the control unit 20. Therefore, LSI 50 includes a terminal P9 for outputting erase signal ⁇ 9.
- FIG. 6 is a block diagram of the printer 1 including the control unit 20 having a further different configuration.
- a mask circuit 70 as an erasing unit is configured independently of the LSI 50 and is mounted on the printed circuit board 21 configuring the control unit 20.
- the mask circuit 70 includes a circuit 79 that compares the previous energization data ⁇ 1 with the current energization data ⁇ 1 and generates an erase signal ⁇ 9 within the mask circuit 70. Therefore, the LSI 50 may not include a function for generating the erase signal ⁇ 9.
- the comparison circuit 79 can also be incorporated in the thermal head control circuit 60 of the LSI 50.
- FIG. 7 is a block diagram of the printer 1 having a control unit 20 having a further different configuration.
- the LSI 50 generates a latch signal and a first clock supply unit 81 that supplies an operation clock ⁇ dc from an operation clock source 89 to an energization data generation circuit 61 that generates energization data ⁇ 1 that is dot control data.
- the second clock supply unit 82 supplies the operation clock ⁇ dc from the operation clock source 89 to the latch generation circuit 63, and the second clock supply unit 62 supplies the operation clock ⁇ dc from the operation clock source 89 to the head clock generation circuit 62 that generates the head clock signal ⁇ c.
- 3 clock supply units 83 are examples of the printer 1 having a control unit 20 having a further different configuration.
- the LSI 50 generates a latch signal and a first clock supply unit 81 that supplies an operation clock ⁇ dc from an operation clock source 89 to an energization data generation circuit 61 that generates energization data
- Each of the clock supply units 81 to 83 includes a gate circuit that stops the supply of the operation clock ⁇ dc by the erase signal ⁇ 9 supplied from the CPU 51. Accordingly, in this example, the clock supply units 81 to 83 function as the erasing unit 70, and the supply of the operation clock ⁇ dc to the energization data generation circuit 61, the latch generation circuit 63, and the head clock generation circuit 62 is turned on / off by the erasure signal ⁇ 9. As a result, the erasing unit 70 erases the energization data ⁇ 1, the latch signal ⁇ 2, and the head clock signal ⁇ c.
- any one of the supply of the operation clock ⁇ dc to the energization data generation circuit 61, the latch generation circuit 63, and the head clock generation circuit 62 is turned on / off by the erase signal ⁇ 9, and any of the energization data ⁇ 1, the latch signal ⁇ 2, and the head clock signal ⁇ c. Can be deleted.
- the erasing unit 70 When a mask circuit is used as the erasing unit 70, it is desirable to mask the energization data ⁇ 1 etc. as close as possible to the LSI 50 that is the output source of the energization data ⁇ 1. Power consumption in the voltage level conversion IC 25 and the thermal head 10 downstream of the mask circuit can be reduced.
- the erase unit 70 that turns on and off the operation clock ⁇ dc to the energization data generation circuit 61, the latch generation circuit 63, and the head clock generation circuit 62 by the erase signal ⁇ 9, the energization data generation circuit 61, the latch generation circuit 63, and the head clock generation
- the power consumed in the circuit 62 can be reduced, and a higher power saving effect can be obtained.
- a sublimation type line thermal printer using a sublimation ribbon is described.
- a line thermal printer that prints thermal paper as a medium having a predetermined color development characteristic with respect to the amount of heat The present invention can also be applied to other image generation apparatuses that perform multi-tone printing or printing.
- the image generation apparatus to which the present invention is applicable is not limited to a line type printer, and may be a serial type printer in which the head reciprocates in the scanning direction.
- the image generation apparatus is not limited to a personal printer, and may be a multifunction machine or a business printing machine.
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Abstract
Description
Claims (10)
- ライン状に配置された複数のドット生成素子を含むヘッドユニットに対し、ドット制御データをライン単位で複数回出力して多階調を表現する制御装置であって、
各回のドット制御データとともに、前記各回のドット制御データをラッチする信号を前記ヘッドユニットへ供給する信号供給ユニットと、
今回のドット制御データが前回のドット制御データと同じ場合は、前記信号供給ユニットから前記ヘッドユニットへ供給される前記今回のドット制御データおよび前記今回のドット制御データをラッチする信号の少なくともいずれかを消去する消去ユニットとを有する制御装置。 - 請求項1において、前記消去ユニットは、前記信号供給ユニットから前記ヘッドユニットの途上で前記ドット制御データおよび前記ラッチする信号の少なくともいずれかを消去するマスクユニットを含む、制御装置。
- 請求項1または2において、前記消去ユニットは、前記各回のドット制御データの転送に使われるヘッドクロック信号を消去するクロック消去ユニットを含む、制御装置。
- 請求項3において、前記クロック消去ユニットは、前記信号供給ユニットから前記ヘッドユニットの途上で前記ヘッドクロック信号を消去するクロックマスクユニットを含む、制御装置。
- 請求項1において、前記信号供給ユニットは、前記各回のドット制御データを生成する第1のユニットと、前記ラッチする信号を生成する第2のユニットとを含み、
さらに、前記消去ユニットは、前記第1のユニットおよび前記第2のユニットの少なくとも一方への動作クロックの供給を停止するクロック制御ユニットを含む、制御装置。 - 請求項5において、前記各回のドット制御データの転送に使われるヘッドクロックを生成するヘッドクロック生成ユニットを有し、
前記消去ユニットは、前記ヘッドクロック生成ユニットへの動作クロックの供給を停止するクロック制御ユニットを有する、制御装置。 - 請求項1ないし6のいずれかに記載の制御装置と、
前記ヘッドユニットとを有する画像生成装置。 - 請求項7において、前記複数のドット生成素子は複数の発熱素子である、画像生成装置。
- ライン状に配置された複数のドット生成素子を含むヘッドユニットに対し、ドット制御データを供給する制御装置を有する画像生成装置の制御方法であって、
前記制御装置がドット制御データをライン単位で複数回出力して多階調を表現することを有し、
前記多階調を表現することは、各回のドット制御データとともに、前記各回のドット制御データをラッチする信号を前記ヘッドユニットへ供給することと、
今回のドット制御データが前回のドット制御データと同じ場合は、前記ヘッドユニットへ供給される前記今回のドット制御データおよび前記今回のドット制御データをラッチする信号の少なくともいずれかを消去することとを含む、制御方法。 - 請求項9において、前記装置は、前記ドット制御データの転送に使われるヘッドクロック信号を生成するヘッドクロック生成ユニットをさらに含み、
前記多階調を表現することは、前記今回のドット制御データが前記前回のドット制御データと同じ場合は、前記ヘッドクロック信号を消去することを含む、制御方法。
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JP2001270145A (ja) * | 2000-03-22 | 2001-10-02 | Lg Electronics Inc | プリンタ及びそのヘッド |
JP2005141522A (ja) * | 2003-11-07 | 2005-06-02 | Naltec Inc | データ処理装置 |
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JP2000138833A (ja) * | 1998-08-28 | 2000-05-16 | Toshiba Tec Corp | 画像処理方法及び画像処理装置 |
JP2001080103A (ja) * | 1999-09-20 | 2001-03-27 | Victor Co Of Japan Ltd | カラープリンタ |
JP2009061747A (ja) | 2007-09-10 | 2009-03-26 | Sanyo Electric Co Ltd | ドライバ装置および光プリントヘッド |
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JPH08160808A (ja) * | 1994-12-12 | 1996-06-21 | Iwatsu Electric Co Ltd | 磁気印写装置における潜像記録方法 |
JP2001270145A (ja) * | 2000-03-22 | 2001-10-02 | Lg Electronics Inc | プリンタ及びそのヘッド |
JP2005141522A (ja) * | 2003-11-07 | 2005-06-02 | Naltec Inc | データ処理装置 |
JP2011051319A (ja) * | 2009-09-04 | 2011-03-17 | Fuji Xerox Co Ltd | 発光装置、自己走査型発光素子アレイの駆動方法、プリントヘッドおよび画像形成装置 |
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