WO1999035675A1 - Procede pour former un film de titane par d.c.p.v. - Google Patents

Procede pour former un film de titane par d.c.p.v. Download PDF

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Publication number
WO1999035675A1
WO1999035675A1 PCT/JP1999/000033 JP9900033W WO9935675A1 WO 1999035675 A1 WO1999035675 A1 WO 1999035675A1 JP 9900033 W JP9900033 W JP 9900033W WO 9935675 A1 WO9935675 A1 WO 9935675A1
Authority
WO
WIPO (PCT)
Prior art keywords
film
oxide film
silicon
gas
cvd
Prior art date
Application number
PCT/JP1999/000033
Other languages
English (en)
Japanese (ja)
Inventor
Taroh Ikeda
Original Assignee
Tokyo Electron Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Limited filed Critical Tokyo Electron Limited
Publication of WO1999035675A1 publication Critical patent/WO1999035675A1/fr

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28556—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/04—Coating on selected surface areas, e.g. using masks
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/06—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material
    • C23C16/08—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material from metal halides

Definitions

  • the present invention relates to a method for forming a Ti film by CVD, which is used, for example, as a contact metal or an adhesion layer in a semiconductor device.
  • the circuit configuration has tended to have a multilayer Ifi ⁇ structure in response to recent demands for higher density and higher integration. For this reason, the lower semiconductor device and the upper wiring layer have been developed.
  • a 1 aluminum
  • W tungsten
  • an alloy mainly composed of these is generally used. If it comes into direct contact with the underlying Si (silicon) substrate or A1 wiring, an alloy of both metals may be formed at these boundaries due to the absorption effect of A1.
  • the alloy formed in this way has a large resistance value, and it is not preferable to form such an alloy because of the recent demands for high power and high speed operation 11 ⁇ .
  • WF 6 gas used for forming the buried layer tends to degrade the electrical characteristics in the S i substrate, also not preferable .
  • a barrier layer is formed on these inner walls, and the barrier layer is buried from above.
  • the formation of the embedded layer is performed.
  • a barrier layer having a two-layer structure of a Ti (titanium) film and a TiN (titanium nitride) film is generally used.
  • PVD physical vapor deposition
  • the Ti film and the TiN film constituting the barrier layer are being formed by chemical vapor deposition (CVD), which can be expected to form a higher quality film.
  • CVD chemical vapor deposition
  • a Ti film as a contact metal is formed on Si at the bottom of the hole.
  • the natural oxide film of silicon formed on the underlying Si in the previous process is usually removed by a cleaning treatment with 1% diluted hydrofluoric acid.
  • the electrical characteristics at the time of forming the contact may vary depending on the cleaning conditions and the time management until the next process after the cleaning. There is a problem that it gets stuck.
  • T i layer In the formation of T i layer, the use of T i C 1 4 as a film-forming gas, during film formation is T i S i 2 reacts S i and T i force underlying are formed, the The morphology of the interface with the underlying Si deteriorates in the course of the reaction, and when used in the process of forming a contact hole, junction leakage is likely to occur, and also adversely affects the case of a via hole.
  • the present invention has been made in view of the above circumstances, and is based on a CVD method capable of forming a Ti film that stabilizes contact resistance and improves morphology at the interface with the underlying Si.
  • An object of the present invention is to provide a method for forming a Ti film. Disclosure of the invention
  • a titanium film is formed on a surface of a silicon layer such as a silicon substrate or a polysilicon wiring by CVD using a film forming gas containing a TiC14 gas.
  • a film forming gas containing a TiC14 gas shall apply in the method, a step of allowing the formation of a silicon oxide film on the silicon layer surface, the film gas containing T i C 1 4 gas in a state where the oxide film is left to be supplied to the silicon layer surface titanium film
  • a method for forming a titanium film by CVD comprising the steps of:
  • the silicon layer has its surface exposed at the bottom of a contact hole formed in an insulating film on a silicon substrate, or has its surface exposed at the bottom of a via hole formed in an insulating film on a polysilicon wiring layer. ing.
  • the silicon oxide film is a film having a thickness of about 10 ⁇ or more.
  • the present inventors have, T i C 1 4 using the deposition gas containing the gas by CVD Upon forming a film of the T i layer, the contact resistance with stabilizing I ⁇ of T i layer and the underlying interface between S i As a result of repeated studies to improve the morphology, it was found that the film should be formed with a constant thickness of, for example, a natural oxide film formed on the underlying Si.
  • Ti films as contact metals are often formed by PVD, and if a natural oxide film remains on the underlying Si at that time, the contact resistance after Ti film formation increases. Therefore, the natural oxide film was removed. Therefore, the native oxide film was similarly removed when forming the Ti film by CVD.
  • washing step in the preceding step can be omitted, the number of steps is reduced, and the production efficiency can be made extremely high.
  • the present invention has been made against the stereotype that the silicon natural oxide film on Si is to be removed, and furthermore, it has an extremely large effect as described above.
  • the target value is high.
  • FIG. 1 is a cross-sectional view showing an example of a film forming apparatus for performing a method of forming a Ti film by CVD according to the present invention.
  • FIG. 2 is a sectional view showing an Si wafer to which the present invention is applied.
  • FIG. 3 is a schematic diagram for explaining Ti film formation in the present invention.
  • FIG. 4 is a schematic diagram for explaining conventional Ti film formation.
  • FIG. 1 is a cross-sectional view showing an example of a Ti film forming apparatus used for carrying out the present invention.
  • This film-forming apparatus has a substantially cylindrical chamber 11 which is airtightly arranged, and a susceptor 2 for horizontally supporting a Si wafer W as an object to be processed is provided at the center thereof. It is arranged in a state where it is supported by a cylindrical support member 3 that can move up and down. Further, the heater 15 is embedded in the susceptor 1 for 4 hours, and the heater 15 is heated by a power source (not shown) to heat the Si wafer W as a processing target to a predetermined temperature.
  • a power source not shown
  • a shower head 10 is provided at an upper end portion of the chamber 11 so as to face the semiconductor wafer W supported by the susceptor 2, and a plurality of gas discharge holes are provided on a lower surface facing the wafer W. 10 & mosquitoes are formed. Inside the shower head 10, a space 11 is formed, and a dispersion plate 12 having a large number of holes formed therein is provided horizontally. A gas inlet 13 for introducing a gas into the shower head 10 is formed at an upper portion of the shower head 10, and a gas supply pipe 15 is connected to the gas inlet 13.
  • An H 2 (hydrogen) gas source 16, an Ar (argon) gas source 17, and a TiC 14 (tetrashidani titanium) gas source 18 are connected to the gas supply pipe 15. Each gas is supplied from these gas sources into the chamber 1 through the gas supply pipe 15 and the shower head 10, and a Ti film is formed on the Si wafer W.
  • the piping connected to each gas source is provided with a valve 19 and a mass opening controller 20 times.
  • a high-frequency power supply 23 is connected to the shower head 10 via a matching circuit 22 so that high-frequency power can be applied to the shower head 10 from the high-frequency power supply 23. With this high frequency power, a plasma force of the film forming gas is formed in the chamber 11.
  • the shower head 10 and the chamber 1 are electrically insulated by an insulating member 14, and the chamber 11 is grounded.
  • An exhaust port 8 is provided on the bottom wall of the chamber 1. Is connected to an exhaust system 9 for exhausting the inside of the chamber 11. Further, a loading / unloading port 24 for the wafer W is provided below the side wall of the chamber 1, and the loading / unloading port 24 can be opened and closed by a gate valve 25. The loading and unloading of wafer W is performed with susceptor 2 lowered.
  • the gate valve 25 is opened, the Si wafer W is loaded into the chamber 1, and is placed on the susceptor 2. and evacuated to a high vacuum state by S i wafer W while heating the vacuum pump of the exhaust system 9 by one coater 4, subsequently, T i C 1 4 gas, H 2 gas, is introduced to a r gas, high frequency Plasma is generated by applying high frequency power from the power supply 23.
  • the target for forming the T i layer as shown in FIG. 2 A, S i board 4 1 S i 0 2 film 4 2 as an insulating film on are formed, there contactor Tohoru 4 3 forms As shown in FIG. 2B, and as shown in FIG. 2B, the Si 0 2 film 4 5 is formed as an interlayer insulating film on the polysilicon film 44 directly or via an insulating film. A via hole 46 is formed there.
  • the Ti film is formed as described above without previously removing the natural oxide film formed on the base Si.
  • the TiCl + gas, H 2 gas and Ar gas are introduced, and a high frequency power is applied from a high frequency power source 23 to generate plasma to form a Ti film.
  • the interdiffusion between T i and S i is suppressed by the presence of a natural oxide film 5 0, and the etching of S i by T i C 1 4 gas is suppressed. Therefore, as shown in FIG. 3B, the morphology of the interface between the Ti Si 2 film 51 and the underlying Si substrate 41 caused by the diffusion of Ti and Si is improved.
  • the conventional oxide film is formed with the natural oxide film remaining without passing through the step of removing the natural oxide film.
  • the morphology does not deteriorate as in the case of removing the natural oxide film, and it is difficult to cause a junction leak or the like.
  • there is a great advantage in the process that the number of steps is reduced because the washing step is not required, and it is not necessary to consider variations in electrical characteristics due to the washing step.
  • natural oxide film of silicon silicon
  • Si 0 2 film is the surface of the silicon is formed instantaneously when exposed to the atmosphere.
  • the thickness of the silicon oxide film formed instantaneously is about 10 angstroms. Oxide thickness increases gradually with continued exposure to silicon-based surface air and typically saturates at thicknesses of 30-40 Angstroms.
  • the thickness of the native oxide film is preferably in the range of about 10 to 40 ⁇ . More preferably, it is in the range of about 20 to 30 angstroms.
  • the amount of T i C 1 4 gas, H 2 gas, A r gas is deposition gas, respectively, 3 ⁇ 30 SCCM, 0. 5 ⁇ 3 SLM, 0. 5 ⁇ 3 in the range of SLM Is preferred.
  • input power to high-frequency power supply 100 to 1000 W
  • pressure in chamber 0.5 ⁇ 3. It is preferable to set within the range of OTorr.
  • chamber internal pressure 1.5 Torr
  • input power to high frequency power supply 13.56 MHz: 30 OW
  • H2 gas 3 ⁇ 4ifi 0.5 SLM
  • Ar gas flow rate 1.0 SLM
  • T i C 1 4 gas flow rate 7 SC CM
  • the same Ti film was formed on the wafer from which the natural oxide film was removed in the previous step.
  • T i C 1 4 gas as the film forming gas, H 2 gas, was used Ar gas, may contain other gases.
  • the manufacturing conditions are not limited to the above conditions, and may be appropriately set so that a desired Ti film is formed.
  • the silicon oxide film on the silicon surface is a natural oxide film
  • the natural oxide film is formed only by exposing the silicon surface to the atmosphere, it is not necessary to provide a new process for forming the oxide film.
  • the silicon oxide film remaining on the silicon surface is not limited to the natural oxide film.
  • a silicon oxide film with a thickness of about 10 to 40 angstroms is formed in the same chamber or another chamber in a reduced-pressure oxidizing atmosphere. good.
  • the oxide film may be formed with a thickness of about 10 to 40 angstroms, or may be left as it is, or once formed to be thicker than 40 angstroms, and then to a thickness of 10 to 40 angstroms. Etching may be done until it is.
  • the present invention when forming a Ti film by CVD in a hole of an insulating film formed on the Si substrate or on the Si film thereon, the underlying natural oxide film is Since the film is formed without being removed, the contact resistance is stabilized, and the morphology of the interface with the underlying Si can be improved.

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  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Mechanical Engineering (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Chemical Vapour Deposition (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

On décrit un procédé de D.C.P.V. au moyen duquel on peut former un film de titane ayant une résistance de contact stable et une homologie satisfaisante de l'interface entre la feuille et le substrat de silicium. Le procédé consiste à introduire un gaz filmogène contenant un gaz TiCl4 dans une fenêtre de contact (46) au fond de laquelle un substrat de silicium (41) comportant un film de silicium autoxydé (50) est présent pour former par D.C.P.V. un film de titane sur le substrat (41) et, partant, une couche de TiSi2 (51) sur le même substrat (41).
PCT/JP1999/000033 1998-01-09 1999-01-08 Procede pour former un film de titane par d.c.p.v. WO1999035675A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP1348398A JPH11204457A (ja) 1998-01-09 1998-01-09 ＣＶＤ−Ｔｉ膜の成膜方法
JP10/13483 1998-01-09

Publications (1)

Publication Number Publication Date
WO1999035675A1 true WO1999035675A1 (fr) 1999-07-15

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Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP1999/000033 WO1999035675A1 (fr) 1998-01-09 1999-01-08 Procede pour former un film de titane par d.c.p.v.

Country Status (3)

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JP (1) JPH11204457A (fr)
TW (1) TW469300B (fr)
WO (1) WO1999035675A1 (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109841565A (zh) * 2017-11-28 2019-06-04 台湾积体电路制造股份有限公司 导电部件形成和结构
CN115072770A (zh) * 2022-06-13 2022-09-20 重庆大学 一硫化钛纳米材料及其制备方法

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5193494B2 (ja) * 2007-04-27 2013-05-08 東京エレクトロン株式会社 Ｔｉ膜の成膜方法および記憶媒体

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0562933A (ja) * 1991-09-04 1993-03-12 Oki Electric Ind Co Ltd 半導体装置の製造方法
JPH05259113A (ja) * 1992-03-09 1993-10-08 Mitsubishi Electric Corp 半導体装置の導電層接続構造およびその製造方法
JPH0653165A (ja) * 1992-07-28 1994-02-25 Sony Corp メタルプラグの形成方法
JPH06349774A (ja) * 1993-06-08 1994-12-22 Sony Corp 埋込みプラグの形成方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0562933A (ja) * 1991-09-04 1993-03-12 Oki Electric Ind Co Ltd 半導体装置の製造方法
JPH05259113A (ja) * 1992-03-09 1993-10-08 Mitsubishi Electric Corp 半導体装置の導電層接続構造およびその製造方法
JPH0653165A (ja) * 1992-07-28 1994-02-25 Sony Corp メタルプラグの形成方法
JPH06349774A (ja) * 1993-06-08 1994-12-22 Sony Corp 埋込みプラグの形成方法

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109841565A (zh) * 2017-11-28 2019-06-04 台湾积体电路制造股份有限公司 导电部件形成和结构
US10804097B2 (en) 2017-11-28 2020-10-13 Taiwan Semiconductor Manufacturing Co., Ltd. Conductive feature formation and structure
CN109841565B (zh) * 2017-11-28 2021-11-30 台湾积体电路制造股份有限公司 导电部件形成和结构
US11232945B2 (en) 2017-11-28 2022-01-25 Taiwan Semiconductor Manufacturing Co., Ltd. Conductive feature formation and structure
CN115072770A (zh) * 2022-06-13 2022-09-20 重庆大学 一硫化钛纳米材料及其制备方法
CN115072770B (zh) * 2022-06-13 2023-12-12 重庆大学 一硫化钛纳米材料及其制备方法

Also Published As

Publication number Publication date
JPH11204457A (ja) 1999-07-30
TW469300B (en) 2001-12-21

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